199 lines
3.7 KiB
Plaintext
199 lines
3.7 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
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*
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*/
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/ {
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rk628f_dc: rk628f-dc {
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compatible = "rockchip,dummy-codec";
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#sound-dai-cells = <0>;
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};
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rkvtunnel: rkvtunnel {
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compatible = "rockchip,video-tunnel";
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status = "okay";
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};
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hdmiin-sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,name = "rockchip,hdmiin";
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simple-audio-card,bitclock-master = <&dailink0_master>;
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simple-audio-card,frame-master = <&dailink0_master>;
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status = "okay";
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simple-audio-card,cpu {
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sound-dai = <&sai4>;
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};
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dailink0_master: simple-audio-card,codec {
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sound-dai = <&rk628f_dc>;
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};
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};
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//vcc_mipicsi1: vcc-mipicsi1-regulator {
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// compatible = "regulator-fixed";
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// gpio = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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// pinctrl-names = "default";
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// pinctrl-0 = <&mipicsi1_pwr>;
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// regulator-name = "vcc_mipicsi1";
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// enable-active-high;
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//};
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};
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&csi2_dphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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hdmi_mipi_in: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&hdmiin_out>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidphy0_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi1_csi2_input>;
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};
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};
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};
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};
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&csi2_dphy0_hw {
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status = "okay";
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};
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&csi2_dphy1_hw {
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status = "okay";
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};
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&i2c5 {
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status = "okay";
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pinctrl-0 = <&i2c5m3_xfer>;
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clock-frequency = <100000>;
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//clock-frequency = <400000>;
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rk628_csi: rk628_csi@51 {
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reg = <0x51>;
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compatible = "rockchip,rk628-csi-v4l2";
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status = "okay";
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//clocks = <&cru REF_CLK0_OUT_PLL>;
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//clock-names = "xvclk";
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pinctrl-names = "default";
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//pinctrl-0 = <&rk628_hdmiin_pin &ref_clk0_clk0>;
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pinctrl-0 = <&rk628_hdmiin_pin>;
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power-domains = <&power RK3576_PD_VI>;
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interrupt-parent = <&gpio4>;
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interrupts = <RK_PA0 IRQ_TYPE_EDGE_RISING>;
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enable-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
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plugin-det-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
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continues-clk = <1>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "HDMI-MIPI1";
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rockchip,camera-module-lens-name = "RK628-CSI";
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multi-dev-info {
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dev-idx-l = <1>;
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dev-idx-r = <3>;
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combine-idx = <1>;
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pixel-offset = <0>;
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dev-num = <2>;
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};
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port {
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hdmiin_out: endpoint {
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remote-endpoint = <&hdmi_mipi_in>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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};
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&mipi1_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi1_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidphy0_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi1_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in1>;
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};
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};
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};
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds1 {
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status = "okay";
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port {
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cif_mipi_in1: endpoint {
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remote-endpoint = <&mipi1_csi2_output>;
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};
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};
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};
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&rkcif_mmu {
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status = "okay";
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};
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&sai4 {
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pinctrl-names = "default";
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pinctrl-0 = <&sai4m0_lrck
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&sai4m0_sclk
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&sai4m0_sdi>;
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status = "okay";
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};
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&pinctrl {
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hdmiin {
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//mipicsi1_pwr: mipicsi1-pwr {
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// rockchip,pins =
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// /* 628H camera power en */
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// <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
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//};
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rk628_hdmiin_pin: rk628-hdmiin-pin {
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rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,
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<2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
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<3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>,
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<3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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