377 lines
6.4 KiB
Plaintext
377 lines
6.4 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*/
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#include <dt-bindings/display/drm_mipi_dsi.h>
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#include <dt-bindings/input/input.h>
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/ {
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vcc1v2_dvdd: vcc1v8_dovdd: vcc2v8_avdd: vcc-camera {
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compatible = "regulator-fixed";
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regulator-boot-on;
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regulator-always-on;
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regulator-name = "vcc_camera";
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pinctrl-names = "default";
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pinctrl-0 = <&cam_pwren>;
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enable-active-high;
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gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
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};
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cam_ircut0: cam_ircut {
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status = "okay";
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compatible = "rockchip,ircut";
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ircut-open-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
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ircut-close-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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};
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cam_ir_vcc: cam_ir_vcc-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&cam_ir_pwr>;
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regulator-name = "cam_ir_vcc";
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enable-active-high;
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};
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};
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&csi2_dphy_hw {
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status = "okay";
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};
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&csi2_dphy1 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy1_in: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&gc2093_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy1_out: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&mipi0_csi2_input>;
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};
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};
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};
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};
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&csi2_dphy2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy2_in: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&sc035gs_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy2_out: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&mipi1_csi2_input>;
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};
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};
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};
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};
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&i2c3 {
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3m2_xfer>;
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sc035gs: sc035gs@30 {
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compatible = "smartsens,sc035gs";
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status = "okay";
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reg = <0x30>;
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clocks = <&cru MCLK_REF_MIPI1>;
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clock-names = "xvclk";
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reset-gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out1>;
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avdd-supply = <&cam_ir_vcc>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "default";
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rockchip,camera-module-lens-name = "default";
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port {
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sc035gs_out: endpoint {
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remote-endpoint = <&dphy2_in>;
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data-lanes = <1 2>;
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};
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};
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};
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gt24c512: gt24c512@50 {
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compatible = "atmel,24c512";
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reg = <0x50>;
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vcc-supply = <&cam_ir_vcc>;
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};
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vcsel_rk803: vcsel_rk803@63 {
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compatible = "rockchip,rk803";
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status = "okay";
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reg = <0x63>;
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dvdd-supply = <&cam_ir_vcc>;
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gpio-encc1-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; //Flood
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gpio-encc2-gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>; //PRO
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};
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};
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&i2c4 {
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rockchip,amp-shared;
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4m2_xfer>;
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gc2093: gc2093@37 {
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compatible = "galaxycore,gc2093";
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status = "okay";
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reg = <0x37>;
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clocks = <&cru MCLK_REF_MIPI0>;
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clock-names = "xvclk";
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reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
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pwdn-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out0>;
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avdd-supply = <&vcc2v8_avdd>;
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dovdd-supply = <&vcc1v8_dovdd>;
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dvdd-supply = <&vcc1v2_dvdd>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "SIDA209300461";
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rockchip,camera-module-lens-name = "60IRC_F20";
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lens-focus = <&cam_ircut0>;
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port {
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gc2093_out: endpoint {
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remote-endpoint = <&dphy1_in>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&rkcif {
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status = "okay";
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};
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&mipi0_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi0_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&dphy1_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi0_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi0_in>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&rkcif_mipi_lvds {
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status = "okay";
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memory-region-thunderboot = <&rkisp_thunderboot>;
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port {
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/* MIPI CSI-2 endpoint */
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cif_mipi0_in: endpoint {
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remote-endpoint = <&mipi0_csi2_output>;
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data-lanes = <1 2>;
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};
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};
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};
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&rkcif_mipi_lvds_sditf {
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status = "okay";
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port {
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/* MIPI CSI-2 endpoint */
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mipi_lvds0_sditf: endpoint {
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remote-endpoint = <&isp0_in>;
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data-lanes = <1 2>;
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};
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};
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};
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&mipi1_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi1_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&dphy2_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi1_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi1_in>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&rkcif_mipi_lvds1 {
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status = "okay";
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port {
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/* MIPI CSI-2 endpoint */
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cif_mipi1_in: endpoint {
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remote-endpoint = <&mipi1_csi2_output>;
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data-lanes = <1 2>;
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};
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};
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};
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&rkcif_mipi_lvds1_sditf {
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status = "okay";
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port {
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/* MIPI CSI-2 endpoint */
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mipi_lvds1_sditf: endpoint {
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remote-endpoint = <&isp1_in>;
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data-lanes = <1 2>;
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};
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};
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};
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&rkisp {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_pins>;
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max-input = <1920 1280 30>;
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};
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&mailbox {
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status = "okay";
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};
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&thunder_boot_service {
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status = "okay";
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};
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&rkisp_thunderboot {
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/* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num) */
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reg = <0x00860000 0xa8c000>;
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};
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&rkisp_vir0 {
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status = "okay";
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ports {
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port@0 {
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isp0_in: endpoint {
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remote-endpoint = <&mipi_lvds0_sditf>;
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};
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};
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};
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};
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&rkisp_vir1 {
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status = "okay";
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ports {
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port@0 {
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isp1_in: endpoint {
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remote-endpoint = <&mipi_lvds1_sditf>;
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};
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};
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};
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};
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&rkisp_vir2 {
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status = "okay";
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};
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&pinctrl {
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cam {
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/* rgb camera power en */
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cam_pwren: cam_pwren-pwr {
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rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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cam_ir_pwr: cam-ir-pwr {
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rockchip,pins =
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/* ir camera power en */
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<1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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