// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
 */

#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/input/input.h>

/ {
	vcc1v2_dvdd: vcc1v8_dovdd: vcc2v8_avdd: vcc-camera {
		compatible = "regulator-fixed";
		regulator-boot-on;
		regulator-always-on;
		regulator-name = "vcc_camera";
		pinctrl-names = "default";
		pinctrl-0 = <&cam_pwren>;
		enable-active-high;
		gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
	};

	cam_ircut0: cam_ircut {
		status = "okay";
		compatible = "rockchip,ircut";
		ircut-open-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
		ircut-close-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
		rockchip,camera-module-index = <0>;
		rockchip,camera-module-facing = "back";
	};

	cam_ir_vcc: cam_ir_vcc-regulator {
		compatible = "regulator-fixed";
		gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&cam_ir_pwr>;
		regulator-name = "cam_ir_vcc";
		enable-active-high;
	};
};

&csi2_dphy_hw {
	status = "okay";
};

&csi2_dphy1 {
	status = "okay";
	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

			dphy1_in: endpoint@1 {
				reg = <1>;
				remote-endpoint = <&gc2093_out>;
				data-lanes = <1 2>;
			};
		};

		port@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
			dphy1_out: endpoint@1 {
				reg = <1>;
				remote-endpoint = <&mipi0_csi2_input>;
			};
		};
	};
};

&csi2_dphy2 {
	status = "okay";
	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

			dphy2_in: endpoint@1 {
				reg = <1>;
				remote-endpoint = <&sc035gs_out>;
				data-lanes = <1 2>;
			};
		};

		port@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;

			dphy2_out: endpoint@1 {
				reg = <1>;
				remote-endpoint = <&mipi1_csi2_input>;
			};
		};
	};
};

&i2c3 {
	status = "okay";
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&i2c3m2_xfer>;

	sc035gs: sc035gs@30 {
		compatible = "smartsens,sc035gs";
		status = "okay";
		reg = <0x30>;
		clocks = <&cru MCLK_REF_MIPI1>;
		clock-names = "xvclk";

		reset-gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&mipi_refclk_out1>;

		avdd-supply = <&cam_ir_vcc>;

		rockchip,camera-module-index = <1>;
		rockchip,camera-module-facing = "back";
		rockchip,camera-module-name = "default";
		rockchip,camera-module-lens-name = "default";

		port {
			sc035gs_out: endpoint {
				remote-endpoint = <&dphy2_in>;
				data-lanes = <1 2>;
			};
		};
	};

	gt24c512: gt24c512@50 {
		compatible = "atmel,24c512";
		reg = <0x50>;
		vcc-supply = <&cam_ir_vcc>;
	};

	vcsel_rk803: vcsel_rk803@63 {
		compatible = "rockchip,rk803";
		status = "okay";
		reg = <0x63>;

		dvdd-supply = <&cam_ir_vcc>;

		gpio-encc1-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; //Flood
		gpio-encc2-gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>; //PRO
	};

};

&i2c4 {
	rockchip,amp-shared;

	status = "okay";
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&i2c4m2_xfer>;

	gc2093: gc2093@37 {
		compatible = "galaxycore,gc2093";
		status = "okay";
		reg = <0x37>;
		clocks = <&cru MCLK_REF_MIPI0>;
		clock-names = "xvclk";
		reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
		pwdn-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&mipi_refclk_out0>;

		avdd-supply = <&vcc2v8_avdd>;
		dovdd-supply = <&vcc1v8_dovdd>;
		dvdd-supply = <&vcc1v2_dvdd>;

		rockchip,camera-module-index = <0>;
		rockchip,camera-module-facing = "back";
		rockchip,camera-module-name = "SIDA209300461";
		rockchip,camera-module-lens-name = "60IRC_F20";

		lens-focus = <&cam_ircut0>;

		port {
			gc2093_out: endpoint {
				remote-endpoint = <&dphy1_in>;
				data-lanes = <1 2>;
			};
		};
	};
};

&rkcif {
	status = "okay";
};

&mipi0_csi2 {
	status = "okay";

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

			mipi0_csi2_input: endpoint@1 {
				reg = <1>;
				remote-endpoint = <&dphy1_out>;
				data-lanes = <1 2>;
			};
		};

		port@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;

			mipi0_csi2_output: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&cif_mipi0_in>;
				data-lanes = <1 2>;
			};
		};
	};
};

&rkcif_mipi_lvds {
	status = "okay";

	memory-region-thunderboot = <&rkisp_thunderboot>;
	port {
		/* MIPI CSI-2 endpoint */
		cif_mipi0_in: endpoint {
			remote-endpoint = <&mipi0_csi2_output>;
			data-lanes = <1 2>;
		};
	};
};

&rkcif_mipi_lvds_sditf {
	status = "okay";

	port {
		/* MIPI CSI-2 endpoint */
		mipi_lvds0_sditf: endpoint {
			remote-endpoint = <&isp0_in>;
			data-lanes = <1 2>;
		};
	};
};

&mipi1_csi2 {
	status = "okay";

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

			mipi1_csi2_input: endpoint@1 {
				reg = <1>;
				remote-endpoint = <&dphy2_out>;
				data-lanes = <1 2>;
			};
		};

		port@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;

			mipi1_csi2_output: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&cif_mipi1_in>;
				data-lanes = <1 2>;
			};
		};
	};
};

&rkcif_mipi_lvds1 {
	status = "okay";

	port {
		/* MIPI CSI-2 endpoint */
		cif_mipi1_in: endpoint {
			remote-endpoint = <&mipi1_csi2_output>;
			data-lanes = <1 2>;
		};
	};
};

&rkcif_mipi_lvds1_sditf {
	status = "okay";
	port {
		/* MIPI CSI-2 endpoint */
		mipi_lvds1_sditf: endpoint {
			remote-endpoint = <&isp1_in>;
			data-lanes = <1 2>;
		};
	};
};

&rkisp {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&mipi_pins>;

	max-input = <1920 1280 30>;
};

&mailbox {
	status = "okay";
};

&thunder_boot_service {
	status = "okay";
};

&rkisp_thunderboot {
	/* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num) */
	reg = <0x00860000 0xa8c000>;
};

&rkisp_vir0 {
	status = "okay";

	ports {
		port@0 {
			isp0_in: endpoint {
				remote-endpoint = <&mipi_lvds0_sditf>;
			};
		};
	};
};

&rkisp_vir1 {
	status = "okay";

	ports {
		port@0 {
			isp1_in: endpoint {
				remote-endpoint = <&mipi_lvds1_sditf>;
			};
		};
	};
};

&rkisp_vir2 {
	status = "okay";
};

&pinctrl {
	cam {
		/* rgb camera power en */
		cam_pwren: cam_pwren-pwr {
			rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		cam_ir_pwr: cam-ir-pwr {
			rockchip,pins =
				/* ir camera power en */
				<1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};
};