58 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			58 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| # SPDX-License-Identifier: GPL-2.0-only
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| 
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| if ARCH_ASPEED || COMPILE_TEST
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| 
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| menu "ASPEED SoC drivers"
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| 
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| config ASPEED_LPC_CTRL
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| 	tristate "ASPEED LPC firmware cycle control"
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| 	select REGMAP
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| 	select MFD_SYSCON
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| 	default ARCH_ASPEED
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| 	help
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| 	  Control LPC firmware cycle mappings through ioctl()s. The driver
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| 	  also provides a read/write interface to a BMC ram region where the
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| 	  host LPC read/write region can be buffered.
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| 
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| config ASPEED_LPC_SNOOP
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| 	tristate "ASPEED LPC snoop support"
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| 	select REGMAP
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| 	select MFD_SYSCON
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| 	default ARCH_ASPEED
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| 	help
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| 	  Provides a driver to control the LPC snoop interface which
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| 	  allows the BMC to listen on and save the data written by
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| 	  the host to an arbitrary LPC I/O port.
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| 
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| config ASPEED_UART_ROUTING
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| 	tristate "ASPEED uart routing control"
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| 	select REGMAP
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| 	select MFD_SYSCON
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| 	default ARCH_ASPEED
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| 	help
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| 	  Provides a driver to control the UART routing paths, allowing
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| 	  users to perform runtime configuration of the RX muxes among
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| 	  the UART controllers and I/O pins.
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| 
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| config ASPEED_P2A_CTRL
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| 	tristate "ASPEED P2A (VGA MMIO to BMC) bridge control"
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| 	select REGMAP
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| 	select MFD_SYSCON
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| 	default ARCH_ASPEED
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| 	help
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| 	  Control ASPEED P2A VGA MMIO to BMC mappings through ioctl()s.  The
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| 	  driver also provides an interface for userspace mappings to a
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| 	  pre-defined region.
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| 
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| config ASPEED_SOCINFO
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| 	bool "ASPEED SoC Information driver"
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| 	default ARCH_ASPEED
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| 	select SOC_BUS
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| 	default ARCH_ASPEED
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| 	help
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| 	  Say yes to support decoding of ASPEED BMC information.
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| 
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| endmenu
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| 
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| endif
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