233 lines
		
	
	
		
			5.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			233 lines
		
	
	
		
			5.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright 2015 Red Hat Inc.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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 * OTHER DEALINGS IN THE SOFTWARE.
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 *
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 * Authors: Ben Skeggs <bskeggs@redhat.com>
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 */
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#include "priv.h"
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#include "agp.h"
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#include <core/option.h>
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#include <core/pci.h>
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#include <subdev/mc.h>
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u32
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nvkm_pci_rd32(struct nvkm_pci *pci, u16 addr)
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{
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	return pci->func->rd32(pci, addr);
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}
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void
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nvkm_pci_wr08(struct nvkm_pci *pci, u16 addr, u8 data)
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{
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	pci->func->wr08(pci, addr, data);
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}
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void
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nvkm_pci_wr32(struct nvkm_pci *pci, u16 addr, u32 data)
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{
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	pci->func->wr32(pci, addr, data);
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}
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u32
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nvkm_pci_mask(struct nvkm_pci *pci, u16 addr, u32 mask, u32 value)
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{
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	u32 data = pci->func->rd32(pci, addr);
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	pci->func->wr32(pci, addr, (data & ~mask) | value);
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	return data;
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}
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void
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nvkm_pci_rom_shadow(struct nvkm_pci *pci, bool shadow)
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{
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	u32 data = nvkm_pci_rd32(pci, 0x0050);
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	if (shadow)
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		data |=  0x00000001;
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	else
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		data &= ~0x00000001;
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	nvkm_pci_wr32(pci, 0x0050, data);
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}
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static irqreturn_t
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nvkm_pci_intr(int irq, void *arg)
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{
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	struct nvkm_pci *pci = arg;
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	struct nvkm_device *device = pci->subdev.device;
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	bool handled = false;
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	if (pci->irq < 0)
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		return IRQ_HANDLED;
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	nvkm_mc_intr_unarm(device);
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	if (pci->msi)
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		pci->func->msi_rearm(pci);
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	nvkm_mc_intr(device, &handled);
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	nvkm_mc_intr_rearm(device);
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	return handled ? IRQ_HANDLED : IRQ_NONE;
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}
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static int
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nvkm_pci_fini(struct nvkm_subdev *subdev, bool suspend)
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{
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	struct nvkm_pci *pci = nvkm_pci(subdev);
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	if (pci->agp.bridge)
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		nvkm_agp_fini(pci);
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	return 0;
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}
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static int
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nvkm_pci_preinit(struct nvkm_subdev *subdev)
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{
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	struct nvkm_pci *pci = nvkm_pci(subdev);
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	if (pci->agp.bridge)
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		nvkm_agp_preinit(pci);
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	return 0;
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}
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static int
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nvkm_pci_oneinit(struct nvkm_subdev *subdev)
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{
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	struct nvkm_pci *pci = nvkm_pci(subdev);
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	struct pci_dev *pdev = pci->pdev;
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	int ret;
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	if (pci_is_pcie(pci->pdev)) {
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		ret = nvkm_pcie_oneinit(pci);
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		if (ret)
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			return ret;
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	}
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	ret = request_irq(pdev->irq, nvkm_pci_intr, IRQF_SHARED, "nvkm", pci);
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	if (ret)
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		return ret;
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	pci->irq = pdev->irq;
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	return 0;
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}
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static int
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nvkm_pci_init(struct nvkm_subdev *subdev)
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{
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	struct nvkm_pci *pci = nvkm_pci(subdev);
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	int ret;
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	if (pci->agp.bridge) {
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		ret = nvkm_agp_init(pci);
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		if (ret)
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			return ret;
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	} else if (pci_is_pcie(pci->pdev)) {
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		nvkm_pcie_init(pci);
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	}
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	if (pci->func->init)
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		pci->func->init(pci);
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	/* Ensure MSI interrupts are armed, for the case where there are
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	 * already interrupts pending (for whatever reason) at load time.
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	 */
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	if (pci->msi)
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		pci->func->msi_rearm(pci);
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	return 0;
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}
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static void *
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nvkm_pci_dtor(struct nvkm_subdev *subdev)
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{
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	struct nvkm_pci *pci = nvkm_pci(subdev);
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	nvkm_agp_dtor(pci);
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	if (pci->irq >= 0) {
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		/* freq_irq() will call the handler, we use pci->irq == -1
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		 * to signal that it's been torn down and should be a noop.
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		 */
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		int irq = pci->irq;
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		pci->irq = -1;
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		free_irq(irq, pci);
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	}
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	if (pci->msi)
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		pci_disable_msi(pci->pdev);
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	return nvkm_pci(subdev);
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}
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static const struct nvkm_subdev_func
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nvkm_pci_func = {
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	.dtor = nvkm_pci_dtor,
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	.oneinit = nvkm_pci_oneinit,
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	.preinit = nvkm_pci_preinit,
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	.init = nvkm_pci_init,
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	.fini = nvkm_pci_fini,
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};
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int
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nvkm_pci_new_(const struct nvkm_pci_func *func, struct nvkm_device *device,
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	      enum nvkm_subdev_type type, int inst, struct nvkm_pci **ppci)
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{
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	struct nvkm_pci *pci;
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	if (!(pci = *ppci = kzalloc(sizeof(**ppci), GFP_KERNEL)))
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		return -ENOMEM;
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	nvkm_subdev_ctor(&nvkm_pci_func, device, type, inst, &pci->subdev);
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	pci->func = func;
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	pci->pdev = device->func->pci(device)->pdev;
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	pci->irq = -1;
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	pci->pcie.speed = -1;
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	pci->pcie.width = -1;
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	if (device->type == NVKM_DEVICE_AGP)
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		nvkm_agp_ctor(pci);
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	switch (pci->pdev->device & 0x0ff0) {
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	case 0x00f0:
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	case 0x02e0:
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		/* BR02? NFI how these would be handled yet exactly */
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		break;
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	default:
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		switch (device->chipset) {
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		case 0xaa:
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			/* reported broken, nv also disable it */
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			break;
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		default:
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			pci->msi = true;
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			break;
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		}
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	}
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#ifdef __BIG_ENDIAN
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	pci->msi = false;
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#endif
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	pci->msi = nvkm_boolopt(device->cfgopt, "NvMSI", pci->msi);
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	if (pci->msi && func->msi_rearm) {
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		pci->msi = pci_enable_msi(pci->pdev) == 0;
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		if (pci->msi)
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			nvkm_debug(&pci->subdev, "MSI enabled\n");
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	} else {
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		pci->msi = false;
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	}
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	return 0;
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}
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