176 lines
5.2 KiB
C
176 lines
5.2 KiB
C
/*
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* Copyright 2015 Nouveau Project
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "agp.h"
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#ifdef __NVKM_PCI_AGP_H__
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#include <core/option.h>
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struct nvkm_device_agp_quirk {
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u16 hostbridge_vendor;
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u16 hostbridge_device;
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u16 chip_vendor;
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u16 chip_device;
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int mode;
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};
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static const struct nvkm_device_agp_quirk
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nvkm_device_agp_quirks[] = {
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/* VIA Apollo PRO133x / GeForce FX 5600 Ultra - fdo#20341 */
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{ PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_NVIDIA, 0x0311, 2 },
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/* SiS 761 does not support AGP cards, use PCI mode */
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{ PCI_VENDOR_ID_SI, 0x0761, PCI_ANY_ID, PCI_ANY_ID, 0 },
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{},
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};
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void
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nvkm_agp_fini(struct nvkm_pci *pci)
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{
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if (pci->agp.acquired) {
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agp_backend_release(pci->agp.bridge);
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pci->agp.acquired = false;
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}
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}
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/* Ensure AGP controller is in a consistent state in case we need to
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* execute the VBIOS DEVINIT scripts.
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*/
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void
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nvkm_agp_preinit(struct nvkm_pci *pci)
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{
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struct nvkm_device *device = pci->subdev.device;
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u32 mode = nvkm_pci_rd32(pci, 0x004c);
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u32 save[2];
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/* First of all, disable fast writes, otherwise if it's already
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* enabled in the AGP bridge and we disable the card's AGP
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* controller we might be locking ourselves out of it.
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*/
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if ((mode | pci->agp.mode) & PCI_AGP_COMMAND_FW) {
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mode = pci->agp.mode & ~PCI_AGP_COMMAND_FW;
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agp_enable(pci->agp.bridge, mode);
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}
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/* clear busmaster bit, and disable AGP */
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save[0] = nvkm_pci_rd32(pci, 0x0004);
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nvkm_pci_wr32(pci, 0x0004, save[0] & ~0x00000004);
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nvkm_pci_wr32(pci, 0x004c, 0x00000000);
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/* reset PGRAPH, PFIFO and PTIMER */
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save[1] = nvkm_mask(device, 0x000200, 0x00011100, 0x00000000);
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nvkm_mask(device, 0x000200, 0x00011100, save[1]);
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/* and restore busmaster bit (gives effect of resetting AGP) */
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nvkm_pci_wr32(pci, 0x0004, save[0]);
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}
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int
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nvkm_agp_init(struct nvkm_pci *pci)
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{
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if (!agp_backend_acquire(pci->pdev)) {
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nvkm_error(&pci->subdev, "failed to acquire agp\n");
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return -ENODEV;
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}
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agp_enable(pci->agp.bridge, pci->agp.mode);
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pci->agp.acquired = true;
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return 0;
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}
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void
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nvkm_agp_dtor(struct nvkm_pci *pci)
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{
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arch_phys_wc_del(pci->agp.mtrr);
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}
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void
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nvkm_agp_ctor(struct nvkm_pci *pci)
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{
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const struct nvkm_device_agp_quirk *quirk = nvkm_device_agp_quirks;
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struct nvkm_subdev *subdev = &pci->subdev;
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struct nvkm_device *device = subdev->device;
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struct agp_kern_info info;
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int mode = -1;
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#ifdef __powerpc__
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/* Disable AGP by default on all PowerPC machines for now -- At
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* least some UniNorth-2 AGP bridges are known to be broken:
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* DMA from the host to the card works just fine, but writeback
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* from the card to the host goes straight to memory
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* untranslated bypassing that GATT somehow, making them quite
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* painful to deal with...
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*/
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mode = 0;
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#endif
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mode = nvkm_longopt(device->cfgopt, "NvAGP", mode);
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/* acquire bridge temporarily, so that we can copy its info */
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if (!(pci->agp.bridge = agp_backend_acquire(pci->pdev))) {
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nvkm_warn(subdev, "failed to acquire agp\n");
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return;
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}
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agp_copy_info(pci->agp.bridge, &info);
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agp_backend_release(pci->agp.bridge);
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pci->agp.mode = info.mode;
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pci->agp.base = info.aper_base;
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pci->agp.size = info.aper_size * 1024 * 1024;
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pci->agp.cma = info.cant_use_aperture;
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pci->agp.mtrr = -1;
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/* determine if bridge + chipset combination needs a workaround */
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while (quirk->hostbridge_vendor) {
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if (info.device->vendor == quirk->hostbridge_vendor &&
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info.device->device == quirk->hostbridge_device &&
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(quirk->chip_vendor == (u16)PCI_ANY_ID ||
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pci->pdev->vendor == quirk->chip_vendor) &&
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(quirk->chip_device == (u16)PCI_ANY_ID ||
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pci->pdev->device == quirk->chip_device)) {
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nvkm_info(subdev, "forcing default agp mode to %dX, "
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"use NvAGP=<mode> to override\n",
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quirk->mode);
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mode = quirk->mode;
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break;
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}
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quirk++;
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}
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/* apply quirk / user-specified mode */
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if (mode >= 1) {
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if (pci->agp.mode & 0x00000008)
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mode /= 4; /* AGPv3 */
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pci->agp.mode &= ~0x00000007;
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pci->agp.mode |= (mode & 0x7);
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} else
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if (mode == 0) {
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pci->agp.bridge = NULL;
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return;
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}
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/* fast writes appear to be broken on nv18, they make the card
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* lock up randomly.
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*/
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if (device->chipset == 0x18)
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pci->agp.mode &= ~PCI_AGP_COMMAND_FW;
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pci->agp.mtrr = arch_phys_wc_add(pci->agp.base, pci->agp.size);
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}
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#endif
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