289 lines
7.8 KiB
C
289 lines
7.8 KiB
C
/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "nv50.h"
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#include "ram.h"
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#include <core/client.h>
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#include <core/enum.h>
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#include <engine/fifo.h>
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static int
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nv50_fb_ram_new(struct nvkm_fb *base, struct nvkm_ram **pram)
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{
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struct nv50_fb *fb = nv50_fb(base);
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return fb->func->ram_new(&fb->base, pram);
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}
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static const struct nvkm_enum vm_dispatch_subclients[] = {
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{ 0x00000000, "GRCTX" },
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{ 0x00000001, "NOTIFY" },
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{ 0x00000002, "QUERY" },
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{ 0x00000003, "COND" },
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{ 0x00000004, "M2M_IN" },
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{ 0x00000005, "M2M_OUT" },
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{ 0x00000006, "M2M_NOTIFY" },
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{}
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};
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static const struct nvkm_enum vm_ccache_subclients[] = {
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{ 0x00000000, "CB" },
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{ 0x00000001, "TIC" },
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{ 0x00000002, "TSC" },
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{}
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};
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static const struct nvkm_enum vm_prop_subclients[] = {
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{ 0x00000000, "RT0" },
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{ 0x00000001, "RT1" },
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{ 0x00000002, "RT2" },
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{ 0x00000003, "RT3" },
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{ 0x00000004, "RT4" },
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{ 0x00000005, "RT5" },
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{ 0x00000006, "RT6" },
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{ 0x00000007, "RT7" },
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{ 0x00000008, "ZETA" },
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{ 0x00000009, "LOCAL" },
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{ 0x0000000a, "GLOBAL" },
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{ 0x0000000b, "STACK" },
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{ 0x0000000c, "DST2D" },
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{}
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};
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static const struct nvkm_enum vm_pfifo_subclients[] = {
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{ 0x00000000, "PUSHBUF" },
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{ 0x00000001, "SEMAPHORE" },
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{}
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};
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static const struct nvkm_enum vm_bar_subclients[] = {
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{ 0x00000000, "FB" },
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{ 0x00000001, "IN" },
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{}
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};
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static const struct nvkm_enum vm_client[] = {
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{ 0x00000000, "STRMOUT" },
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{ 0x00000003, "DISPATCH", vm_dispatch_subclients },
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{ 0x00000004, "PFIFO_WRITE" },
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{ 0x00000005, "CCACHE", vm_ccache_subclients },
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{ 0x00000006, "PMSPPP" },
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{ 0x00000007, "CLIPID" },
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{ 0x00000008, "PFIFO_READ" },
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{ 0x00000009, "VFETCH" },
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{ 0x0000000a, "TEXTURE" },
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{ 0x0000000b, "PROP", vm_prop_subclients },
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{ 0x0000000c, "PVP" },
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{ 0x0000000d, "PBSP" },
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{ 0x0000000e, "PCRYPT" },
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{ 0x0000000f, "PCOUNTER" },
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{ 0x00000011, "PDAEMON" },
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{}
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};
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static const struct nvkm_enum vm_engine[] = {
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{ 0x00000000, "PGRAPH" },
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{ 0x00000001, "PVP" },
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{ 0x00000004, "PEEPHOLE" },
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{ 0x00000005, "PFIFO", vm_pfifo_subclients },
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{ 0x00000006, "BAR", vm_bar_subclients },
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{ 0x00000008, "PMSPPP" },
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{ 0x00000008, "PMPEG" },
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{ 0x00000009, "PBSP" },
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{ 0x0000000a, "PCRYPT" },
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{ 0x0000000b, "PCOUNTER" },
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{ 0x0000000c, "SEMAPHORE_BG" },
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{ 0x0000000d, "PCE0" },
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{ 0x0000000e, "PMU" },
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{}
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};
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static const struct nvkm_enum vm_fault[] = {
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{ 0x00000000, "PT_NOT_PRESENT" },
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{ 0x00000001, "PT_TOO_SHORT" },
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{ 0x00000002, "PAGE_NOT_PRESENT" },
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{ 0x00000003, "PAGE_SYSTEM_ONLY" },
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{ 0x00000004, "PAGE_READ_ONLY" },
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{ 0x00000006, "NULL_DMAOBJ" },
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{ 0x00000007, "WRONG_MEMTYPE" },
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{ 0x0000000b, "VRAM_LIMIT" },
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{ 0x0000000f, "DMAOBJ_LIMIT" },
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{}
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};
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static void
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nv50_fb_intr(struct nvkm_fb *base)
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{
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struct nv50_fb *fb = nv50_fb(base);
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struct nvkm_subdev *subdev = &fb->base.subdev;
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struct nvkm_device *device = subdev->device;
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struct nvkm_fifo *fifo = device->fifo;
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struct nvkm_fifo_chan *chan;
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const struct nvkm_enum *en, *re, *cl, *sc;
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u32 trap[6], idx, inst;
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u8 st0, st1, st2, st3;
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unsigned long flags;
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int i;
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idx = nvkm_rd32(device, 0x100c90);
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if (!(idx & 0x80000000))
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return;
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idx &= 0x00ffffff;
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for (i = 0; i < 6; i++) {
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nvkm_wr32(device, 0x100c90, idx | i << 24);
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trap[i] = nvkm_rd32(device, 0x100c94);
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}
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nvkm_wr32(device, 0x100c90, idx | 0x80000000);
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/* decode status bits into something more useful */
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if (device->chipset < 0xa3 ||
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device->chipset == 0xaa || device->chipset == 0xac) {
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st0 = (trap[0] & 0x0000000f) >> 0;
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st1 = (trap[0] & 0x000000f0) >> 4;
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st2 = (trap[0] & 0x00000f00) >> 8;
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st3 = (trap[0] & 0x0000f000) >> 12;
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} else {
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st0 = (trap[0] & 0x000000ff) >> 0;
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st1 = (trap[0] & 0x0000ff00) >> 8;
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st2 = (trap[0] & 0x00ff0000) >> 16;
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st3 = (trap[0] & 0xff000000) >> 24;
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}
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inst = ((trap[2] << 16) | trap[1]) << 12;
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en = nvkm_enum_find(vm_engine, st0);
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re = nvkm_enum_find(vm_fault , st1);
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cl = nvkm_enum_find(vm_client, st2);
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if (cl && cl->data) sc = nvkm_enum_find(cl->data, st3);
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else if (en && en->data) sc = nvkm_enum_find(en->data, st3);
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else sc = NULL;
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chan = nvkm_fifo_chan_inst(fifo, inst, &flags);
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nvkm_error(subdev, "trapped %s at %02x%04x%04x on channel %d [%08x %s] "
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"engine %02x [%s] client %02x [%s] "
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"subclient %02x [%s] reason %08x [%s]\n",
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(trap[5] & 0x00000100) ? "read" : "write",
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trap[5] & 0xff, trap[4] & 0xffff, trap[3] & 0xffff,
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chan ? chan->chid : -1, inst,
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chan ? chan->object.client->name : "unknown",
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st0, en ? en->name : "",
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st2, cl ? cl->name : "", st3, sc ? sc->name : "",
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st1, re ? re->name : "");
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nvkm_fifo_chan_put(fifo, flags, &chan);
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}
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static int
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nv50_fb_oneinit(struct nvkm_fb *base)
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{
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struct nv50_fb *fb = nv50_fb(base);
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struct nvkm_device *device = fb->base.subdev.device;
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fb->r100c08_page = alloc_page(GFP_KERNEL | __GFP_ZERO);
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if (fb->r100c08_page) {
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fb->r100c08 = dma_map_page(device->dev, fb->r100c08_page, 0,
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PAGE_SIZE, DMA_BIDIRECTIONAL);
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if (dma_mapping_error(device->dev, fb->r100c08))
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return -EFAULT;
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}
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return 0;
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}
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static void
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nv50_fb_init(struct nvkm_fb *base)
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{
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struct nv50_fb *fb = nv50_fb(base);
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struct nvkm_device *device = fb->base.subdev.device;
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/* Not a clue what this is exactly. Without pointing it at a
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* scratch page, VRAM->GART blits with M2MF (as in DDX DFS)
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* cause IOMMU "read from address 0" errors (rh#561267)
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*/
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nvkm_wr32(device, 0x100c08, fb->r100c08 >> 8);
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/* This is needed to get meaningful information from 100c90
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* on traps. No idea what these values mean exactly. */
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nvkm_wr32(device, 0x100c90, fb->func->trap);
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}
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static u32
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nv50_fb_tags(struct nvkm_fb *base)
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{
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struct nv50_fb *fb = nv50_fb(base);
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if (fb->func->tags)
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return fb->func->tags(&fb->base);
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return 0;
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}
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static void *
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nv50_fb_dtor(struct nvkm_fb *base)
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{
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struct nv50_fb *fb = nv50_fb(base);
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struct nvkm_device *device = fb->base.subdev.device;
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if (fb->r100c08_page) {
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dma_unmap_page(device->dev, fb->r100c08, PAGE_SIZE,
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DMA_BIDIRECTIONAL);
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__free_page(fb->r100c08_page);
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}
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return fb;
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}
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static const struct nvkm_fb_func
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nv50_fb_ = {
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.dtor = nv50_fb_dtor,
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.tags = nv50_fb_tags,
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.oneinit = nv50_fb_oneinit,
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.init = nv50_fb_init,
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.intr = nv50_fb_intr,
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.ram_new = nv50_fb_ram_new,
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};
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int
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nv50_fb_new_(const struct nv50_fb_func *func, struct nvkm_device *device,
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enum nvkm_subdev_type type, int inst, struct nvkm_fb **pfb)
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{
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struct nv50_fb *fb;
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if (!(fb = kzalloc(sizeof(*fb), GFP_KERNEL)))
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return -ENOMEM;
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nvkm_fb_ctor(&nv50_fb_, device, type, inst, &fb->base);
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fb->func = func;
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*pfb = &fb->base;
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return 0;
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}
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static const struct nv50_fb_func
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nv50_fb = {
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.ram_new = nv50_ram_new,
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.tags = nv20_fb_tags,
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.trap = 0x000707ff,
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};
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int
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nv50_fb_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_fb **pfb)
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{
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return nv50_fb_new_(&nv50_fb, device, type, inst, pfb);
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}
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