134 lines
		
	
	
		
			3.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			134 lines
		
	
	
		
			3.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright (C) 2010 Francisco Jerez.
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 * All Rights Reserved.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining
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 * a copy of this software and associated documentation files (the
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 * "Software"), to deal in the Software without restriction, including
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 * without limitation the rights to use, copy, modify, merge, publish,
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 * distribute, sublicense, and/or sell copies of the Software, and to
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 * permit persons to whom the Software is furnished to do so, subject to
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 * the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the
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 * next paragraph) shall be included in all copies or substantial
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 * portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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 *
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 */
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#include "priv.h"
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#include "ram.h"
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void
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nv30_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch,
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		  u32 flags, struct nvkm_fb_tile *tile)
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{
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	/* for performance, select alternate bank offset for zeta */
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	if (!(flags & 4)) {
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		tile->addr = (0 << 4);
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	} else {
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		if (fb->func->tile.comp) /* z compression */
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			fb->func->tile.comp(fb, i, size, flags, tile);
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		tile->addr = (1 << 4);
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	}
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	tile->addr |= 0x00000001; /* enable */
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	tile->addr |= addr;
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	tile->limit = max(1u, addr + size) - 1;
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	tile->pitch = pitch;
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}
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static void
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nv30_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags,
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		  struct nvkm_fb_tile *tile)
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{
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	u32 tiles = DIV_ROUND_UP(size, 0x40);
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	u32 tags  = round_up(tiles / fb->ram->parts, 0x40);
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	if (!nvkm_mm_head(&fb->tags.mm, 0, 1, tags, tags, 1, &tile->tag)) {
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		if (flags & 2) tile->zcomp |= 0x01000000; /* Z16 */
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		else           tile->zcomp |= 0x02000000; /* Z24S8 */
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		tile->zcomp |= ((tile->tag->offset           ) >> 6);
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		tile->zcomp |= ((tile->tag->offset + tags - 1) >> 6) << 12;
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#ifdef __BIG_ENDIAN
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		tile->zcomp |= 0x10000000;
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#endif
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	}
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}
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static int
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calc_bias(struct nvkm_fb *fb, int k, int i, int j)
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{
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	struct nvkm_device *device = fb->subdev.device;
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	int b = (device->chipset > 0x30 ?
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		 nvkm_rd32(device, 0x122c + 0x10 * k + 0x4 * j) >>
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			(4 * (i ^ 1)) :
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		 0) & 0xf;
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	return 2 * (b & 0x8 ? b - 0x10 : b);
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}
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static int
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calc_ref(struct nvkm_fb *fb, int l, int k, int i)
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{
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	int j, x = 0;
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	for (j = 0; j < 4; j++) {
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		int m = (l >> (8 * i) & 0xff) + calc_bias(fb, k, i, j);
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		x |= (0x80 | clamp(m, 0, 0x1f)) << (8 * j);
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	}
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	return x;
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}
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void
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nv30_fb_init(struct nvkm_fb *fb)
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{
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	struct nvkm_device *device = fb->subdev.device;
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	int i, j;
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	/* Init the memory timing regs at 0x10037c/0x1003ac */
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	if (device->chipset == 0x30 ||
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	    device->chipset == 0x31 ||
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	    device->chipset == 0x35) {
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		/* Related to ROP count */
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		int n = (device->chipset == 0x31 ? 2 : 4);
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		int l = nvkm_rd32(device, 0x1003d0);
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		for (i = 0; i < n; i++) {
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			for (j = 0; j < 3; j++)
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				nvkm_wr32(device, 0x10037c + 0xc * i + 0x4 * j,
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					  calc_ref(fb, l, 0, j));
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			for (j = 0; j < 2; j++)
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				nvkm_wr32(device, 0x1003ac + 0x8 * i + 0x4 * j,
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					  calc_ref(fb, l, 1, j));
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		}
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	}
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}
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static const struct nvkm_fb_func
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nv30_fb = {
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	.tags = nv20_fb_tags,
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	.init = nv30_fb_init,
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	.tile.regions = 8,
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	.tile.init = nv30_fb_tile_init,
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	.tile.comp = nv30_fb_tile_comp,
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	.tile.fini = nv20_fb_tile_fini,
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	.tile.prog = nv20_fb_tile_prog,
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	.ram_new = nv20_ram_new,
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};
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int
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nv30_fb_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_fb **pfb)
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{
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	return nvkm_fb_new_(&nv30_fb, device, type, inst, pfb);
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}
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