601 lines
15 KiB
C
601 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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#include <linux/delay.h>
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#include <drm/drm_vblank.h>
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#include "msm_drv.h"
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#include "msm_gem.h"
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#include "msm_mmu.h"
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#include "mdp4_kms.h"
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static int mdp4_hw_init(struct msm_kms *kms)
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{
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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struct drm_device *dev = mdp4_kms->dev;
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u32 dmap_cfg, vg_cfg;
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unsigned long clk;
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pm_runtime_get_sync(dev->dev);
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if (mdp4_kms->rev > 1) {
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mdp4_write(mdp4_kms, REG_MDP4_CS_CONTROLLER0, 0x0707ffff);
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mdp4_write(mdp4_kms, REG_MDP4_CS_CONTROLLER1, 0x03073f3f);
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}
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mdp4_write(mdp4_kms, REG_MDP4_PORTMAP_MODE, 0x3);
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/* max read pending cmd config, 3 pending requests: */
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mdp4_write(mdp4_kms, REG_MDP4_READ_CNFG, 0x02222);
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clk = clk_get_rate(mdp4_kms->clk);
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if ((mdp4_kms->rev >= 1) || (clk >= 90000000)) {
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dmap_cfg = 0x47; /* 16 bytes-burst x 8 req */
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vg_cfg = 0x47; /* 16 bytes-burs x 8 req */
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} else {
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dmap_cfg = 0x27; /* 8 bytes-burst x 8 req */
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vg_cfg = 0x43; /* 16 bytes-burst x 4 req */
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}
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DBG("fetch config: dmap=%02x, vg=%02x", dmap_cfg, vg_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_DMA_FETCH_CONFIG(DMA_P), dmap_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_DMA_FETCH_CONFIG(DMA_E), dmap_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(VG1), vg_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(VG2), vg_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(RGB1), vg_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(RGB2), vg_cfg);
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if (mdp4_kms->rev >= 2)
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mdp4_write(mdp4_kms, REG_MDP4_LAYERMIXER_IN_CFG_UPDATE_METHOD, 1);
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mdp4_write(mdp4_kms, REG_MDP4_LAYERMIXER_IN_CFG, 0);
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/* disable CSC matrix / YUV by default: */
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(VG1), 0);
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(VG2), 0);
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mdp4_write(mdp4_kms, REG_MDP4_DMA_P_OP_MODE, 0);
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mdp4_write(mdp4_kms, REG_MDP4_DMA_S_OP_MODE, 0);
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mdp4_write(mdp4_kms, REG_MDP4_OVLP_CSC_CONFIG(1), 0);
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mdp4_write(mdp4_kms, REG_MDP4_OVLP_CSC_CONFIG(2), 0);
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if (mdp4_kms->rev > 1)
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mdp4_write(mdp4_kms, REG_MDP4_RESET_STATUS, 1);
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pm_runtime_put_sync(dev->dev);
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return 0;
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}
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static void mdp4_enable_commit(struct msm_kms *kms)
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{
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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mdp4_enable(mdp4_kms);
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}
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static void mdp4_disable_commit(struct msm_kms *kms)
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{
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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mdp4_disable(mdp4_kms);
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}
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static void mdp4_prepare_commit(struct msm_kms *kms, struct drm_atomic_state *state)
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{
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}
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static void mdp4_flush_commit(struct msm_kms *kms, unsigned crtc_mask)
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{
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/* TODO */
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}
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static void mdp4_wait_flush(struct msm_kms *kms, unsigned crtc_mask)
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{
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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struct drm_crtc *crtc;
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for_each_crtc_mask(mdp4_kms->dev, crtc, crtc_mask)
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mdp4_crtc_wait_for_commit_done(crtc);
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}
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static void mdp4_complete_commit(struct msm_kms *kms, unsigned crtc_mask)
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{
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}
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static long mdp4_round_pixclk(struct msm_kms *kms, unsigned long rate,
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struct drm_encoder *encoder)
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{
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/* if we had >1 encoder, we'd need something more clever: */
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switch (encoder->encoder_type) {
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case DRM_MODE_ENCODER_TMDS:
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return mdp4_dtv_round_pixclk(encoder, rate);
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case DRM_MODE_ENCODER_LVDS:
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case DRM_MODE_ENCODER_DSI:
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default:
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return rate;
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}
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}
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static void mdp4_destroy(struct msm_kms *kms)
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{
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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struct device *dev = mdp4_kms->dev->dev;
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struct msm_gem_address_space *aspace = kms->aspace;
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if (mdp4_kms->blank_cursor_iova)
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msm_gem_unpin_iova(mdp4_kms->blank_cursor_bo, kms->aspace);
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drm_gem_object_put(mdp4_kms->blank_cursor_bo);
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if (aspace) {
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aspace->mmu->funcs->detach(aspace->mmu);
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msm_gem_address_space_put(aspace);
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}
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if (mdp4_kms->rpm_enabled)
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pm_runtime_disable(dev);
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mdp_kms_destroy(&mdp4_kms->base);
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kfree(mdp4_kms);
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}
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static const struct mdp_kms_funcs kms_funcs = {
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.base = {
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.hw_init = mdp4_hw_init,
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.irq_preinstall = mdp4_irq_preinstall,
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.irq_postinstall = mdp4_irq_postinstall,
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.irq_uninstall = mdp4_irq_uninstall,
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.irq = mdp4_irq,
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.enable_vblank = mdp4_enable_vblank,
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.disable_vblank = mdp4_disable_vblank,
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.enable_commit = mdp4_enable_commit,
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.disable_commit = mdp4_disable_commit,
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.prepare_commit = mdp4_prepare_commit,
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.flush_commit = mdp4_flush_commit,
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.wait_flush = mdp4_wait_flush,
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.complete_commit = mdp4_complete_commit,
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.get_format = mdp_get_format,
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.round_pixclk = mdp4_round_pixclk,
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.destroy = mdp4_destroy,
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},
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.set_irqmask = mdp4_set_irqmask,
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};
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int mdp4_disable(struct mdp4_kms *mdp4_kms)
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{
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DBG("");
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clk_disable_unprepare(mdp4_kms->clk);
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clk_disable_unprepare(mdp4_kms->pclk);
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clk_disable_unprepare(mdp4_kms->lut_clk);
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clk_disable_unprepare(mdp4_kms->axi_clk);
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return 0;
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}
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int mdp4_enable(struct mdp4_kms *mdp4_kms)
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{
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DBG("");
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clk_prepare_enable(mdp4_kms->clk);
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clk_prepare_enable(mdp4_kms->pclk);
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clk_prepare_enable(mdp4_kms->lut_clk);
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clk_prepare_enable(mdp4_kms->axi_clk);
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return 0;
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}
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static int mdp4_modeset_init_intf(struct mdp4_kms *mdp4_kms,
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int intf_type)
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{
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struct drm_device *dev = mdp4_kms->dev;
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struct msm_drm_private *priv = dev->dev_private;
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struct drm_encoder *encoder;
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struct drm_connector *connector;
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struct device_node *panel_node;
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int dsi_id;
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int ret;
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switch (intf_type) {
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case DRM_MODE_ENCODER_LVDS:
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/*
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* bail out early if there is no panel node (no need to
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* initialize LCDC encoder and LVDS connector)
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*/
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panel_node = of_graph_get_remote_node(dev->dev->of_node, 0, 0);
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if (!panel_node)
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return 0;
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encoder = mdp4_lcdc_encoder_init(dev, panel_node);
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if (IS_ERR(encoder)) {
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DRM_DEV_ERROR(dev->dev, "failed to construct LCDC encoder\n");
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of_node_put(panel_node);
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return PTR_ERR(encoder);
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}
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/* LCDC can be hooked to DMA_P (TODO: Add DMA_S later?) */
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encoder->possible_crtcs = 1 << DMA_P;
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connector = mdp4_lvds_connector_init(dev, panel_node, encoder);
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if (IS_ERR(connector)) {
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DRM_DEV_ERROR(dev->dev, "failed to initialize LVDS connector\n");
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of_node_put(panel_node);
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return PTR_ERR(connector);
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}
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break;
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case DRM_MODE_ENCODER_TMDS:
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encoder = mdp4_dtv_encoder_init(dev);
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if (IS_ERR(encoder)) {
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DRM_DEV_ERROR(dev->dev, "failed to construct DTV encoder\n");
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return PTR_ERR(encoder);
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}
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/* DTV can be hooked to DMA_E: */
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encoder->possible_crtcs = 1 << 1;
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if (priv->hdmi) {
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/* Construct bridge/connector for HDMI: */
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ret = msm_hdmi_modeset_init(priv->hdmi, dev, encoder);
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if (ret) {
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DRM_DEV_ERROR(dev->dev, "failed to initialize HDMI: %d\n", ret);
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return ret;
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}
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}
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break;
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case DRM_MODE_ENCODER_DSI:
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/* only DSI1 supported for now */
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dsi_id = 0;
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if (!priv->dsi[dsi_id])
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break;
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encoder = mdp4_dsi_encoder_init(dev);
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if (IS_ERR(encoder)) {
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ret = PTR_ERR(encoder);
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DRM_DEV_ERROR(dev->dev,
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"failed to construct DSI encoder: %d\n", ret);
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return ret;
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}
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/* TODO: Add DMA_S later? */
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encoder->possible_crtcs = 1 << DMA_P;
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ret = msm_dsi_modeset_init(priv->dsi[dsi_id], dev, encoder);
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if (ret) {
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DRM_DEV_ERROR(dev->dev, "failed to initialize DSI: %d\n",
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ret);
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return ret;
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}
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break;
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default:
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DRM_DEV_ERROR(dev->dev, "Invalid or unsupported interface\n");
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return -EINVAL;
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}
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return 0;
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}
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static int modeset_init(struct mdp4_kms *mdp4_kms)
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{
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struct drm_device *dev = mdp4_kms->dev;
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struct msm_drm_private *priv = dev->dev_private;
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struct drm_plane *plane;
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struct drm_crtc *crtc;
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int i, ret;
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static const enum mdp4_pipe rgb_planes[] = {
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RGB1, RGB2,
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};
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static const enum mdp4_pipe vg_planes[] = {
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VG1, VG2,
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};
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static const enum mdp4_dma mdp4_crtcs[] = {
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DMA_P, DMA_E,
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};
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static const char * const mdp4_crtc_names[] = {
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"DMA_P", "DMA_E",
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};
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static const int mdp4_intfs[] = {
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DRM_MODE_ENCODER_LVDS,
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DRM_MODE_ENCODER_DSI,
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DRM_MODE_ENCODER_TMDS,
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};
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/* construct non-private planes: */
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for (i = 0; i < ARRAY_SIZE(vg_planes); i++) {
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plane = mdp4_plane_init(dev, vg_planes[i], false);
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if (IS_ERR(plane)) {
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DRM_DEV_ERROR(dev->dev,
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"failed to construct plane for VG%d\n", i + 1);
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ret = PTR_ERR(plane);
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goto fail;
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}
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}
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for (i = 0; i < ARRAY_SIZE(mdp4_crtcs); i++) {
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plane = mdp4_plane_init(dev, rgb_planes[i], true);
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if (IS_ERR(plane)) {
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DRM_DEV_ERROR(dev->dev,
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"failed to construct plane for RGB%d\n", i + 1);
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ret = PTR_ERR(plane);
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goto fail;
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}
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crtc = mdp4_crtc_init(dev, plane, priv->num_crtcs, i,
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mdp4_crtcs[i]);
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if (IS_ERR(crtc)) {
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DRM_DEV_ERROR(dev->dev, "failed to construct crtc for %s\n",
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mdp4_crtc_names[i]);
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ret = PTR_ERR(crtc);
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goto fail;
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}
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priv->crtcs[priv->num_crtcs++] = crtc;
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}
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/*
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* we currently set up two relatively fixed paths:
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*
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* LCDC/LVDS path: RGB1 -> DMA_P -> LCDC -> LVDS
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* or
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* DSI path: RGB1 -> DMA_P -> DSI1 -> DSI Panel
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*
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* DTV/HDMI path: RGB2 -> DMA_E -> DTV -> HDMI
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*/
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for (i = 0; i < ARRAY_SIZE(mdp4_intfs); i++) {
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ret = mdp4_modeset_init_intf(mdp4_kms, mdp4_intfs[i]);
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if (ret) {
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DRM_DEV_ERROR(dev->dev, "failed to initialize intf: %d, %d\n",
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i, ret);
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goto fail;
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}
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}
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return 0;
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fail:
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return ret;
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}
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static void read_mdp_hw_revision(struct mdp4_kms *mdp4_kms,
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u32 *major, u32 *minor)
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{
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struct drm_device *dev = mdp4_kms->dev;
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u32 version;
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mdp4_enable(mdp4_kms);
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version = mdp4_read(mdp4_kms, REG_MDP4_VERSION);
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mdp4_disable(mdp4_kms);
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*major = FIELD(version, MDP4_VERSION_MAJOR);
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*minor = FIELD(version, MDP4_VERSION_MINOR);
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DRM_DEV_INFO(dev->dev, "MDP4 version v%d.%d", *major, *minor);
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}
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static int mdp4_kms_init(struct drm_device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev->dev);
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struct msm_drm_private *priv = dev->dev_private;
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struct mdp4_kms *mdp4_kms;
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struct msm_kms *kms = NULL;
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struct iommu_domain *iommu;
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struct msm_gem_address_space *aspace;
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int irq, ret;
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u32 major, minor;
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unsigned long max_clk;
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/* TODO: Chips that aren't apq8064 have a 200 Mhz max_clk */
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max_clk = 266667000;
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mdp4_kms = kzalloc(sizeof(*mdp4_kms), GFP_KERNEL);
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if (!mdp4_kms) {
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DRM_DEV_ERROR(dev->dev, "failed to allocate kms\n");
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return -ENOMEM;
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}
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ret = mdp_kms_init(&mdp4_kms->base, &kms_funcs);
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if (ret) {
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DRM_DEV_ERROR(dev->dev, "failed to init kms\n");
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goto fail;
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}
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priv->kms = &mdp4_kms->base.base;
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kms = priv->kms;
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mdp4_kms->dev = dev;
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mdp4_kms->mmio = msm_ioremap(pdev, NULL);
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if (IS_ERR(mdp4_kms->mmio)) {
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ret = PTR_ERR(mdp4_kms->mmio);
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goto fail;
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}
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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ret = irq;
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DRM_DEV_ERROR(dev->dev, "failed to get irq: %d\n", ret);
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goto fail;
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}
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kms->irq = irq;
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/* NOTE: driver for this regulator still missing upstream.. use
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* _get_exclusive() and ignore the error if it does not exist
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* (and hope that the bootloader left it on for us)
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*/
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mdp4_kms->vdd = devm_regulator_get_exclusive(&pdev->dev, "vdd");
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if (IS_ERR(mdp4_kms->vdd))
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mdp4_kms->vdd = NULL;
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if (mdp4_kms->vdd) {
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ret = regulator_enable(mdp4_kms->vdd);
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if (ret) {
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DRM_DEV_ERROR(dev->dev, "failed to enable regulator vdd: %d\n", ret);
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goto fail;
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}
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}
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mdp4_kms->clk = devm_clk_get(&pdev->dev, "core_clk");
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if (IS_ERR(mdp4_kms->clk)) {
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DRM_DEV_ERROR(dev->dev, "failed to get core_clk\n");
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ret = PTR_ERR(mdp4_kms->clk);
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goto fail;
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}
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mdp4_kms->pclk = devm_clk_get(&pdev->dev, "iface_clk");
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if (IS_ERR(mdp4_kms->pclk))
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mdp4_kms->pclk = NULL;
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mdp4_kms->axi_clk = devm_clk_get(&pdev->dev, "bus_clk");
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if (IS_ERR(mdp4_kms->axi_clk)) {
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DRM_DEV_ERROR(dev->dev, "failed to get axi_clk\n");
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ret = PTR_ERR(mdp4_kms->axi_clk);
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goto fail;
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}
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|
|
clk_set_rate(mdp4_kms->clk, max_clk);
|
|
|
|
read_mdp_hw_revision(mdp4_kms, &major, &minor);
|
|
|
|
if (major != 4) {
|
|
DRM_DEV_ERROR(dev->dev, "unexpected MDP version: v%d.%d\n",
|
|
major, minor);
|
|
ret = -ENXIO;
|
|
goto fail;
|
|
}
|
|
|
|
mdp4_kms->rev = minor;
|
|
|
|
if (mdp4_kms->rev >= 2) {
|
|
mdp4_kms->lut_clk = devm_clk_get(&pdev->dev, "lut_clk");
|
|
if (IS_ERR(mdp4_kms->lut_clk)) {
|
|
DRM_DEV_ERROR(dev->dev, "failed to get lut_clk\n");
|
|
ret = PTR_ERR(mdp4_kms->lut_clk);
|
|
goto fail;
|
|
}
|
|
clk_set_rate(mdp4_kms->lut_clk, max_clk);
|
|
}
|
|
|
|
pm_runtime_enable(dev->dev);
|
|
mdp4_kms->rpm_enabled = true;
|
|
|
|
/* make sure things are off before attaching iommu (bootloader could
|
|
* have left things on, in which case we'll start getting faults if
|
|
* we don't disable):
|
|
*/
|
|
mdp4_enable(mdp4_kms);
|
|
mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 0);
|
|
mdp4_write(mdp4_kms, REG_MDP4_LCDC_ENABLE, 0);
|
|
mdp4_write(mdp4_kms, REG_MDP4_DSI_ENABLE, 0);
|
|
mdp4_disable(mdp4_kms);
|
|
mdelay(16);
|
|
|
|
iommu = iommu_domain_alloc(pdev->dev.bus);
|
|
if (iommu) {
|
|
struct msm_mmu *mmu = msm_iommu_new(&pdev->dev, iommu);
|
|
|
|
aspace = msm_gem_address_space_create(mmu,
|
|
"mdp4", 0x1000, 0x100000000 - 0x1000);
|
|
|
|
if (IS_ERR(aspace)) {
|
|
if (!IS_ERR(mmu))
|
|
mmu->funcs->destroy(mmu);
|
|
ret = PTR_ERR(aspace);
|
|
goto fail;
|
|
}
|
|
|
|
kms->aspace = aspace;
|
|
} else {
|
|
DRM_DEV_INFO(dev->dev, "no iommu, fallback to phys "
|
|
"contig buffers for scanout\n");
|
|
aspace = NULL;
|
|
}
|
|
|
|
ret = modeset_init(mdp4_kms);
|
|
if (ret) {
|
|
DRM_DEV_ERROR(dev->dev, "modeset_init failed: %d\n", ret);
|
|
goto fail;
|
|
}
|
|
|
|
mdp4_kms->blank_cursor_bo = msm_gem_new(dev, SZ_16K, MSM_BO_WC | MSM_BO_SCANOUT);
|
|
if (IS_ERR(mdp4_kms->blank_cursor_bo)) {
|
|
ret = PTR_ERR(mdp4_kms->blank_cursor_bo);
|
|
DRM_DEV_ERROR(dev->dev, "could not allocate blank-cursor bo: %d\n", ret);
|
|
mdp4_kms->blank_cursor_bo = NULL;
|
|
goto fail;
|
|
}
|
|
|
|
ret = msm_gem_get_and_pin_iova(mdp4_kms->blank_cursor_bo, kms->aspace,
|
|
&mdp4_kms->blank_cursor_iova);
|
|
if (ret) {
|
|
DRM_DEV_ERROR(dev->dev, "could not pin blank-cursor bo: %d\n", ret);
|
|
goto fail;
|
|
}
|
|
|
|
dev->mode_config.min_width = 0;
|
|
dev->mode_config.min_height = 0;
|
|
dev->mode_config.max_width = 2048;
|
|
dev->mode_config.max_height = 2048;
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
if (kms)
|
|
mdp4_destroy(kms);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct dev_pm_ops mdp4_pm_ops = {
|
|
.prepare = msm_pm_prepare,
|
|
.complete = msm_pm_complete,
|
|
};
|
|
|
|
static int mdp4_probe(struct platform_device *pdev)
|
|
{
|
|
return msm_drv_probe(&pdev->dev, mdp4_kms_init);
|
|
}
|
|
|
|
static int mdp4_remove(struct platform_device *pdev)
|
|
{
|
|
component_master_del(&pdev->dev, &msm_drm_ops);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id mdp4_dt_match[] = {
|
|
{ .compatible = "qcom,mdp4" },
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, mdp4_dt_match);
|
|
|
|
static struct platform_driver mdp4_platform_driver = {
|
|
.probe = mdp4_probe,
|
|
.remove = mdp4_remove,
|
|
.shutdown = msm_drv_shutdown,
|
|
.driver = {
|
|
.name = "mdp4",
|
|
.of_match_table = mdp4_dt_match,
|
|
.pm = &mdp4_pm_ops,
|
|
},
|
|
};
|
|
|
|
void __init msm_mdp4_register(void)
|
|
{
|
|
platform_driver_register(&mdp4_platform_driver);
|
|
}
|
|
|
|
void __exit msm_mdp4_unregister(void)
|
|
{
|
|
platform_driver_unregister(&mdp4_platform_driver);
|
|
}
|