82 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
			
		
		
	
	
			82 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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| %YAML 1.2
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| ---
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| $id: http://devicetree.org/schemas/reset/hisilicon,hi3660-reset.yaml#
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| $schema: http://devicetree.org/meta-schemas/core.yaml#
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| 
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| title: Hisilicon System Reset Controller
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| 
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| maintainers:
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|   - Wei Xu <xuwei5@hisilicon.com>
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| 
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| description: |
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|   Please also refer to reset.txt in this directory for common reset
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|   controller binding usage.
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|   The reset controller registers are part of the system-ctl block on
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|   hi3660 and hi3670 SoCs.
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| 
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| properties:
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|   compatible:
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|     oneOf:
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|       - items:
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|           - const: hisilicon,hi3660-reset
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|       - items:
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|           - const: hisilicon,hi3670-reset
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|           - const: hisilicon,hi3660-reset
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| 
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|   hisi,rst-syscon:
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|     deprecated: true
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|     description: phandle of the reset's syscon, use hisilicon,rst-syscon instead
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|     $ref: /schemas/types.yaml#/definitions/phandle
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| 
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|   hisilicon,rst-syscon:
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|     description: phandle of the reset's syscon.
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|     $ref: /schemas/types.yaml#/definitions/phandle
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| 
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|   '#reset-cells':
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|     description: |
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|       Specifies the number of cells needed to encode a reset source.
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|       Cell #1 : offset of the reset assert control register from the syscon
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|                 register base
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|                 offset + 4: deassert control register
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|                 offset + 8: status control register
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|       Cell #2 : bit position of the reset in the reset control register
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|     const: 2
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| 
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| required:
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|   - compatible
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| 
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| additionalProperties: false
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| 
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| examples:
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|   - |
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|     #include <dt-bindings/interrupt-controller/irq.h>
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|     #include <dt-bindings/interrupt-controller/arm-gic.h>
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|     #include <dt-bindings/clock/hi3660-clock.h>
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| 
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|     iomcu: iomcu@ffd7e000 {
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|         compatible = "hisilicon,hi3660-iomcu", "syscon";
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|         reg = <0xffd7e000 0x1000>;
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|     };
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| 
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|     iomcu_rst: iomcu_rst_controller {
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|         compatible = "hisilicon,hi3660-reset";
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|         hisilicon,rst-syscon = <&iomcu>;
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|         #reset-cells = <2>;
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|     };
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| 
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|     /* Specifying reset lines connected to IP modules */
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|     i2c@ffd71000 {
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|         compatible = "snps,designware-i2c";
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|         reg = <0xffd71000 0x1000>;
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|         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
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|         #address-cells = <1>;
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|         #size-cells = <0>;
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|         clock-frequency = <400000>;
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|         clocks = <&crg_ctrl HI3660_CLK_GATE_I2C0>;
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|         resets = <&iomcu_rst 0x20 3>;
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|         pinctrl-names = "default";
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|         pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>;
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|     };
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| ...
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