69 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
			
		
		
	
	
			69 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
| # SPDX-License-Identifier: GPL-2.0
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| %YAML 1.2
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| ---
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| $id: http://devicetree.org/schemas/reset/allwinner,sun6i-a31-clock-reset.yaml#
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| $schema: http://devicetree.org/meta-schemas/core.yaml#
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| 
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| title: Allwinner A31 Peripheral Reset Controller
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| 
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| maintainers:
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|   - Chen-Yu Tsai <wens@csie.org>
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|   - Maxime Ripard <mripard@kernel.org>
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| 
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| deprecated: true
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| 
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| select:
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|   properties:
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|     compatible:
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|       contains:
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|         enum:
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|           - allwinner,sun6i-a31-ahb1-reset
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|           - allwinner,sun6i-a31-clock-reset
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| 
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|   # The PRCM on the A31 and A23 will have the reg property missing,
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|   # since it's set at the upper level node, and will be validated by
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|   # PRCM's schema. Make sure we only validate standalone nodes.
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|   required:
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|     - compatible
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|     - reg
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| 
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| properties:
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|   "#reset-cells":
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|     const: 1
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|     description: >
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|       This additional argument passed to that reset controller is the
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|       offset of the bit controlling this particular reset line in the
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|       register.
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| 
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|   compatible:
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|     enum:
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|       - allwinner,sun6i-a31-ahb1-reset
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|       - allwinner,sun6i-a31-clock-reset
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| 
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|   reg:
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|     maxItems: 1
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| 
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| required:
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|   - "#reset-cells"
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|   - compatible
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|   - reg
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| 
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| additionalProperties: false
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| 
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| examples:
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|   - |
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|     ahb1_rst: reset@1c202c0 {
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|         #reset-cells = <1>;
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|         compatible = "allwinner,sun6i-a31-ahb1-reset";
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|         reg = <0x01c202c0 0xc>;
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|     };
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| 
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|   - |
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|     apbs_rst: reset@80014b0 {
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|         #reset-cells = <1>;
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|         compatible = "allwinner,sun6i-a31-clock-reset";
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|         reg = <0x080014b0 0x4>;
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|     };
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| 
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| ...
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