425 lines
		
	
	
		
			9.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			425 lines
		
	
	
		
			9.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Allwinner SoCs SRAM Controller Driver
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 *
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 * Copyright (C) 2015 Maxime Ripard
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 *
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 * Author: Maxime Ripard <maxime.ripard@free-electrons.com>
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 *
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 * This file is licensed under the terms of the GNU General Public
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 * License version 2.  This program is licensed "as is" without any
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 * warranty of any kind, whether express or implied.
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 */
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#include <linux/debugfs.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/soc/sunxi/sunxi_sram.h>
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struct sunxi_sram_func {
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	char	*func;
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	u8	val;
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	u32	reg_val;
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};
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struct sunxi_sram_data {
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	char			*name;
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	u8			reg;
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	u8			offset;
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	u8			width;
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	struct sunxi_sram_func	*func;
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	struct list_head	list;
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};
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struct sunxi_sram_desc {
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	struct sunxi_sram_data	data;
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	bool			claimed;
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};
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#define SUNXI_SRAM_MAP(_reg_val, _val, _func)			\
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	{							\
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		.func = _func,					\
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		.val = _val,					\
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		.reg_val = _reg_val,				\
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	}
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#define SUNXI_SRAM_DATA(_name, _reg, _off, _width, ...)		\
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	{							\
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		.name = _name,					\
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		.reg = _reg,					\
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		.offset = _off,					\
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		.width = _width,				\
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		.func = (struct sunxi_sram_func[]){		\
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			__VA_ARGS__, { } },			\
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	}
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static struct sunxi_sram_desc sun4i_a10_sram_a3_a4 = {
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	.data	= SUNXI_SRAM_DATA("A3-A4", 0x4, 0x4, 2,
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				  SUNXI_SRAM_MAP(0, 0, "cpu"),
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				  SUNXI_SRAM_MAP(1, 1, "emac")),
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};
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static struct sunxi_sram_desc sun4i_a10_sram_c1 = {
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	.data	= SUNXI_SRAM_DATA("C1", 0x0, 0x0, 31,
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				  SUNXI_SRAM_MAP(0, 0, "cpu"),
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				  SUNXI_SRAM_MAP(0x7fffffff, 1, "ve")),
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};
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static struct sunxi_sram_desc sun4i_a10_sram_d = {
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	.data	= SUNXI_SRAM_DATA("D", 0x4, 0x0, 1,
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				  SUNXI_SRAM_MAP(0, 0, "cpu"),
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				  SUNXI_SRAM_MAP(1, 1, "usb-otg")),
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};
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static struct sunxi_sram_desc sun50i_a64_sram_c = {
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	.data	= SUNXI_SRAM_DATA("C", 0x4, 24, 1,
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				  SUNXI_SRAM_MAP(1, 0, "cpu"),
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				  SUNXI_SRAM_MAP(0, 1, "de2")),
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};
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static const struct of_device_id sunxi_sram_dt_ids[] = {
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	{
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		.compatible	= "allwinner,sun4i-a10-sram-a3-a4",
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		.data		= &sun4i_a10_sram_a3_a4.data,
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	},
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	{
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		.compatible	= "allwinner,sun4i-a10-sram-c1",
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		.data		= &sun4i_a10_sram_c1.data,
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	},
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	{
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		.compatible	= "allwinner,sun4i-a10-sram-d",
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		.data		= &sun4i_a10_sram_d.data,
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	},
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	{
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		.compatible	= "allwinner,sun50i-a64-sram-c",
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		.data		= &sun50i_a64_sram_c.data,
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	},
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	{}
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};
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static struct device *sram_dev;
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static LIST_HEAD(claimed_sram);
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static DEFINE_SPINLOCK(sram_lock);
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static void __iomem *base;
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static int sunxi_sram_show(struct seq_file *s, void *data)
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{
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	struct device_node *sram_node, *section_node;
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	const struct sunxi_sram_data *sram_data;
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	const struct of_device_id *match;
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	struct sunxi_sram_func *func;
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	const __be32 *sram_addr_p, *section_addr_p;
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	u32 val;
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	seq_puts(s, "Allwinner sunXi SRAM\n");
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	seq_puts(s, "--------------------\n\n");
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	for_each_child_of_node(sram_dev->of_node, sram_node) {
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		sram_addr_p = of_get_address(sram_node, 0, NULL, NULL);
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		seq_printf(s, "sram@%08x\n",
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			   be32_to_cpu(*sram_addr_p));
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		for_each_child_of_node(sram_node, section_node) {
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			match = of_match_node(sunxi_sram_dt_ids, section_node);
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			if (!match)
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				continue;
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			sram_data = match->data;
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			section_addr_p = of_get_address(section_node, 0,
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							NULL, NULL);
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			seq_printf(s, "\tsection@%04x\t(%s)\n",
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				   be32_to_cpu(*section_addr_p),
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				   sram_data->name);
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			val = readl(base + sram_data->reg);
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			val >>= sram_data->offset;
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			val &= GENMASK(sram_data->width - 1, 0);
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			for (func = sram_data->func; func->func; func++) {
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				seq_printf(s, "\t\t%s%c\n", func->func,
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					   func->reg_val == val ?
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					   '*' : ' ');
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			}
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		}
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		seq_puts(s, "\n");
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	}
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	return 0;
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}
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DEFINE_SHOW_ATTRIBUTE(sunxi_sram);
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static inline struct sunxi_sram_desc *to_sram_desc(const struct sunxi_sram_data *data)
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{
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	return container_of(data, struct sunxi_sram_desc, data);
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}
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static const struct sunxi_sram_data *sunxi_sram_of_parse(struct device_node *node,
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							 unsigned int *reg_value)
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{
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	const struct of_device_id *match;
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	const struct sunxi_sram_data *data;
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	struct sunxi_sram_func *func;
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	struct of_phandle_args args;
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	u8 val;
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	int ret;
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	ret = of_parse_phandle_with_fixed_args(node, "allwinner,sram", 1, 0,
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					       &args);
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	if (ret)
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		return ERR_PTR(ret);
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	if (!of_device_is_available(args.np)) {
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		ret = -EBUSY;
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		goto err;
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	}
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	val = args.args[0];
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	match = of_match_node(sunxi_sram_dt_ids, args.np);
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	if (!match) {
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		ret = -EINVAL;
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		goto err;
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	}
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	data = match->data;
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	if (!data) {
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		ret = -EINVAL;
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		goto err;
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	}
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	for (func = data->func; func->func; func++) {
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		if (val == func->val) {
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			if (reg_value)
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				*reg_value = func->reg_val;
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			break;
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		}
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	}
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	if (!func->func) {
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		ret = -EINVAL;
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		goto err;
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	}
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	of_node_put(args.np);
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	return match->data;
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err:
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	of_node_put(args.np);
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	return ERR_PTR(ret);
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}
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int sunxi_sram_claim(struct device *dev)
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{
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	const struct sunxi_sram_data *sram_data;
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	struct sunxi_sram_desc *sram_desc;
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	unsigned int device;
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	u32 val, mask;
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	if (IS_ERR(base))
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		return PTR_ERR(base);
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	if (!base)
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		return -EPROBE_DEFER;
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	if (!dev || !dev->of_node)
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		return -EINVAL;
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	sram_data = sunxi_sram_of_parse(dev->of_node, &device);
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	if (IS_ERR(sram_data))
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		return PTR_ERR(sram_data);
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	sram_desc = to_sram_desc(sram_data);
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	spin_lock(&sram_lock);
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	if (sram_desc->claimed) {
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		spin_unlock(&sram_lock);
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		return -EBUSY;
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	}
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	mask = GENMASK(sram_data->offset + sram_data->width - 1,
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		       sram_data->offset);
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	val = readl(base + sram_data->reg);
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	val &= ~mask;
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	writel(val | ((device << sram_data->offset) & mask),
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	       base + sram_data->reg);
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	sram_desc->claimed = true;
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	spin_unlock(&sram_lock);
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	return 0;
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}
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EXPORT_SYMBOL(sunxi_sram_claim);
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void sunxi_sram_release(struct device *dev)
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{
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	const struct sunxi_sram_data *sram_data;
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	struct sunxi_sram_desc *sram_desc;
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	if (!dev || !dev->of_node)
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		return;
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	sram_data = sunxi_sram_of_parse(dev->of_node, NULL);
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	if (IS_ERR(sram_data))
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		return;
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	sram_desc = to_sram_desc(sram_data);
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	spin_lock(&sram_lock);
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	sram_desc->claimed = false;
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	spin_unlock(&sram_lock);
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}
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EXPORT_SYMBOL(sunxi_sram_release);
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struct sunxi_sramc_variant {
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	int num_emac_clocks;
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	bool has_ldo_ctrl;
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};
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static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = {
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	/* Nothing special */
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};
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static const struct sunxi_sramc_variant sun8i_h3_sramc_variant = {
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	.num_emac_clocks = 1,
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};
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static const struct sunxi_sramc_variant sun20i_d1_sramc_variant = {
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	.num_emac_clocks = 1,
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	.has_ldo_ctrl = true,
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};
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static const struct sunxi_sramc_variant sun50i_a64_sramc_variant = {
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	.num_emac_clocks = 1,
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};
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static const struct sunxi_sramc_variant sun50i_h616_sramc_variant = {
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	.num_emac_clocks = 2,
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};
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#define SUNXI_SRAM_EMAC_CLOCK_REG	0x30
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#define SUNXI_SYS_LDO_CTRL_REG		0x150
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static bool sunxi_sram_regmap_accessible_reg(struct device *dev,
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					     unsigned int reg)
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{
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	const struct sunxi_sramc_variant *variant = dev_get_drvdata(dev);
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	if (reg >= SUNXI_SRAM_EMAC_CLOCK_REG &&
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	    reg <  SUNXI_SRAM_EMAC_CLOCK_REG + variant->num_emac_clocks * 4)
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		return true;
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	if (reg == SUNXI_SYS_LDO_CTRL_REG && variant->has_ldo_ctrl)
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		return true;
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	return false;
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}
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static struct regmap_config sunxi_sram_regmap_config = {
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	.reg_bits       = 32,
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	.val_bits       = 32,
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	.reg_stride     = 4,
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	/* last defined register */
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	.max_register   = SUNXI_SYS_LDO_CTRL_REG,
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	/* other devices have no business accessing other registers */
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	.readable_reg	= sunxi_sram_regmap_accessible_reg,
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	.writeable_reg	= sunxi_sram_regmap_accessible_reg,
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};
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static int __init sunxi_sram_probe(struct platform_device *pdev)
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{
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	const struct sunxi_sramc_variant *variant;
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	struct device *dev = &pdev->dev;
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	struct regmap *regmap;
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	sram_dev = &pdev->dev;
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	variant = of_device_get_match_data(&pdev->dev);
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	if (!variant)
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		return -EINVAL;
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	dev_set_drvdata(dev, (struct sunxi_sramc_variant *)variant);
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	base = devm_platform_ioremap_resource(pdev, 0);
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	if (IS_ERR(base))
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		return PTR_ERR(base);
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	if (variant->num_emac_clocks || variant->has_ldo_ctrl) {
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		regmap = devm_regmap_init_mmio(dev, base, &sunxi_sram_regmap_config);
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		if (IS_ERR(regmap))
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			return PTR_ERR(regmap);
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	}
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	of_platform_populate(dev->of_node, NULL, NULL, dev);
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	debugfs_create_file("sram", 0444, NULL, NULL, &sunxi_sram_fops);
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	return 0;
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}
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static const struct of_device_id sunxi_sram_dt_match[] = {
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	{
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		.compatible = "allwinner,sun4i-a10-sram-controller",
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		.data = &sun4i_a10_sramc_variant,
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	},
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	{
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		.compatible = "allwinner,sun4i-a10-system-control",
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		.data = &sun4i_a10_sramc_variant,
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	},
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	{
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		.compatible = "allwinner,sun5i-a13-system-control",
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		.data = &sun4i_a10_sramc_variant,
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	},
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	{
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		.compatible = "allwinner,sun8i-a23-system-control",
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		.data = &sun4i_a10_sramc_variant,
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	},
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	{
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		.compatible = "allwinner,sun8i-h3-system-control",
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		.data = &sun8i_h3_sramc_variant,
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	},
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	{
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		.compatible = "allwinner,sun20i-d1-system-control",
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		.data = &sun20i_d1_sramc_variant,
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	},
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	{
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		.compatible = "allwinner,sun50i-a64-sram-controller",
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		.data = &sun50i_a64_sramc_variant,
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	},
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	{
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		.compatible = "allwinner,sun50i-a64-system-control",
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		.data = &sun50i_a64_sramc_variant,
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	},
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	{
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		.compatible = "allwinner,sun50i-h5-system-control",
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		.data = &sun50i_a64_sramc_variant,
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	},
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	{
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		.compatible = "allwinner,sun50i-h616-system-control",
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		.data = &sun50i_h616_sramc_variant,
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	},
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	{ },
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};
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MODULE_DEVICE_TABLE(of, sunxi_sram_dt_match);
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static struct platform_driver sunxi_sram_driver = {
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	.driver = {
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		.name		= "sunxi-sram",
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		.of_match_table	= sunxi_sram_dt_match,
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	},
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};
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builtin_platform_driver_probe(sunxi_sram_driver, sunxi_sram_probe);
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MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
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MODULE_DESCRIPTION("Allwinner sunXi SRAM Controller Driver");
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MODULE_LICENSE("GPL");
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