247 lines
		
	
	
		
			5.5 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
			
		
		
	
	
			247 lines
		
	
	
		
			5.5 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/media/qcom,msm8916-camss.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Qualcomm CAMSS ISP
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maintainers:
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  - Robert Foss <robert.foss@linaro.org>
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  - Todor Tomov <todor.too@gmail.com>
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description: |
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  The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
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properties:
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  compatible:
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    const: qcom,msm8916-camss
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  clocks:
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    minItems: 19
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    maxItems: 19
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  clock-names:
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    items:
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      - const: top_ahb
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      - const: ispif_ahb
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      - const: csiphy0_timer
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      - const: csiphy1_timer
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      - const: csi0_ahb
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      - const: csi0
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      - const: csi0_phy
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      - const: csi0_pix
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      - const: csi0_rdi
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      - const: csi1_ahb
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      - const: csi1
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      - const: csi1_phy
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      - const: csi1_pix
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      - const: csi1_rdi
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      - const: ahb
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      - const: vfe0
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      - const: csi_vfe0
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      - const: vfe_ahb
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      - const: vfe_axi
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  interrupts:
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    minItems: 6
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    maxItems: 6
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  interrupt-names:
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    items:
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      - const: csiphy0
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      - const: csiphy1
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      - const: csid0
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      - const: csid1
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      - const: ispif
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      - const: vfe0
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  iommus:
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    maxItems: 1
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  power-domains:
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    items:
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      - description: VFE GDSC - Video Front End, Global Distributed Switch Controller.
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  ports:
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    $ref: /schemas/graph.yaml#/properties/ports
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    description:
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      CSI input ports.
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    properties:
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      port@0:
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        $ref: /schemas/graph.yaml#/$defs/port-base
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        unevaluatedProperties: false
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        description:
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          Input port for receiving CSI data.
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        properties:
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          endpoint:
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            $ref: video-interfaces.yaml#
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            unevaluatedProperties: false
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            properties:
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              data-lanes:
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                description:
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                  An array of physical data lanes indexes.
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                  Position of an entry determines the logical
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                  lane number, while the value of an entry
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                  indicates physical lane index. Lane swapping
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                  is supported. Physical lane indexes;
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                  0, 2, 3, 4.
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                minItems: 1
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                maxItems: 4
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            required:
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              - data-lanes
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      port@1:
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        $ref: /schemas/graph.yaml#/$defs/port-base
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        unevaluatedProperties: false
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        description:
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          Input port for receiving CSI data.
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        properties:
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          endpoint:
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            $ref: video-interfaces.yaml#
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            unevaluatedProperties: false
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            properties:
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              data-lanes:
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                minItems: 1
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                maxItems: 4
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            required:
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              - data-lanes
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  reg:
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    minItems: 9
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    maxItems: 9
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  reg-names:
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    items:
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      - const: csiphy0
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      - const: csiphy0_clk_mux
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      - const: csiphy1
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      - const: csiphy1_clk_mux
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      - const: csid0
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      - const: csid1
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      - const: ispif
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      - const: csi_clk_mux
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      - const: vfe0
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  vdda-supply:
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    description:
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      Definition of the regulator used as analog power supply.
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required:
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  - clock-names
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  - clocks
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  - compatible
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  - interrupt-names
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  - interrupts
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  - iommus
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  - power-domains
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  - reg
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  - reg-names
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  - vdda-supply
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additionalProperties: false
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examples:
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  - |
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    #include <dt-bindings/interrupt-controller/arm-gic.h>
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    #include <dt-bindings/clock/qcom,gcc-msm8916.h>
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    camss: camss@1b00000 {
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      compatible = "qcom,msm8916-camss";
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      clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
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        <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
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        <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
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        <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
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        <&gcc GCC_CAMSS_CSI0_AHB_CLK>,
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        <&gcc GCC_CAMSS_CSI0_CLK>,
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        <&gcc GCC_CAMSS_CSI0PHY_CLK>,
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        <&gcc GCC_CAMSS_CSI0PIX_CLK>,
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        <&gcc GCC_CAMSS_CSI0RDI_CLK>,
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        <&gcc GCC_CAMSS_CSI1_AHB_CLK>,
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        <&gcc GCC_CAMSS_CSI1_CLK>,
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        <&gcc GCC_CAMSS_CSI1PHY_CLK>,
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        <&gcc GCC_CAMSS_CSI1PIX_CLK>,
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        <&gcc GCC_CAMSS_CSI1RDI_CLK>,
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        <&gcc GCC_CAMSS_AHB_CLK>,
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        <&gcc GCC_CAMSS_VFE0_CLK>,
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        <&gcc GCC_CAMSS_CSI_VFE0_CLK>,
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        <&gcc GCC_CAMSS_VFE_AHB_CLK>,
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        <&gcc GCC_CAMSS_VFE_AXI_CLK>;
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      clock-names = "top_ahb",
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        "ispif_ahb",
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        "csiphy0_timer",
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        "csiphy1_timer",
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        "csi0_ahb",
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        "csi0",
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        "csi0_phy",
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        "csi0_pix",
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        "csi0_rdi",
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        "csi1_ahb",
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        "csi1",
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        "csi1_phy",
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        "csi1_pix",
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        "csi1_rdi",
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        "ahb",
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        "vfe0",
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        "csi_vfe0",
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        "vfe_ahb",
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        "vfe_axi";
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      interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
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        <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
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        <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>,
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        <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>,
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        <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>,
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        <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
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      interrupt-names = "csiphy0",
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        "csiphy1",
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        "csid0",
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        "csid1",
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        "ispif",
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        "vfe0";
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      iommus = <&apps_iommu 3>;
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      power-domains = <&gcc VFE_GDSC>;
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      reg = <0x01b0ac00 0x200>,
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        <0x01b00030 0x4>,
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        <0x01b0b000 0x200>,
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        <0x01b00038 0x4>,
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        <0x01b08000 0x100>,
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        <0x01b08400 0x100>,
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        <0x01b0a000 0x500>,
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        <0x01b00020 0x10>,
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        <0x01b10000 0x1000>;
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      reg-names = "csiphy0",
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        "csiphy0_clk_mux",
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        "csiphy1",
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        "csiphy1_clk_mux",
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        "csid0",
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        "csid1",
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        "ispif",
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        "csi_clk_mux",
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        "vfe0";
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      vdda-supply = <®_2v8>;
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      ports {
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        #address-cells = <1>;
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        #size-cells = <0>;
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      };
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    };
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