90 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
			
		
		
	
	
			90 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			YAML
		
	
	
	
	
	
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/nxp,imx8-jpeg.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: i.MX8QXP/QM JPEG decoder/encoder
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maintainers:
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  - Mirela Rabulea <mirela.rabulea@nxp.com>
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description: |-
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  The JPEG decoder/encoder present in iMX8QXP and iMX8QM SoCs is an
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  ISO/IEC 10918-1 JPEG standard compliant decoder/encoder, for Baseline
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  and Extended Sequential DCT modes.
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properties:
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  compatible:
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    oneOf:
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      - items:
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          enum:
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            - nxp,imx8qxp-jpgdec
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            - nxp,imx8qxp-jpgenc
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      - items:
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          - const: nxp,imx8qm-jpgdec
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          - const: nxp,imx8qxp-jpgdec
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      - items:
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          - const: nxp,imx8qm-jpgenc
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          - const: nxp,imx8qxp-jpgenc
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  reg:
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    maxItems: 1
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  interrupts:
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    description: |
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      There are 4 slots available in the IP, which the driver may use
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      If a certain slot is used, it should have an associated interrupt
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      The interrupt with index i is assumed to be for slot i
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    minItems: 1               # At least one slot is needed by the driver
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    maxItems: 4               # The IP has 4 slots available for use
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  power-domains:
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    description:
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      List of phandle and PM domain specifier as documented in
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      Documentation/devicetree/bindings/power/power_domain.txt
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    minItems: 2               # Wrapper and 1 slot
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    maxItems: 5               # Wrapper and 4 slots
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required:
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  - compatible
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  - reg
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  - interrupts
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  - power-domains
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additionalProperties: false
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examples:
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  - |
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    #include <dt-bindings/interrupt-controller/arm-gic.h>
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    #include <dt-bindings/firmware/imx/rsrc.h>
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    jpegdec: jpegdec@58400000 {
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        compatible = "nxp,imx8qxp-jpgdec";
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        reg = <0x58400000 0x00050000 >;
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        interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
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                     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
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                     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
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                     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
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        power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
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                        <&pd IMX_SC_R_MJPEG_DEC_S0>,
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                        <&pd IMX_SC_R_MJPEG_DEC_S1>,
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                        <&pd IMX_SC_R_MJPEG_DEC_S2>,
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                        <&pd IMX_SC_R_MJPEG_DEC_S3>;
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    };
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    jpegenc: jpegenc@58450000 {
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        compatible = "nxp,imx8qm-jpgenc", "nxp,imx8qxp-jpgenc";
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        reg = <0x58450000 0x00050000 >;
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        interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
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                     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
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                     <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
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                     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
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        power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
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                        <&pd IMX_SC_R_MJPEG_ENC_S0>,
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                        <&pd IMX_SC_R_MJPEG_ENC_S1>,
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                        <&pd IMX_SC_R_MJPEG_ENC_S2>,
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                        <&pd IMX_SC_R_MJPEG_ENC_S3>;
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    };
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...
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