30 lines
1000 B
C
30 lines
1000 B
C
/* SPDX-License-Identifier: MIT */
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#ifndef __NV04_FIFO_CHAN_H__
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#define __NV04_FIFO_CHAN_H__
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#define nv04_fifo_chan(p) container_of((p), struct nv04_fifo_chan, base)
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#include "chan.h"
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#include "nv04.h"
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struct nv04_fifo_chan {
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struct nvkm_fifo_chan base;
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struct nv04_fifo *fifo;
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u32 ramfc;
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#define NV04_FIFO_ENGN_SW 0
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#define NV04_FIFO_ENGN_GR 1
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#define NV04_FIFO_ENGN_MPEG 2
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#define NV04_FIFO_ENGN_DMA 3
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struct nvkm_gpuobj *engn[NVKM_FIFO_ENGN_NR];
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};
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extern const struct nvkm_fifo_chan_func nv04_fifo_dma_func;
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void *nv04_fifo_dma_dtor(struct nvkm_fifo_chan *);
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void nv04_fifo_dma_init(struct nvkm_fifo_chan *);
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void nv04_fifo_dma_fini(struct nvkm_fifo_chan *);
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void nv04_fifo_dma_object_dtor(struct nvkm_fifo_chan *, int);
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extern const struct nvkm_fifo_chan_oclass nv04_fifo_dma_oclass;
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extern const struct nvkm_fifo_chan_oclass nv10_fifo_dma_oclass;
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extern const struct nvkm_fifo_chan_oclass nv17_fifo_dma_oclass;
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extern const struct nvkm_fifo_chan_oclass nv40_fifo_dma_oclass;
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#endif
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