53 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			53 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| # SPDX-License-Identifier: GPL-2.0-only
 | |
| config CLK_BAIKAL_T1
 | |
| 	bool "Baikal-T1 Clocks Control Unit interface"
 | |
| 	depends on (MIPS_BAIKAL_T1 && OF) || COMPILE_TEST
 | |
| 	default MIPS_BAIKAL_T1
 | |
| 	help
 | |
| 	  Clocks Control Unit is the core of Baikal-T1 SoC System Controller
 | |
| 	  responsible for the chip subsystems clocking and resetting. It
 | |
| 	  consists of multiple global clock domains, which can be reset by
 | |
| 	  means of the CCU control registers. These domains and devices placed
 | |
| 	  in them are fed with clocks generated by a hierarchy of PLLs,
 | |
| 	  configurable and fixed clock dividers. Enable this option to be able
 | |
| 	  to select Baikal-T1 CCU PLLs and Dividers drivers.
 | |
| 
 | |
| if CLK_BAIKAL_T1
 | |
| 
 | |
| config CLK_BT1_CCU_PLL
 | |
| 	bool "Baikal-T1 CCU PLLs support"
 | |
| 	select MFD_SYSCON
 | |
| 	default MIPS_BAIKAL_T1
 | |
| 	help
 | |
| 	  Enable this to support the PLLs embedded into the Baikal-T1 SoC
 | |
| 	  System Controller. These are five PLLs placed at the root of the
 | |
| 	  clocks hierarchy, right after an external reference oscillator
 | |
| 	  (normally of 25MHz). They are used to generate high frequency
 | |
| 	  signals, which are either directly wired to the consumers (like
 | |
| 	  CPUs, DDR, etc.) or passed over the clock dividers to be only
 | |
| 	  then used as an individual reference clock of a target device.
 | |
| 
 | |
| config CLK_BT1_CCU_DIV
 | |
| 	bool "Baikal-T1 CCU Dividers support"
 | |
| 	select MFD_SYSCON
 | |
| 	default MIPS_BAIKAL_T1
 | |
| 	help
 | |
| 	  Enable this to support the CCU dividers used to distribute clocks
 | |
| 	  between AXI-bus and system devices coming from CCU PLLs of Baikal-T1
 | |
| 	  SoC. CCU dividers can be either configurable or with fixed divider,
 | |
| 	  either gateable or ungateable. Some of the CCU dividers can be as well
 | |
| 	  used to reset the domains they're supplying clock to.
 | |
| 
 | |
| config CLK_BT1_CCU_RST
 | |
| 	bool "Baikal-T1 CCU Resets support"
 | |
| 	select RESET_CONTROLLER
 | |
| 	select MFD_SYSCON
 | |
| 	default MIPS_BAIKAL_T1
 | |
| 	help
 | |
| 	  Enable this to support the CCU reset blocks responsible for the
 | |
| 	  AXI-bus and some subsystems reset. These are mainly the
 | |
| 	  self-deasserted reset controls but there are several lines which
 | |
| 	  can be directly asserted/de-asserted (PCIe and DDR sub-domains).
 | |
| 
 | |
| endif
 |