94 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			94 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-only */
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| /*
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|  * omap-mcpdm.h
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|  *
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|  * Copyright (C) 2009 - 2011 Texas Instruments
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|  *
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|  * Contact: Misael Lopez Cruz <misael.lopez@ti.com>
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|  */
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| 
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| #ifndef __OMAP_MCPDM_H__
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| #define __OMAP_MCPDM_H__
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| 
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| #define MCPDM_REG_REVISION		0x00
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| #define MCPDM_REG_SYSCONFIG		0x10
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| #define MCPDM_REG_IRQSTATUS_RAW		0x24
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| #define MCPDM_REG_IRQSTATUS		0x28
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| #define MCPDM_REG_IRQENABLE_SET		0x2C
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| #define MCPDM_REG_IRQENABLE_CLR		0x30
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| #define MCPDM_REG_IRQWAKE_EN		0x34
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| #define MCPDM_REG_DMAENABLE_SET		0x38
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| #define MCPDM_REG_DMAENABLE_CLR		0x3C
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| #define MCPDM_REG_DMAWAKEEN		0x40
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| #define MCPDM_REG_CTRL			0x44
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| #define MCPDM_REG_DN_DATA		0x48
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| #define MCPDM_REG_UP_DATA		0x4C
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| #define MCPDM_REG_FIFO_CTRL_DN		0x50
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| #define MCPDM_REG_FIFO_CTRL_UP		0x54
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| #define MCPDM_REG_DN_OFFSET		0x58
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| 
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| /*
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|  * MCPDM_IRQ bit fields
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|  * IRQSTATUS_RAW, IRQSTATUS, IRQENABLE_SET, IRQENABLE_CLR
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|  */
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| 
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| #define MCPDM_DN_IRQ			(1 << 0)
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| #define MCPDM_DN_IRQ_EMPTY		(1 << 1)
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| #define MCPDM_DN_IRQ_ALMST_EMPTY	(1 << 2)
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| #define MCPDM_DN_IRQ_FULL		(1 << 3)
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| 
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| #define MCPDM_UP_IRQ			(1 << 8)
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| #define MCPDM_UP_IRQ_EMPTY		(1 << 9)
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| #define MCPDM_UP_IRQ_ALMST_FULL		(1 << 10)
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| #define MCPDM_UP_IRQ_FULL		(1 << 11)
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| 
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| #define MCPDM_DOWNLINK_IRQ_MASK		0x00F
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| #define MCPDM_UPLINK_IRQ_MASK		0xF00
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| 
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| /*
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|  * MCPDM_DMAENABLE bit fields
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|  */
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| 
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| #define MCPDM_DMA_DN_ENABLE		(1 << 0)
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| #define MCPDM_DMA_UP_ENABLE		(1 << 1)
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| 
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| /*
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|  * MCPDM_CTRL bit fields
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|  */
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| 
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| #define MCPDM_PDM_UPLINK_EN(x)		(1 << (x - 1)) /* ch1 is at bit 0 */
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| #define MCPDM_PDM_DOWNLINK_EN(x)	(1 << (x + 2)) /* ch1 is at bit 3 */
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| #define MCPDM_PDMOUTFORMAT		(1 << 8)
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| #define MCPDM_CMD_INT			(1 << 9)
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| #define MCPDM_STATUS_INT		(1 << 10)
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| #define MCPDM_SW_UP_RST			(1 << 11)
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| #define MCPDM_SW_DN_RST			(1 << 12)
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| #define MCPDM_WD_EN			(1 << 14)
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| #define MCPDM_PDM_UP_MASK		0x7
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| #define MCPDM_PDM_DN_MASK		(0x1f << 3)
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| 
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| 
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| #define MCPDM_PDMOUTFORMAT_LJUST	(0 << 8)
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| #define MCPDM_PDMOUTFORMAT_RJUST	(1 << 8)
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| 
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| /*
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|  * MCPDM_FIFO_CTRL bit fields
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|  */
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| 
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| #define MCPDM_UP_THRES_MAX		0xF
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| #define MCPDM_DN_THRES_MAX		0xF
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| 
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| /*
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|  * MCPDM_DN_OFFSET bit fields
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|  */
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| 
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| #define MCPDM_DN_OFST_RX1_EN		(1 << 0)
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| #define MCPDM_DNOFST_RX1(x)		((x & 0x1f) << 1)
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| #define MCPDM_DN_OFST_RX2_EN		(1 << 8)
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| #define MCPDM_DNOFST_RX2(x)		((x & 0x1f) << 9)
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| 
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| void omap_mcpdm_configure_dn_offsets(struct snd_soc_pcm_runtime *rtd,
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| 				    u8 rx1, u8 rx2);
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| 
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| #endif	/* End of __OMAP_MCPDM_H__ */
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