125 lines
4.7 KiB
C
Executable File
125 lines
4.7 KiB
C
Executable File
/*
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* Copyright (C) 2010-2017 ARM Limited. All rights reserved.
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*
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* This program is free software and is provided to you under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation, and any use by you of this program is subject to the terms of such GNU licence.
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*
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* A copy of the licence is included with the program, and can also be obtained from Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#ifndef __MALI_MMU_H__
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#define __MALI_MMU_H__
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#include "mali_osk.h"
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#include "mali_mmu_page_directory.h"
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#include "mali_hw_core.h"
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/* Forward declaration from mali_group.h */
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struct mali_group;
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/**
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* MMU register numbers
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* Used in the register read/write routines.
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* See the hardware documentation for more information about each register
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*/
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typedef enum mali_mmu_register {
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MALI_MMU_REGISTER_DTE_ADDR = 0x0000, /**< Current Page Directory Pointer */
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MALI_MMU_REGISTER_STATUS = 0x0004, /**< Status of the MMU */
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MALI_MMU_REGISTER_COMMAND = 0x0008, /**< Command register, used to control the MMU */
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MALI_MMU_REGISTER_PAGE_FAULT_ADDR = 0x000C, /**< Logical address of the last page fault */
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MALI_MMU_REGISTER_ZAP_ONE_LINE = 0x010, /**< Used to invalidate the mapping of a single page from the MMU */
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MALI_MMU_REGISTER_INT_RAWSTAT = 0x0014, /**< Raw interrupt status, all interrupts visible */
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MALI_MMU_REGISTER_INT_CLEAR = 0x0018, /**< Indicate to the MMU that the interrupt has been received */
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MALI_MMU_REGISTER_INT_MASK = 0x001C, /**< Enable/disable types of interrupts */
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MALI_MMU_REGISTER_INT_STATUS = 0x0020 /**< Interrupt status based on the mask */
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} mali_mmu_register;
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/**
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* MMU interrupt register bits
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* Each cause of the interrupt is reported
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* through the (raw) interrupt status registers.
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* Multiple interrupts can be pending, so multiple bits
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* can be set at once.
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*/
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typedef enum mali_mmu_interrupt {
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MALI_MMU_INTERRUPT_PAGE_FAULT = 0x01, /**< A page fault occured */
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MALI_MMU_INTERRUPT_READ_BUS_ERROR = 0x02 /**< A bus read error occured */
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} mali_mmu_interrupt;
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typedef enum mali_mmu_status_bits {
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MALI_MMU_STATUS_BIT_PAGING_ENABLED = 1 << 0,
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MALI_MMU_STATUS_BIT_PAGE_FAULT_ACTIVE = 1 << 1,
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MALI_MMU_STATUS_BIT_STALL_ACTIVE = 1 << 2,
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MALI_MMU_STATUS_BIT_IDLE = 1 << 3,
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MALI_MMU_STATUS_BIT_REPLAY_BUFFER_EMPTY = 1 << 4,
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MALI_MMU_STATUS_BIT_PAGE_FAULT_IS_WRITE = 1 << 5,
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MALI_MMU_STATUS_BIT_STALL_NOT_ACTIVE = 1 << 31,
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} mali_mmu_status_bits;
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/**
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* Definition of the MMU struct
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* Used to track a MMU unit in the system.
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* Contains information about the mapping of the registers
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*/
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struct mali_mmu_core {
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struct mali_hw_core hw_core; /**< Common for all HW cores */
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_mali_osk_irq_t *irq; /**< IRQ handler */
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};
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_mali_osk_errcode_t mali_mmu_initialize(void);
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void mali_mmu_terminate(void);
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struct mali_mmu_core *mali_mmu_create(_mali_osk_resource_t *resource, struct mali_group *group, mali_bool is_virtual);
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void mali_mmu_delete(struct mali_mmu_core *mmu);
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_mali_osk_errcode_t mali_mmu_reset(struct mali_mmu_core *mmu);
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mali_bool mali_mmu_zap_tlb(struct mali_mmu_core *mmu);
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void mali_mmu_zap_tlb_without_stall(struct mali_mmu_core *mmu);
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void mali_mmu_invalidate_page(struct mali_mmu_core *mmu, u32 mali_address);
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void mali_mmu_activate_page_directory(struct mali_mmu_core *mmu, struct mali_page_directory *pagedir);
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void mali_mmu_activate_empty_page_directory(struct mali_mmu_core *mmu);
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void mali_mmu_activate_fault_flush_page_directory(struct mali_mmu_core *mmu);
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void mali_mmu_page_fault_done(struct mali_mmu_core *mmu);
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MALI_STATIC_INLINE enum mali_interrupt_result mali_mmu_get_interrupt_result(struct mali_mmu_core *mmu)
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{
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u32 rawstat_used = mali_hw_core_register_read(&mmu->hw_core, MALI_MMU_REGISTER_INT_RAWSTAT);
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if (0 == rawstat_used) {
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return MALI_INTERRUPT_RESULT_NONE;
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}
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return MALI_INTERRUPT_RESULT_ERROR;
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}
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MALI_STATIC_INLINE u32 mali_mmu_get_int_status(struct mali_mmu_core *mmu)
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{
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return mali_hw_core_register_read(&mmu->hw_core, MALI_MMU_REGISTER_INT_STATUS);
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}
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MALI_STATIC_INLINE u32 mali_mmu_get_rawstat(struct mali_mmu_core *mmu)
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{
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return mali_hw_core_register_read(&mmu->hw_core, MALI_MMU_REGISTER_INT_RAWSTAT);
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}
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MALI_STATIC_INLINE void mali_mmu_mask_all_interrupts(struct mali_mmu_core *mmu)
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{
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mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_INT_MASK, 0);
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}
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MALI_STATIC_INLINE u32 mali_mmu_get_status(struct mali_mmu_core *mmu)
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{
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return mali_hw_core_register_read(&mmu->hw_core, MALI_MMU_REGISTER_STATUS);
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}
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MALI_STATIC_INLINE u32 mali_mmu_get_page_fault_addr(struct mali_mmu_core *mmu)
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{
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return mali_hw_core_register_read(&mmu->hw_core, MALI_MMU_REGISTER_PAGE_FAULT_ADDR);
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}
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#endif /* __MALI_MMU_H__ */
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