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			706 B
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			20 lines
		
	
	
		
			706 B
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| # SPDX-License-Identifier: GPL-2.0
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| config CLK_INTEL_SOCFPGA
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| 	bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_INTEL_SOCFPGA
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| 	default ARCH_INTEL_SOCFPGA
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| 	help
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| 	  Support for the clock controllers present on Intel SoCFPGA and eASIC
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| 	  devices like Aria, Cyclone, Stratix 10, Agilex and N5X eASIC.
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| 
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| if CLK_INTEL_SOCFPGA
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| 
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| config CLK_INTEL_SOCFPGA32
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| 	bool "Intel Aria / Cyclone clock controller support" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA)
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| 	default ARM && ARCH_INTEL_SOCFPGA
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| 
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| config CLK_INTEL_SOCFPGA64
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| 	bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && (!ARM64 || !ARCH_INTEL_SOCFPGA)
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| 	default ARM64 && ARCH_INTEL_SOCFPGA
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| 
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| endif # CLK_INTEL_SOCFPGA
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