403 lines
		
	
	
		
			11 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			403 lines
		
	
	
		
			11 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0
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| //
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| // MediaTek ALSA SoC Audio DAI ADDA Control
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| //
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| // Copyright (c) 2018 MediaTek Inc.
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| // Author: KaiChieh Chuang <kaichieh.chuang@mediatek.com>
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| 
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| #include <linux/regmap.h>
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| #include <linux/delay.h>
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| #include "mt6797-afe-common.h"
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| #include "mt6797-interconnection.h"
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| #include "mt6797-reg.h"
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| 
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| enum {
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| 	MTK_AFE_ADDA_DL_RATE_8K = 0,
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| 	MTK_AFE_ADDA_DL_RATE_11K = 1,
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| 	MTK_AFE_ADDA_DL_RATE_12K = 2,
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| 	MTK_AFE_ADDA_DL_RATE_16K = 3,
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| 	MTK_AFE_ADDA_DL_RATE_22K = 4,
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| 	MTK_AFE_ADDA_DL_RATE_24K = 5,
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| 	MTK_AFE_ADDA_DL_RATE_32K = 6,
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| 	MTK_AFE_ADDA_DL_RATE_44K = 7,
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| 	MTK_AFE_ADDA_DL_RATE_48K = 8,
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| 	MTK_AFE_ADDA_DL_RATE_96K = 9,
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| 	MTK_AFE_ADDA_DL_RATE_192K = 10,
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| };
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| 
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| enum {
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| 	MTK_AFE_ADDA_UL_RATE_8K = 0,
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| 	MTK_AFE_ADDA_UL_RATE_16K = 1,
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| 	MTK_AFE_ADDA_UL_RATE_32K = 2,
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| 	MTK_AFE_ADDA_UL_RATE_48K = 3,
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| 	MTK_AFE_ADDA_UL_RATE_96K = 4,
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| 	MTK_AFE_ADDA_UL_RATE_192K = 5,
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| 	MTK_AFE_ADDA_UL_RATE_48K_HD = 6,
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| };
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| 
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| static unsigned int adda_dl_rate_transform(struct mtk_base_afe *afe,
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| 					   unsigned int rate)
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| {
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| 	switch (rate) {
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| 	case 8000:
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| 		return MTK_AFE_ADDA_DL_RATE_8K;
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| 	case 11025:
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| 		return MTK_AFE_ADDA_DL_RATE_11K;
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| 	case 12000:
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| 		return MTK_AFE_ADDA_DL_RATE_12K;
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| 	case 16000:
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| 		return MTK_AFE_ADDA_DL_RATE_16K;
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| 	case 22050:
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| 		return MTK_AFE_ADDA_DL_RATE_22K;
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| 	case 24000:
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| 		return MTK_AFE_ADDA_DL_RATE_24K;
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| 	case 32000:
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| 		return MTK_AFE_ADDA_DL_RATE_32K;
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| 	case 44100:
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| 		return MTK_AFE_ADDA_DL_RATE_44K;
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| 	case 48000:
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| 		return MTK_AFE_ADDA_DL_RATE_48K;
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| 	case 96000:
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| 		return MTK_AFE_ADDA_DL_RATE_96K;
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| 	case 192000:
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| 		return MTK_AFE_ADDA_DL_RATE_192K;
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| 	default:
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| 		dev_warn(afe->dev, "%s(), rate %d invalid, use 48kHz!!!\n",
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| 			 __func__, rate);
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| 		return MTK_AFE_ADDA_DL_RATE_48K;
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| 	}
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| }
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| 
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| static unsigned int adda_ul_rate_transform(struct mtk_base_afe *afe,
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| 					   unsigned int rate)
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| {
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| 	switch (rate) {
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| 	case 8000:
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| 		return MTK_AFE_ADDA_UL_RATE_8K;
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| 	case 16000:
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| 		return MTK_AFE_ADDA_UL_RATE_16K;
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| 	case 32000:
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| 		return MTK_AFE_ADDA_UL_RATE_32K;
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| 	case 48000:
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| 		return MTK_AFE_ADDA_UL_RATE_48K;
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| 	case 96000:
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| 		return MTK_AFE_ADDA_UL_RATE_96K;
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| 	case 192000:
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| 		return MTK_AFE_ADDA_UL_RATE_192K;
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| 	default:
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| 		dev_warn(afe->dev, "%s(), rate %d invalid, use 48kHz!!!\n",
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| 			 __func__, rate);
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| 		return MTK_AFE_ADDA_UL_RATE_48K;
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| 	}
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| }
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| 
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| /* dai component */
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| static const struct snd_kcontrol_new mtk_adda_dl_ch1_mix[] = {
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| 	SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN3, I_DL1_CH1, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1", AFE_CONN3, I_DL2_CH1, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1", AFE_CONN3, I_DL3_CH1, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN3,
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| 				    I_ADDA_UL_CH2, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN3,
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| 				    I_ADDA_UL_CH1, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1", AFE_CONN3,
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| 				    I_PCM_1_CAP_CH1, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH1", AFE_CONN3,
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| 				    I_PCM_2_CAP_CH1, 1, 0),
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| };
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| 
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| static const struct snd_kcontrol_new mtk_adda_dl_ch2_mix[] = {
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| 	SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN4, I_DL1_CH1, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH2", AFE_CONN4, I_DL1_CH2, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1", AFE_CONN4, I_DL2_CH1, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2", AFE_CONN4, I_DL2_CH2, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1", AFE_CONN4, I_DL3_CH1, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH2", AFE_CONN4, I_DL3_CH2, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN4,
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| 				    I_ADDA_UL_CH2, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN4,
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| 				    I_ADDA_UL_CH1, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1", AFE_CONN4,
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| 				    I_PCM_1_CAP_CH1, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH1", AFE_CONN4,
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| 				    I_PCM_2_CAP_CH1, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH2", AFE_CONN4,
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| 				    I_PCM_1_CAP_CH2, 1, 0),
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| 	SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH2", AFE_CONN4,
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| 				    I_PCM_2_CAP_CH2, 1, 0),
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| };
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| 
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| static int mtk_adda_ul_event(struct snd_soc_dapm_widget *w,
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| 			     struct snd_kcontrol *kcontrol,
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| 			     int event)
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| {
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| 	struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
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| 	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
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| 
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| 	dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n",
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| 		__func__, w->name, event);
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| 
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| 	switch (event) {
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| 	case SND_SOC_DAPM_POST_PMD:
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| 		/* should delayed 1/fs(smallest is 8k) = 125us before afe off */
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| 		usleep_range(125, 135);
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| 		break;
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| 	default:
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| 		break;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| enum {
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| 	SUPPLY_SEQ_AUD_TOP_PDN,
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| 	SUPPLY_SEQ_ADDA_AFE_ON,
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| 	SUPPLY_SEQ_ADDA_DL_ON,
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| 	SUPPLY_SEQ_ADDA_UL_ON,
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| };
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| 
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| static const struct snd_soc_dapm_widget mtk_dai_adda_widgets[] = {
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| 	/* adda */
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| 	SND_SOC_DAPM_MIXER("ADDA_DL_CH1", SND_SOC_NOPM, 0, 0,
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| 			   mtk_adda_dl_ch1_mix,
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| 			   ARRAY_SIZE(mtk_adda_dl_ch1_mix)),
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| 	SND_SOC_DAPM_MIXER("ADDA_DL_CH2", SND_SOC_NOPM, 0, 0,
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| 			   mtk_adda_dl_ch2_mix,
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| 			   ARRAY_SIZE(mtk_adda_dl_ch2_mix)),
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| 
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| 	SND_SOC_DAPM_SUPPLY_S("ADDA Enable", SUPPLY_SEQ_ADDA_AFE_ON,
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| 			      AFE_ADDA_UL_DL_CON0, ADDA_AFE_ON_SFT, 0,
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| 			      NULL, 0),
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| 
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| 	SND_SOC_DAPM_SUPPLY_S("ADDA Playback Enable", SUPPLY_SEQ_ADDA_DL_ON,
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| 			      AFE_ADDA_DL_SRC2_CON0,
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| 			      DL_2_SRC_ON_TMP_CTL_PRE_SFT, 0,
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| 			      NULL, 0),
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| 
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| 	SND_SOC_DAPM_SUPPLY_S("ADDA Capture Enable", SUPPLY_SEQ_ADDA_UL_ON,
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| 			      AFE_ADDA_UL_SRC_CON0,
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| 			      UL_SRC_ON_TMP_CTL_SFT, 0,
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| 			      mtk_adda_ul_event,
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| 			      SND_SOC_DAPM_POST_PMD),
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| 
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| 	SND_SOC_DAPM_SUPPLY_S("aud_dac_clk", SUPPLY_SEQ_AUD_TOP_PDN,
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| 			      AUDIO_TOP_CON0, PDN_DAC_SFT, 1,
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| 			      NULL, 0),
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| 	SND_SOC_DAPM_SUPPLY_S("aud_dac_predis_clk", SUPPLY_SEQ_AUD_TOP_PDN,
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| 			      AUDIO_TOP_CON0, PDN_DAC_PREDIS_SFT, 1,
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| 			      NULL, 0),
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| 
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| 	SND_SOC_DAPM_SUPPLY_S("aud_adc_clk", SUPPLY_SEQ_AUD_TOP_PDN,
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| 			      AUDIO_TOP_CON0, PDN_ADC_SFT, 1,
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| 			      NULL, 0),
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| 
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| 	SND_SOC_DAPM_CLOCK_SUPPLY("mtkaif_26m_clk"),
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| };
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| 
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| static const struct snd_soc_dapm_route mtk_dai_adda_routes[] = {
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| 	/* playback */
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| 	{"ADDA_DL_CH1", "DL1_CH1", "DL1"},
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| 	{"ADDA_DL_CH2", "DL1_CH1", "DL1"},
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| 	{"ADDA_DL_CH2", "DL1_CH2", "DL1"},
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| 
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| 	{"ADDA_DL_CH1", "DL2_CH1", "DL2"},
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| 	{"ADDA_DL_CH2", "DL2_CH1", "DL2"},
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| 	{"ADDA_DL_CH2", "DL2_CH2", "DL2"},
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| 
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| 	{"ADDA_DL_CH1", "DL3_CH1", "DL3"},
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| 	{"ADDA_DL_CH2", "DL3_CH1", "DL3"},
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| 	{"ADDA_DL_CH2", "DL3_CH2", "DL3"},
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| 
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| 	{"ADDA Playback", NULL, "ADDA_DL_CH1"},
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| 	{"ADDA Playback", NULL, "ADDA_DL_CH2"},
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| 
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| 	/* adda enable */
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| 	{"ADDA Playback", NULL, "ADDA Enable"},
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| 	{"ADDA Playback", NULL, "ADDA Playback Enable"},
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| 	{"ADDA Capture", NULL, "ADDA Enable"},
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| 	{"ADDA Capture", NULL, "ADDA Capture Enable"},
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| 
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| 	/* clk */
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| 	{"ADDA Playback", NULL, "mtkaif_26m_clk"},
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| 	{"ADDA Playback", NULL, "aud_dac_clk"},
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| 	{"ADDA Playback", NULL, "aud_dac_predis_clk"},
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| 
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| 	{"ADDA Capture", NULL, "mtkaif_26m_clk"},
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| 	{"ADDA Capture", NULL, "aud_adc_clk"},
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| };
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| 
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| /* dai ops */
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| static int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream,
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| 				  struct snd_pcm_hw_params *params,
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| 				  struct snd_soc_dai *dai)
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| {
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| 	struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
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| 	unsigned int rate = params_rate(params);
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| 
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| 	dev_dbg(afe->dev, "%s(), id %d, stream %d, rate %d\n",
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| 		__func__, dai->id, substream->stream, rate);
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| 
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| 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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| 		unsigned int dl_src2_con0 = 0;
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| 		unsigned int dl_src2_con1 = 0;
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| 
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| 		/* clean predistortion */
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| 		regmap_write(afe->regmap, AFE_ADDA_PREDIS_CON0, 0);
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| 		regmap_write(afe->regmap, AFE_ADDA_PREDIS_CON1, 0);
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| 
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| 		/* set input sampling rate */
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| 		dl_src2_con0 = adda_dl_rate_transform(afe, rate) << 28;
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| 
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| 		/* set output mode */
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| 		switch (rate) {
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| 		case 192000:
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| 			dl_src2_con0 |= (0x1 << 24); /* UP_SAMPLING_RATE_X2 */
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| 			dl_src2_con0 |= 1 << 14;
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| 			break;
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| 		case 96000:
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| 			dl_src2_con0 |= (0x2 << 24); /* UP_SAMPLING_RATE_X4 */
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| 			dl_src2_con0 |= 1 << 14;
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| 			break;
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| 		default:
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| 			dl_src2_con0 |= (0x3 << 24); /* UP_SAMPLING_RATE_X8 */
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| 			break;
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| 		}
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| 
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| 		/* turn off mute function */
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| 		dl_src2_con0 |= (0x03 << 11);
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| 
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| 		/* set voice input data if input sample rate is 8k or 16k */
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| 		if (rate == 8000 || rate == 16000)
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| 			dl_src2_con0 |= 0x01 << 5;
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| 
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| 		if (rate < 96000) {
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| 			/* SA suggest apply -0.3db to audio/speech path */
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| 			dl_src2_con1 = 0xf74f0000;
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| 		} else {
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| 			/* SA suggest apply -0.3db to audio/speech path
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| 			 * with DL gain set to half,
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| 			 * 0xFFFF = 0dB -> 0x8000 = 0dB when 96k, 192k
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| 			 */
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| 			dl_src2_con1 = 0x7ba70000;
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| 		}
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| 
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| 		/* turn on down-link gain */
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| 		dl_src2_con0 = dl_src2_con0 | (0x01 << 1);
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| 
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| 		regmap_write(afe->regmap, AFE_ADDA_DL_SRC2_CON0, dl_src2_con0);
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| 		regmap_write(afe->regmap, AFE_ADDA_DL_SRC2_CON1, dl_src2_con1);
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| 	} else {
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| 		unsigned int voice_mode = 0;
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| 		unsigned int ul_src_con0 = 0;	/* default value */
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| 
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| 		/* Using Internal ADC */
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| 		regmap_update_bits(afe->regmap,
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| 				   AFE_ADDA_TOP_CON0,
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| 				   0x1 << 0,
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| 				   0x0 << 0);
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| 
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| 		voice_mode = adda_ul_rate_transform(afe, rate);
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| 
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| 		ul_src_con0 |= (voice_mode << 17) & (0x7 << 17);
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| 
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| 		/* up8x txif sat on */
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| 		regmap_write(afe->regmap, AFE_ADDA_NEWIF_CFG0, 0x03F87201);
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| 
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| 		if (rate >= 96000) {	/* hires */
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| 			/* use hires format [1 0 23] */
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| 			regmap_update_bits(afe->regmap,
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| 					   AFE_ADDA_NEWIF_CFG0,
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| 					   0x1 << 5,
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| 					   0x1 << 5);
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| 
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| 			regmap_update_bits(afe->regmap,
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| 					   AFE_ADDA_NEWIF_CFG2,
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| 					   0xf << 28,
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| 					   voice_mode << 28);
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| 		} else {	/* normal 8~48k */
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| 			/* use fixed 260k anc path */
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| 			regmap_update_bits(afe->regmap,
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| 					   AFE_ADDA_NEWIF_CFG2,
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| 					   0xf << 28,
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| 					   8 << 28);
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| 
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| 			/* ul_use_cic_out */
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| 			ul_src_con0 |= 0x1 << 20;
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| 		}
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| 
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| 		regmap_update_bits(afe->regmap,
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| 				   AFE_ADDA_NEWIF_CFG2,
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| 				   0xf << 28,
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| 				   8 << 28);
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| 
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| 		regmap_update_bits(afe->regmap,
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| 				   AFE_ADDA_UL_SRC_CON0,
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| 				   0xfffffffe,
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| 				   ul_src_con0);
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static const struct snd_soc_dai_ops mtk_dai_adda_ops = {
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| 	.hw_params = mtk_dai_adda_hw_params,
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| };
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| 
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| /* dai driver */
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| #define MTK_ADDA_PLAYBACK_RATES (SNDRV_PCM_RATE_8000_48000 |\
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| 				 SNDRV_PCM_RATE_96000 |\
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| 				 SNDRV_PCM_RATE_192000)
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| 
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| #define MTK_ADDA_CAPTURE_RATES (SNDRV_PCM_RATE_8000 |\
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| 				SNDRV_PCM_RATE_16000 |\
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| 				SNDRV_PCM_RATE_32000 |\
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| 				SNDRV_PCM_RATE_48000 |\
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| 				SNDRV_PCM_RATE_96000 |\
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| 				SNDRV_PCM_RATE_192000)
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| 
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| #define MTK_ADDA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
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| 			  SNDRV_PCM_FMTBIT_S24_LE |\
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| 			  SNDRV_PCM_FMTBIT_S32_LE)
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| 
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| static struct snd_soc_dai_driver mtk_dai_adda_driver[] = {
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| 	{
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| 		.name = "ADDA",
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| 		.id = MT6797_DAI_ADDA,
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| 		.playback = {
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| 			.stream_name = "ADDA Playback",
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| 			.channels_min = 1,
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| 			.channels_max = 2,
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| 			.rates = MTK_ADDA_PLAYBACK_RATES,
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| 			.formats = MTK_ADDA_FORMATS,
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| 		},
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| 		.capture = {
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| 			.stream_name = "ADDA Capture",
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| 			.channels_min = 1,
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| 			.channels_max = 2,
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| 			.rates = MTK_ADDA_CAPTURE_RATES,
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| 			.formats = MTK_ADDA_FORMATS,
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| 		},
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| 		.ops = &mtk_dai_adda_ops,
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| 	},
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| };
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| 
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| int mt6797_dai_adda_register(struct mtk_base_afe *afe)
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| {
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| 	struct mtk_base_afe_dai *dai;
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| 
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| 	dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
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| 	if (!dai)
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| 		return -ENOMEM;
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| 
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| 	list_add(&dai->list, &afe->sub_dais);
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| 
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| 	dai->dai_drivers = mtk_dai_adda_driver;
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| 	dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_adda_driver);
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| 
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| 	dai->dapm_widgets = mtk_dai_adda_widgets;
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| 	dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_adda_widgets);
 | |
| 	dai->dapm_routes = mtk_dai_adda_routes;
 | |
| 	dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_adda_routes);
 | |
| 	return 0;
 | |
| }
 |