480 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			480 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-only
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| /*
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|  * IMG SPDIF output controller driver
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|  *
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|  * Copyright (C) 2015 Imagination Technologies Ltd.
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|  *
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|  * Author: Damien Horsley <Damien.Horsley@imgtec.com>
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|  */
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| 
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| #include <linux/clk.h>
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| #include <linux/init.h>
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| #include <linux/kernel.h>
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| #include <linux/module.h>
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| #include <linux/of.h>
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| #include <linux/platform_device.h>
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| #include <linux/pm_runtime.h>
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| #include <linux/reset.h>
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| 
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| #include <sound/core.h>
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| #include <sound/dmaengine_pcm.h>
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| #include <sound/initval.h>
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| #include <sound/pcm.h>
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| #include <sound/pcm_params.h>
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| #include <sound/soc.h>
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| 
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| #define IMG_SPDIF_OUT_TX_FIFO		0x0
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| 
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| #define IMG_SPDIF_OUT_CTL		0x4
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| #define IMG_SPDIF_OUT_CTL_FS_MASK	BIT(4)
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| #define IMG_SPDIF_OUT_CTL_CLK_MASK	BIT(2)
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| #define IMG_SPDIF_OUT_CTL_SRT_MASK	BIT(0)
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| 
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| #define IMG_SPDIF_OUT_CSL		0x14
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| 
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| #define IMG_SPDIF_OUT_CSH_UV		0x18
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| #define IMG_SPDIF_OUT_CSH_UV_CSH_SHIFT	0
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| #define IMG_SPDIF_OUT_CSH_UV_CSH_MASK	0xff
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| 
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| struct img_spdif_out {
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| 	spinlock_t lock;
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| 	void __iomem *base;
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| 	struct clk *clk_sys;
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| 	struct clk *clk_ref;
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| 	struct snd_dmaengine_dai_dma_data dma_data;
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| 	struct device *dev;
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| 	struct reset_control *rst;
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| 	u32 suspend_ctl;
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| 	u32 suspend_csl;
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| 	u32 suspend_csh;
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| };
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| 
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| static int img_spdif_out_runtime_suspend(struct device *dev)
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| {
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| 	struct img_spdif_out *spdif = dev_get_drvdata(dev);
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| 
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| 	clk_disable_unprepare(spdif->clk_ref);
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| 	clk_disable_unprepare(spdif->clk_sys);
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| 
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| 	return 0;
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| }
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| 
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| static int img_spdif_out_runtime_resume(struct device *dev)
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| {
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| 	struct img_spdif_out *spdif = dev_get_drvdata(dev);
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| 	int ret;
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| 
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| 	ret = clk_prepare_enable(spdif->clk_sys);
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| 	if (ret) {
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| 		dev_err(dev, "clk_enable failed: %d\n", ret);
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| 		return ret;
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| 	}
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| 
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| 	ret = clk_prepare_enable(spdif->clk_ref);
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| 	if (ret) {
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| 		dev_err(dev, "clk_enable failed: %d\n", ret);
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| 		clk_disable_unprepare(spdif->clk_sys);
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| 		return ret;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static inline void img_spdif_out_writel(struct img_spdif_out *spdif, u32 val,
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| 				u32 reg)
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| {
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| 	writel(val, spdif->base + reg);
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| }
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| 
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| static inline u32 img_spdif_out_readl(struct img_spdif_out *spdif, u32 reg)
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| {
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| 	return readl(spdif->base + reg);
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| }
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| 
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| static void img_spdif_out_reset(struct img_spdif_out *spdif)
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| {
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| 	u32 ctl, status_low, status_high;
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| 
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| 	ctl = img_spdif_out_readl(spdif, IMG_SPDIF_OUT_CTL) &
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| 			~IMG_SPDIF_OUT_CTL_SRT_MASK;
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| 	status_low = img_spdif_out_readl(spdif, IMG_SPDIF_OUT_CSL);
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| 	status_high = img_spdif_out_readl(spdif, IMG_SPDIF_OUT_CSH_UV);
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| 
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| 	reset_control_assert(spdif->rst);
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| 	reset_control_deassert(spdif->rst);
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| 
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| 	img_spdif_out_writel(spdif, ctl, IMG_SPDIF_OUT_CTL);
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| 	img_spdif_out_writel(spdif, status_low, IMG_SPDIF_OUT_CSL);
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| 	img_spdif_out_writel(spdif, status_high, IMG_SPDIF_OUT_CSH_UV);
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| }
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| 
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| static int img_spdif_out_info(struct snd_kcontrol *kcontrol,
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| 					struct snd_ctl_elem_info *uinfo)
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| {
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| 	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
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| 	uinfo->count = 1;
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| 
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| 	return 0;
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| }
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| 
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| static int img_spdif_out_get_status_mask(struct snd_kcontrol *kcontrol,
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| 				       struct snd_ctl_elem_value *ucontrol)
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| {
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| 	ucontrol->value.iec958.status[0] = 0xff;
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| 	ucontrol->value.iec958.status[1] = 0xff;
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| 	ucontrol->value.iec958.status[2] = 0xff;
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| 	ucontrol->value.iec958.status[3] = 0xff;
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| 	ucontrol->value.iec958.status[4] = 0xff;
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| 
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| 	return 0;
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| }
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| 
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| static int img_spdif_out_get_status(struct snd_kcontrol *kcontrol,
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| 				  struct snd_ctl_elem_value *ucontrol)
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| {
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| 	struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
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| 	struct img_spdif_out *spdif = snd_soc_dai_get_drvdata(cpu_dai);
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| 	u32 reg;
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| 	unsigned long flags;
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| 
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| 	spin_lock_irqsave(&spdif->lock, flags);
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| 
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| 	reg = img_spdif_out_readl(spdif, IMG_SPDIF_OUT_CSL);
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| 	ucontrol->value.iec958.status[0] = reg & 0xff;
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| 	ucontrol->value.iec958.status[1] = (reg >> 8) & 0xff;
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| 	ucontrol->value.iec958.status[2] = (reg >> 16) & 0xff;
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| 	ucontrol->value.iec958.status[3] = (reg >> 24) & 0xff;
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| 
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| 	reg = img_spdif_out_readl(spdif, IMG_SPDIF_OUT_CSH_UV);
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| 	ucontrol->value.iec958.status[4] =
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| 		(reg & IMG_SPDIF_OUT_CSH_UV_CSH_MASK) >>
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| 		IMG_SPDIF_OUT_CSH_UV_CSH_SHIFT;
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| 
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| 	spin_unlock_irqrestore(&spdif->lock, flags);
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| 
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| 	return 0;
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| }
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| 
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| static int img_spdif_out_set_status(struct snd_kcontrol *kcontrol,
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| 				  struct snd_ctl_elem_value *ucontrol)
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| {
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| 	struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
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| 	struct img_spdif_out *spdif = snd_soc_dai_get_drvdata(cpu_dai);
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| 	u32 reg;
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| 	unsigned long flags;
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| 
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| 	reg = ((u32)ucontrol->value.iec958.status[3] << 24);
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| 	reg |= ((u32)ucontrol->value.iec958.status[2] << 16);
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| 	reg |= ((u32)ucontrol->value.iec958.status[1] << 8);
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| 	reg |= (u32)ucontrol->value.iec958.status[0];
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| 
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| 	spin_lock_irqsave(&spdif->lock, flags);
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| 
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| 	img_spdif_out_writel(spdif, reg, IMG_SPDIF_OUT_CSL);
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| 
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| 	reg = img_spdif_out_readl(spdif, IMG_SPDIF_OUT_CSH_UV);
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| 	reg &= ~IMG_SPDIF_OUT_CSH_UV_CSH_MASK;
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| 	reg |= (u32)ucontrol->value.iec958.status[4] <<
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| 			IMG_SPDIF_OUT_CSH_UV_CSH_SHIFT;
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| 	img_spdif_out_writel(spdif, reg, IMG_SPDIF_OUT_CSH_UV);
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| 
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| 	spin_unlock_irqrestore(&spdif->lock, flags);
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| 
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| 	return 0;
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| }
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| 
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| static struct snd_kcontrol_new img_spdif_out_controls[] = {
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| 	{
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| 		.access = SNDRV_CTL_ELEM_ACCESS_READ,
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| 		.iface = SNDRV_CTL_ELEM_IFACE_PCM,
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| 		.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),
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| 		.info = img_spdif_out_info,
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| 		.get = img_spdif_out_get_status_mask
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| 	},
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| 	{
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| 		.iface = SNDRV_CTL_ELEM_IFACE_PCM,
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| 		.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
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| 		.info = img_spdif_out_info,
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| 		.get = img_spdif_out_get_status,
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| 		.put = img_spdif_out_set_status
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| 	}
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| };
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| 
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| static int img_spdif_out_trigger(struct snd_pcm_substream *substream, int cmd,
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| 			struct snd_soc_dai *dai)
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| {
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| 	struct img_spdif_out *spdif = snd_soc_dai_get_drvdata(dai);
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| 	u32 reg;
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| 	unsigned long flags;
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| 
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| 	switch (cmd) {
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| 	case SNDRV_PCM_TRIGGER_START:
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| 	case SNDRV_PCM_TRIGGER_RESUME:
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| 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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| 		reg = img_spdif_out_readl(spdif, IMG_SPDIF_OUT_CTL);
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| 		reg |= IMG_SPDIF_OUT_CTL_SRT_MASK;
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| 		img_spdif_out_writel(spdif, reg, IMG_SPDIF_OUT_CTL);
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| 		break;
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| 	case SNDRV_PCM_TRIGGER_STOP:
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| 	case SNDRV_PCM_TRIGGER_SUSPEND:
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| 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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| 		spin_lock_irqsave(&spdif->lock, flags);
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| 		img_spdif_out_reset(spdif);
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| 		spin_unlock_irqrestore(&spdif->lock, flags);
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| 		break;
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| 	default:
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| 		return -EINVAL;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static int img_spdif_out_hw_params(struct snd_pcm_substream *substream,
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| 	struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
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| {
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| 	struct img_spdif_out *spdif = snd_soc_dai_get_drvdata(dai);
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| 	unsigned int channels;
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| 	long pre_div_a, pre_div_b, diff_a, diff_b, rate, clk_rate;
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| 	u32 reg;
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| 	snd_pcm_format_t format;
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| 
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| 	rate = params_rate(params);
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| 	format = params_format(params);
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| 	channels = params_channels(params);
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| 
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| 	dev_dbg(spdif->dev, "hw_params rate %ld channels %u format %u\n",
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| 			rate, channels, format);
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| 
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| 	if (format != SNDRV_PCM_FORMAT_S32_LE)
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| 		return -EINVAL;
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| 
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| 	if (channels != 2)
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| 		return -EINVAL;
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| 
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| 	pre_div_a = clk_round_rate(spdif->clk_ref, rate * 256);
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| 	if (pre_div_a < 0)
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| 		return pre_div_a;
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| 	pre_div_b = clk_round_rate(spdif->clk_ref, rate * 384);
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| 	if (pre_div_b < 0)
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| 		return pre_div_b;
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| 
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| 	diff_a = abs((pre_div_a / 256) - rate);
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| 	diff_b = abs((pre_div_b / 384) - rate);
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| 
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| 	/* If diffs are equal, use lower clock rate */
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| 	if (diff_a > diff_b)
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| 		clk_set_rate(spdif->clk_ref, pre_div_b);
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| 	else
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| 		clk_set_rate(spdif->clk_ref, pre_div_a);
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| 
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| 	/*
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| 	 * Another driver (eg machine driver) may have rejected the above
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| 	 * change. Get the current rate and set the register bit according to
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| 	 * the new min diff
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| 	 */
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| 	clk_rate = clk_get_rate(spdif->clk_ref);
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| 
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| 	diff_a = abs((clk_rate / 256) - rate);
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| 	diff_b = abs((clk_rate / 384) - rate);
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| 
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| 	reg = img_spdif_out_readl(spdif, IMG_SPDIF_OUT_CTL);
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| 	if (diff_a <= diff_b)
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| 		reg &= ~IMG_SPDIF_OUT_CTL_CLK_MASK;
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| 	else
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| 		reg |= IMG_SPDIF_OUT_CTL_CLK_MASK;
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| 	img_spdif_out_writel(spdif, reg, IMG_SPDIF_OUT_CTL);
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| 
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| 	return 0;
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| }
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| 
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| static const struct snd_soc_dai_ops img_spdif_out_dai_ops = {
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| 	.trigger = img_spdif_out_trigger,
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| 	.hw_params = img_spdif_out_hw_params
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| };
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| 
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| static int img_spdif_out_dai_probe(struct snd_soc_dai *dai)
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| {
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| 	struct img_spdif_out *spdif = snd_soc_dai_get_drvdata(dai);
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| 
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| 	snd_soc_dai_init_dma_data(dai, &spdif->dma_data, NULL);
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| 
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| 	snd_soc_add_dai_controls(dai, img_spdif_out_controls,
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| 			ARRAY_SIZE(img_spdif_out_controls));
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| 
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| 	return 0;
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| }
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| 
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| static struct snd_soc_dai_driver img_spdif_out_dai = {
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| 	.probe = img_spdif_out_dai_probe,
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| 	.playback = {
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| 		.channels_min = 2,
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| 		.channels_max = 2,
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| 		.rates = SNDRV_PCM_RATE_8000_192000,
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| 		.formats = SNDRV_PCM_FMTBIT_S32_LE
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| 	},
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| 	.ops = &img_spdif_out_dai_ops
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| };
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| 
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| static const struct snd_soc_component_driver img_spdif_out_component = {
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| 	.name = "img-spdif-out",
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| 	.legacy_dai_naming = 1,
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| };
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| 
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| static int img_spdif_out_probe(struct platform_device *pdev)
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| {
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| 	struct img_spdif_out *spdif;
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| 	struct resource *res;
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| 	void __iomem *base;
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| 	int ret;
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| 	struct device *dev = &pdev->dev;
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| 
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| 	spdif = devm_kzalloc(&pdev->dev, sizeof(*spdif), GFP_KERNEL);
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| 	if (!spdif)
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| 		return -ENOMEM;
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| 
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| 	platform_set_drvdata(pdev, spdif);
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| 
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| 	spdif->dev = &pdev->dev;
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| 
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| 	base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
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| 	if (IS_ERR(base))
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| 		return PTR_ERR(base);
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| 
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| 	spdif->base = base;
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| 
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| 	spdif->rst = devm_reset_control_get_exclusive(&pdev->dev, "rst");
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| 	if (IS_ERR(spdif->rst))
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| 		return dev_err_probe(&pdev->dev, PTR_ERR(spdif->rst),
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| 				     "No top level reset found\n");
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| 
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| 	spdif->clk_sys = devm_clk_get(&pdev->dev, "sys");
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| 	if (IS_ERR(spdif->clk_sys))
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| 		return dev_err_probe(dev, PTR_ERR(spdif->clk_sys),
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| 				     "Failed to acquire clock 'sys'\n");
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| 
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| 	spdif->clk_ref = devm_clk_get(&pdev->dev, "ref");
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| 	if (IS_ERR(spdif->clk_ref))
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| 		return dev_err_probe(dev, PTR_ERR(spdif->clk_ref),
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| 				     "Failed to acquire clock 'ref'\n");
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| 
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| 	pm_runtime_enable(&pdev->dev);
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| 	if (!pm_runtime_enabled(&pdev->dev)) {
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| 		ret = img_spdif_out_runtime_resume(&pdev->dev);
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| 		if (ret)
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| 			goto err_pm_disable;
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| 	}
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| 	ret = pm_runtime_resume_and_get(&pdev->dev);
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| 	if (ret < 0)
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| 		goto err_suspend;
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| 
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| 	img_spdif_out_writel(spdif, IMG_SPDIF_OUT_CTL_FS_MASK,
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| 			     IMG_SPDIF_OUT_CTL);
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| 
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| 	img_spdif_out_reset(spdif);
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| 	pm_runtime_put(&pdev->dev);
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| 
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| 	spin_lock_init(&spdif->lock);
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| 
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| 	spdif->dma_data.addr = res->start + IMG_SPDIF_OUT_TX_FIFO;
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| 	spdif->dma_data.addr_width = 4;
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| 	spdif->dma_data.maxburst = 4;
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| 
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| 	ret = devm_snd_soc_register_component(&pdev->dev,
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| 			&img_spdif_out_component,
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| 			&img_spdif_out_dai, 1);
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| 	if (ret)
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| 		goto err_suspend;
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| 
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| 	ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
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| 	if (ret)
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| 		goto err_suspend;
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| 
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| 	dev_dbg(&pdev->dev, "Probe successful\n");
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| 
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| 	return 0;
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| 
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| err_suspend:
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| 	if (!pm_runtime_status_suspended(&pdev->dev))
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| 		img_spdif_out_runtime_suspend(&pdev->dev);
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| err_pm_disable:
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| 	pm_runtime_disable(&pdev->dev);
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| 
 | |
| 	return ret;
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| }
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| 
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| static int img_spdif_out_dev_remove(struct platform_device *pdev)
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| {
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| 	pm_runtime_disable(&pdev->dev);
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| 	if (!pm_runtime_status_suspended(&pdev->dev))
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| 		img_spdif_out_runtime_suspend(&pdev->dev);
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| 
 | |
| 	return 0;
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| }
 | |
| 
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| #ifdef CONFIG_PM_SLEEP
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| static int img_spdif_out_suspend(struct device *dev)
 | |
| {
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| 	struct img_spdif_out *spdif = dev_get_drvdata(dev);
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| 	int ret;
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| 
 | |
| 	if (pm_runtime_status_suspended(dev)) {
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| 		ret = img_spdif_out_runtime_resume(dev);
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| 		if (ret)
 | |
| 			return ret;
 | |
| 	}
 | |
| 
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| 	spdif->suspend_ctl = img_spdif_out_readl(spdif, IMG_SPDIF_OUT_CTL);
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| 	spdif->suspend_csl = img_spdif_out_readl(spdif, IMG_SPDIF_OUT_CSL);
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| 	spdif->suspend_csh = img_spdif_out_readl(spdif, IMG_SPDIF_OUT_CSH_UV);
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| 
 | |
| 	img_spdif_out_runtime_suspend(dev);
 | |
| 
 | |
| 	return 0;
 | |
| }
 | |
| 
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| static int img_spdif_out_resume(struct device *dev)
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| {
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| 	struct img_spdif_out *spdif = dev_get_drvdata(dev);
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| 	int ret;
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| 
 | |
| 	ret = img_spdif_out_runtime_resume(dev);
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| 	if (ret)
 | |
| 		return ret;
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| 
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| 	img_spdif_out_writel(spdif, spdif->suspend_ctl, IMG_SPDIF_OUT_CTL);
 | |
| 	img_spdif_out_writel(spdif, spdif->suspend_csl, IMG_SPDIF_OUT_CSL);
 | |
| 	img_spdif_out_writel(spdif, spdif->suspend_csh, IMG_SPDIF_OUT_CSH_UV);
 | |
| 
 | |
| 	if (pm_runtime_status_suspended(dev))
 | |
| 		img_spdif_out_runtime_suspend(dev);
 | |
| 
 | |
| 	return 0;
 | |
| }
 | |
| #endif
 | |
| static const struct of_device_id img_spdif_out_of_match[] = {
 | |
| 	{ .compatible = "img,spdif-out" },
 | |
| 	{}
 | |
| };
 | |
| MODULE_DEVICE_TABLE(of, img_spdif_out_of_match);
 | |
| 
 | |
| static const struct dev_pm_ops img_spdif_out_pm_ops = {
 | |
| 	SET_RUNTIME_PM_OPS(img_spdif_out_runtime_suspend,
 | |
| 			   img_spdif_out_runtime_resume, NULL)
 | |
| 	SET_SYSTEM_SLEEP_PM_OPS(img_spdif_out_suspend, img_spdif_out_resume)
 | |
| };
 | |
| 
 | |
| static struct platform_driver img_spdif_out_driver = {
 | |
| 	.driver = {
 | |
| 		.name = "img-spdif-out",
 | |
| 		.of_match_table = img_spdif_out_of_match,
 | |
| 		.pm = &img_spdif_out_pm_ops
 | |
| 	},
 | |
| 	.probe = img_spdif_out_probe,
 | |
| 	.remove = img_spdif_out_dev_remove
 | |
| };
 | |
| module_platform_driver(img_spdif_out_driver);
 | |
| 
 | |
| MODULE_AUTHOR("Damien Horsley <Damien.Horsley@imgtec.com>");
 | |
| MODULE_DESCRIPTION("IMG SPDIF Output driver");
 | |
| MODULE_LICENSE("GPL v2");
 |