139 lines
		
	
	
		
			6.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			139 lines
		
	
	
		
			6.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-only */
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| /*
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|  * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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|  *
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|  */
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| 
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| #ifndef __TDA7803_H__
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| #define __TDA7803_H__
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| 
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| /* tda7803 registers space*/
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| #define TDA7803_REG0                          (0x00)
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| #define CH1_AMP_SBI_MODE                      (0x00 << 0)
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| #define CH1_AMP_ABI_MODE                      (0x01 << 0)
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| #define CH2_AMP_SBI_MODE                      (0x00 << 1)
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| #define CH2_AMP_ABI_MODE                      (0x01 << 1)
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| #define CH3_AMP_SBI_MODE                      (0x00 << 2)
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| #define CH3_AMP_ABI_MODE                      (0x01 << 2)
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| #define CH4_AMP_SBI_MODE                      (0x00 << 3)
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| #define CH4_AMP_ABI_MODE                      (0x01 << 3)
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| #define CH1_TRI_MODE_OFF                      (0x00 << 4)
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| #define CH1_TRI_MODE_ON                       (0x01 << 4)
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| #define CH2_TRI_MODE_OFF                      (0x00 << 5)
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| #define CH2_TRI_MODE_ON                       (0x01 << 5)
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| #define CH3_TRI_MODE_OFF                      (0x00 << 6)
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| #define CH3_TRI_MODE_ON                       (0x01 << 6)
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| #define CH4_TRI_MODE_OFF                      (0x00 << 7)
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| #define CH4_TRI_MODE_ON                       (0x01 << 7)
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| 
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| #define TDA7803_REG1                          (0x01)
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| #define CH2_4_GAIN_GV1                        (0x00 << 0)
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| #define CH2_4_GAIN_GV2                        (0x01 << 0)
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| #define CH2_4_GAIN_GV3                        (0x02 << 0)
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| #define CH2_4_GAIN_GV4                        (0x03 << 0)
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| #define CH1_3_GAIN_GV1                        (0x00 << 2)
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| #define CH1_3_GAIN_GV2                        (0x01 << 2)
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| #define CH1_3_GAIN_GV3                        (0x02 << 2)
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| #define CH1_3_GAIN_GV4                        (0x03 << 2)
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| #define GAIN_SELECT_NO                        (0x00 << 4)
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| #define GAIN_SELECT_6DB                       (0x01 << 4)
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| #define GAIN_SELECT_12DB                      (0x02 << 4)
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| #define GAIN_SELECT_NOT_USED                  (0x03 << 4)
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| #define IMPEDANCE_OPTIMIZER_REAR_2OHM         (0x00 << 6)
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| #define IMPEDANCE_OPTIMIZER_REAR_4OHM         (0x01 << 6)
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| #define IMPEDANCE_OPTIMIZER_FRONT_2OHM        (0x00 << 7)
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| #define IMPEDANCE_OPTIMIZER_FRONT_4OHM        (0x01 << 7)
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| 
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| #define TDA7803_REG2                          (0x02)
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| #define LOW_BATTERY_MUTE_THRESHOLD_1          (0x00 << 0)
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| #define LOW_BATTERY_MUTE_THRESHOLD_2          (0x01 << 0)
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| #define DIGITAL_MUTE_ON                       (0x00 << 2)
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| #define DIGITAL_MUTE_OFF                      (0x01 << 2)
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| #define CH2_4_MUTE                            (0x00 << 3)
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| #define CH2_4_UMUTE                           (0x01 << 3)
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| #define CH1_3_MUTE                            (0x00 << 4)
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| #define CH1_3_UMUTE                           (0x01 << 4)
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| #define MUTE_TIME_SETTING_1_45MS              (0x00 << 5)
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| #define MUTE_TIME_SETTING_5_8MS               (0x01 << 5)
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| #define MUTE_TIME_SETTING_11_6MS              (0x02 << 5)
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| #define MUTE_TIME_SETTING_23_2MS              (0x03 << 5)
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| #define MUTE_TIME_SETTING_46_4MS              (0x04 << 5)
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| #define MUTE_TIME_SETTING_92_8MS              (0x05 << 5)
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| #define MUTE_TIME_SETTING_185_5MS             (0x06 << 5)
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| #define MUTE_TIME_SETTING_371_1MS             (0x07 << 5)
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| 
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| #define TDA7803_REG3                          (0x03)
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| #define HIGH_PASS_FILTER_DISABLE              (0x00 << 0)
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| #define HIGH_PASS_FILTER_ENABLE               (0x01 << 0)
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| #define INPUT_OFFSET_DETECTION_DIS            (0x00 << 1)
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| #define INPUT_OFFSET_DETECTION_EN             (0x01 << 1)
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| #define NOISE_GATING_FUNCTION_EN              (0x00 << 2)
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| #define NOISE_GATING_FUNCTION_DIS             (0x01 << 2)
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| #define INPUT_FORMAT_I2S_STD                  (0x00 << 3)
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| #define INPUT_FORMAT_TDM_4CH                  (0x01 << 3)
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| #define INPUT_FORMAT_TDM_8CH_MODEL1           (0x02 << 3)
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| #define INPUT_FORMAT_TDM_8CH_MODEL2           (0x03 << 3)
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| #define INPUT_FORMAT_TDM_16CH_MODEL1          (0x04 << 3)
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| #define INPUT_FORMAT_TDM_16CH_MODEL2          (0x05 << 3)
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| #define INPUT_FORMAT_TDM_16CH_MODEL3          (0x06 << 3)
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| #define INPUT_FORMAT_TDM_16CH_MODEL4          (0x07 << 3)
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| #define SAMPLE_FREQUENCY_RANGE_44100HZ        (0x00 << 6)
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| #define SAMPLE_FREQUENCY_RANGE_48000HZ        (0x01 << 6)
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| #define SAMPLE_FREQUENCY_RANGE_96000HZ        (0x02 << 6)
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| #define SAMPLE_FREQUENCY_RANGE_192000HZ       (0x03 << 6)
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| 
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| #define TDA7803_REG4                          (0x04)
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| #define DIAGNOSTIC_MODE_DISABLE               (0x00 << 0)
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| #define DIAGNOSTIC_MODE_ENABLE                (0x01 << 0)
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| #define CH2_4_SPEAKER_MODE                    (0x00 << 1)
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| #define CH2_4_LINE_DRIVER_MODE                (0x01 << 1)
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| #define CH1_3_SPEAKER_MODE                    (0x00 << 2)
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| #define CH1_3_LINE_DRIVER_MODE                (0x01 << 2)
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| #define DIAGNOSTIC_DISABLE                    (0X00 << 3)
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| #define DIAGNOSTIC_ENABLE                     (0X01 << 3)
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| #define DIAGNOSTIC_CURRENT_THRESHOLD_HIGH     (0X00 << 4)
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| #define DIAGNOSTIC_CURRENT_THRESHOLD_LOW      (0X01 << 4)
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| #define OFFSET_INFORMATION_YES                (0X00 << 5)
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| #define OFFSET_INFORMATION_NO                 (0X01 << 5)
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| #define SHORT_FAULT_INFORMATION_YES           (0X00 << 6)
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| #define SHORT_FAULT_INFORMATION_NO            (0X01 << 6)
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| 
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| #define TDA7803_REG5                          (0x05)
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| #define CAPABILITY_ENHANCER_DISABLE           (0x00 << 1)
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| #define CAPABILITY_ENHANCER_ENABLE            (0x0F << 1)
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| #define THERMAL_THRESHOLD_DEFAULT             (0x00 << 6)
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| #define THERMAL_THRESHOLD_TW_NEGATIVE_10      (0x01 << 6)
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| #define THERMAL_THRESHOLD_TW_NEGATIVE_20      (0x02 << 6)
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| 
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| #define TDA7803_REG6                          (0x06)
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| #define PARALLEL_MODE_CONFIG_MODE_1           (0x00 << 2)
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| #define PARALLEL_MODE_CONFIG_MODE_2           (0x01 << 2)
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| #define PARALLEL_MODE_CONFIG_MODE_3           (0x02 << 2)
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| #define PARALLEL_MODE_CONFIG_MODE_4           (0x03 << 2)
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| #define DIAGNOSITC_PULSE_STRETCH_MODE_1       (0x00 << 5)
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| #define DIAGNOSITC_PULSE_STRETCH_MODE_2       (0x01 << 5)
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| #define DIAGNOSITC_PULSE_STRETCH_MODE_3       (0x02 << 5)
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| #define DIAGNOSITC_PULSE_STRETCH_MODE_4       (0x03 << 5)
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| #define DIAGNOSITC_PULSE_STRETCH_MODE_5       (0x04 << 5)
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| #define DIAGNOSITC_PULSE_STRETCH_DEFAULT      (0x05 << 5)
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| 
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| #define TDA7803_REG7                          (0x07)
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| #define AMPLIEFIR_SWITCH_OFF                  (0x00 << 0)
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| #define AMPLIEFIR_SWITCH_ON                   (0x01 << 0)
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| #define CLIPP_LEVEL_1_REAR_CHANNELS2_4        (0x00 << 1)
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| #define CLIPP_LEVEL_2_REAR_CHANNELS2_4        (0x01 << 1)
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| #define CLIPP_LEVEL_3_REAR_CHANNELS2_4        (0x02 << 1)
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| #define NOT_CLIPP_FOR_REAR_CHANNELS2_4        (0x03 << 1)
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| #define CLIPP_LEVEL_1_REAR_CHANNELS1_3        (0x00 << 3)
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| #define CLIPP_LEVEL_2_REAR_CHANNELS1_3        (0x01 << 3)
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| #define CLIPP_LEVEL_3_REAR_CHANNELS1_3        (0x02 << 3)
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| #define NOT_CLIPP_FOR_REAR_CHANNELS1_3        (0x03 << 3)
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| #define TEMPERATURE_WARNING_TW1               (0x00 << 5)
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| #define TEMPERATURE_WARNING_TW2               (0x01 << 5)
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| #define TEMPERATURE_WARNING_TW3               (0x02 << 5)
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| #define TEMPERATURE_WARNING_TW4               (0x03 << 5)
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| #define NOT_TEMPERATURE_WARNING               (0x04 << 5)
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| 
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| #define TDA7803_REGMAX                        (0x08)
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| #endif /* __TDA7803_H__ */
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