243 lines
		
	
	
		
			7.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			243 lines
		
	
	
		
			7.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-only */
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| /*
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|  * rt711-sdca.h -- RT711 SDCA ALSA SoC audio driver header
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|  *
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|  * Copyright(c) 2021 Realtek Semiconductor Corp.
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|  */
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| 
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| #ifndef __RT711_SDCA_H__
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| #define __RT711_SDCA_H__
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| 
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| #include <linux/pm.h>
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| #include <linux/regmap.h>
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| #include <linux/soundwire/sdw.h>
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| #include <linux/soundwire/sdw_type.h>
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| #include <sound/soc.h>
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| #include <linux/workqueue.h>
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| 
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| struct  rt711_sdca_priv {
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| 	struct regmap *regmap, *mbq_regmap;
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| 	struct snd_soc_component *component;
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| 	struct sdw_slave *slave;
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| 	enum sdw_slave_status status;
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| 	struct sdw_bus_params params;
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| 	bool hw_init;
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| 	bool first_hw_init;
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| 	struct snd_soc_jack *hs_jack;
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| 	struct delayed_work jack_detect_work;
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| 	struct delayed_work jack_btn_check_work;
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| 	struct mutex calibrate_mutex; /* for headset calibration */
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| 	struct mutex disable_irq_lock; /* SDCA irq lock protection */
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| 	bool disable_irq;
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| 	int jack_type, jd_src;
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| 	unsigned int scp_sdca_stat1, scp_sdca_stat2;
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| 	int hw_ver;
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| 	bool fu0f_dapm_mute, fu0f_mixer_l_mute, fu0f_mixer_r_mute;
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| 	bool fu1e_dapm_mute, fu1e_mixer_l_mute, fu1e_mixer_r_mute;
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| };
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| 
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| struct sdw_stream_data {
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| 	struct sdw_stream_runtime *sdw_stream;
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| };
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| 
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| /* NID */
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| #define RT711_AUDIO_FUNCTION_GROUP			0x01
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| #define RT711_DAC_OUT2					0x03
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| #define RT711_ADC_IN1					0x09
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| #define RT711_ADC_IN2					0x08
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| #define RT711_DMIC1					0x12
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| #define RT711_DMIC2					0x13
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| #define RT711_MIC2					0x19
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| #define RT711_LINE1					0x1a
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| #define RT711_LINE2					0x1b
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| #define RT711_BEEP					0x1d
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| #define RT711_VENDOR_REG				0x20
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| #define RT711_HP_OUT					0x21
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| #define RT711_MIXER_IN1					0x22
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| #define RT711_MIXER_IN2					0x23
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| #define RT711_INLINE_CMD				0x55
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| #define RT711_VENDOR_CALI				0x58
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| #define RT711_VENDOR_IMS_DRE				0x5b
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| #define RT711_VENDOR_VAD				0x5e
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| #define RT711_VENDOR_ANALOG_CTL				0x5f
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| #define RT711_VENDOR_HDA_CTL				0x61
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| 
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| /* Index (NID:20h) */
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| #define RT711_JD_PRODUCT_NUM			0x00
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| #define RT711_DMIC_CTL1					0x06
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| #define RT711_JD_CTL1					0x08
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| #define RT711_JD_CTL2					0x09
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| #define RT711_CC_DET1					0x11
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| #define RT711_PARA_VERB_CTL				0x1a
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| #define RT711_COMBO_JACK_AUTO_CTL1			0x45
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| #define RT711_COMBO_JACK_AUTO_CTL2			0x46
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| #define RT711_COMBO_JACK_AUTO_CTL3			0x47
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| #define RT711_INLINE_CMD_CTL				0x48
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| #define RT711_DIGITAL_MISC_CTRL4			0x4a
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| #define RT711_JD_CTRL6			0x6a
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| #define RT711_VREFOUT_CTL				0x6b
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| #define RT711_GPIO_TEST_MODE_CTL2			0x6d
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| #define RT711_FSM_CTL					0x6f
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| #define RT711_IRQ_FLAG_TABLE1				0x80
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| #define RT711_IRQ_FLAG_TABLE2				0x81
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| #define RT711_IRQ_FLAG_TABLE3				0x82
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| #define RT711_HP_FSM_CTL				0x83
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| #define RT711_TX_RX_MUX_CTL				0x91
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| #define RT711_FILTER_SRC_SEL				0xb0
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| #define RT711_ADC27_VOL_SET				0xb7
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| 
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| /* Index (NID:58h) */
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| #define RT711_DAC_DC_CALI_CTL1				0x00
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| #define RT711_DAC_DC_CALI_CTL2				0x01
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| 
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| /* Index (NID:5bh) */
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| #define RT711_IMS_DIGITAL_CTL1				0x00
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| #define RT711_HP_IMS_RESULT_L				0x20
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| #define RT711_HP_IMS_RESULT_R				0x21
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| 
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| /* Index (NID:5eh) */
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| #define RT711_VAD_SRAM_CTL1				0x10
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| 
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| /* Index (NID:5fh) */
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| #define RT711_MISC_POWER_CTL0				0x01
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| #define RT711_MISC_POWER_CTL4				0x05
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| 
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| /* Index (NID:61h) */
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| #define RT711_HDA_LEGACY_MUX_CTL1			0x00
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| #define RT711_HDA_LEGACY_UNSOLICITED_CTL	0x03
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| #define RT711_HDA_LEGACY_CONFIG_CTL			0x06
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| #define RT711_HDA_LEGACY_RESET_CTL			0x08
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| #define RT711_HDA_LEGACY_GPIO_CTL			0x0a
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| #define RT711_ADC08_09_PDE_CTL				0x24
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| #define RT711_GE_MODE_RELATED_CTL			0x35
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| #define RT711_PUSH_BTN_INT_CTL0				0x36
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| #define RT711_PUSH_BTN_INT_CTL1				0x37
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| #define RT711_PUSH_BTN_INT_CTL2				0x38
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| #define RT711_PUSH_BTN_INT_CTL6				0x3c
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| #define RT711_PUSH_BTN_INT_CTL7				0x3d
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| #define RT711_PUSH_BTN_INT_CTL9				0x3f
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| 
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| /* DAC DC offset calibration control-1 (0x00)(NID:20h) */
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| #define RT711_DAC_DC_CALI_TRIGGER (0x1 << 15)
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| #define RT711_DAC_DC_CALI_CLK_EN (0x1 << 14)
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| #define RT711_DAC_DC_FORCE_CALI_RST (0x1 << 3)
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| 
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| /* jack detect control 1 (0x08)(NID:20h) */
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| #define RT711_JD2_DIGITAL_MODE_SEL (0x1 << 1)
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| 
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| /* jack detect control 2 (0x09)(NID:20h) */
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| #define RT711_JD2_2PORT_200K_DECODE_HP (0x1 << 13)
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| #define RT711_HP_JD_SEL_JD1 (0x0 << 1)
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| #define RT711_HP_JD_SEL_JD2 (0x1 << 1)
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| 
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| /* CC DET1 (0x11)(NID:20h) */
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| #define RT711_HP_JD_FINAL_RESULT_CTL_JD12 (0x1 << 10)
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| #define RT711_HP_JD_FINAL_RESULT_CTL_CCDET (0x0 << 10)
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| 
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| /* Parameter & Verb control (0x1a)(NID:20h) */
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| #define RT711_HIDDEN_REG_SW_RESET (0x1 << 14)
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| 
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| /* combo jack auto switch control 2 (0x46)(NID:20h) */
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| #define RT711_COMBOJACK_AUTO_DET_STATUS			(0x1 << 11)
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| #define RT711_COMBOJACK_AUTO_DET_TRS			(0x1 << 10)
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| #define RT711_COMBOJACK_AUTO_DET_CTIA			(0x1 << 9)
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| #define RT711_COMBOJACK_AUTO_DET_OMTP			(0x1 << 8)
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| 
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| /* FSM control (0x6f)(NID:20h) */
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| #define RT711_CALI_CTL			(0x0 << 0)
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| #define RT711_COMBOJACK_CTL		(0x1 << 0)
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| #define RT711_IMS_CTL			(0x2 << 0)
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| #define RT711_DEPOP_CTL			(0x3 << 0)
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| #define RT711_FSM_IMP_EN		(0x1 << 6)
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| 
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| /* Impedance Sense Digital Control 1 (0x00)(NID:5bh) */
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| #define RT711_TRIGGER_IMS		(0x1 << 15)
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| #define RT711_IMS_EN			(0x1 << 6)
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| 
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| #define RT711_EAPD_HIGH				0x2
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| #define RT711_EAPD_LOW				0x0
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| #define RT711_MUTE_SFT				7
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| /* set input/output mapping to payload[14][15] separately */
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| #define RT711_DIR_IN_SFT			6
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| #define RT711_DIR_OUT_SFT			7
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| 
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| /* RC Calibration register */
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| #define RT711_RC_CAL_STATUS			0x320c
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| 
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| /* Buffer address for HID */
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| #define RT711_BUF_ADDR_HID1			0x44030000
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| #define RT711_BUF_ADDR_HID2			0x44030020
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| 
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| /* RT711 SDCA Control - function number */
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| #define FUNC_NUM_JACK_CODEC 0x01
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| #define FUNC_NUM_MIC_ARRAY 0x02
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| #define FUNC_NUM_HID 0x03
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| 
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| /* RT711 SDCA entity */
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| #define RT711_SDCA_ENT_HID01 0x01
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| #define RT711_SDCA_ENT_GE49 0x49
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| #define RT711_SDCA_ENT_USER_FU05 0x05
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| #define RT711_SDCA_ENT_USER_FU0F 0x0f
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| #define RT711_SDCA_ENT_USER_FU1E 0x1e
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| #define RT711_SDCA_ENT_PLATFORM_FU15 0x15
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| #define RT711_SDCA_ENT_PLATFORM_FU44 0x44
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| #define RT711_SDCA_ENT_PDE28 0x28
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| #define RT711_SDCA_ENT_PDE29 0x29
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| #define RT711_SDCA_ENT_PDE2A 0x2a
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| #define RT711_SDCA_ENT_CS01 0x01
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| #define RT711_SDCA_ENT_CS11 0x11
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| #define RT711_SDCA_ENT_CS1F 0x1f
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| #define RT711_SDCA_ENT_OT1 0x06
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| #define RT711_SDCA_ENT_LINE1 0x09
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| #define RT711_SDCA_ENT_LINE2 0x31
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| #define RT711_SDCA_ENT_PDELINE2 0x36
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| #define RT711_SDCA_ENT_USER_FU9 0x41
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| 
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| /* RT711 SDCA control */
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| #define RT711_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10
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| #define RT711_SDCA_CTL_FU_CH_GAIN 0x0b
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| #define RT711_SDCA_CTL_FU_MUTE 0x01
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| #define RT711_SDCA_CTL_FU_VOLUME 0x02
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| #define RT711_SDCA_CTL_HIDTX_CURRENT_OWNER 0x10
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| #define RT711_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE 0x11
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| #define RT711_SDCA_CTL_HIDTX_MESSAGE_OFFSET 0x12
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| #define RT711_SDCA_CTL_HIDTX_MESSAGE_LENGTH 0x13
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| #define RT711_SDCA_CTL_SELECTED_MODE 0x01
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| #define RT711_SDCA_CTL_DETECTED_MODE 0x02
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| #define RT711_SDCA_CTL_REQ_POWER_STATE 0x01
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| #define RT711_SDCA_CTL_VENDOR_DEF 0x30
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| 
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| /* RT711 SDCA channel */
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| #define CH_L 0x01
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| #define CH_R 0x02
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| 
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| /* sample frequency index */
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| #define RT711_SDCA_RATE_44100HZ		0x08
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| #define RT711_SDCA_RATE_48000HZ		0x09
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| #define RT711_SDCA_RATE_96000HZ		0x0b
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| #define RT711_SDCA_RATE_192000HZ	0x0d
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| 
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| enum {
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| 	RT711_AIF1,
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| 	RT711_AIF2,
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| 	RT711_AIFS,
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| };
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| 
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| enum rt711_sdca_jd_src {
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| 	RT711_JD_NULL,
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| 	RT711_JD1,
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| 	RT711_JD2
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| };
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| 
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| enum rt711_sdca_ver {
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| 	RT711_VER_VD0,
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| 	RT711_VER_VD1
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| };
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| 
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| int rt711_sdca_io_init(struct device *dev, struct sdw_slave *slave);
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| int rt711_sdca_init(struct device *dev, struct regmap *regmap,
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| 	       struct regmap *mbq_regmap, struct sdw_slave *slave);
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| 
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| int rt711_sdca_jack_detect(struct rt711_sdca_priv *rt711, bool *hp, bool *mic);
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| #endif /* __RT711_SDCA_H__ */
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