88 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			88 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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| /*
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|  * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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|  */
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| 
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| #include <linux/io.h>
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| 
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| #include "rkpm_helpers.h"
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| #include "rkpm_uart.h"
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| 
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| #define UART_DEFAULT_BAUDRATE		115200
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| 
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| void rkpm_uart_debug_init(void __iomem *base,
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| 			  unsigned int uart_clk,
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| 			  unsigned int baud_rate)
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| {
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| 	u32 uart_dll, uart_dlh;
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| 	u32 div;
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| 
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| 	if (!base || !uart_clk || !baud_rate)
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| 		return;
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| 
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| 	div = uart_clk / baud_rate / 16;
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| 	uart_dll = div & 0xff;
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| 	uart_dlh = (div >> 8) & 0xff;
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| 
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| 	/* Reset uart */
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| 	writel_relaxed(XMIT_FIFO_RESET | RCVR_FIFO_RESET | UART_RESET,
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| 		       base + UARTSRR);
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| 	rkpm_raw_udelay(10);
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| 
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| 	writel_relaxed(DIAGNOSTIC_MODE, base + UARTMCR);
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| 	writel_relaxed(0x83, base + UARTLCR);
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| 	writel_relaxed(uart_dll, base + UARTDLL);
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| 	writel_relaxed(uart_dlh, base + UARTDLLM);
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| 	writel_relaxed(0x03, base + UARTLCR);
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| 	writel_relaxed(0x01, base + UARTIER);
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| 	writel_relaxed(UARTFCR_FIFOEN, base + UARTFCR);
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| 	writel_relaxed(0, base + UARTMCR);
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| }
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| 
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| void rkpm_uart_debug_save(void __iomem *base,
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| 			  struct uart_debug_ctx *ctx)
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| {
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| 	u32 wait_cnt = 50000;
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| 
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| 	while ((readl_relaxed(base + UARTUSR) & UARTUSR_BUSY) &&
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| 	       --wait_cnt)
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| 		rkpm_raw_udelay(10);
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| 
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| 	/* Uart error! Unlikely to reach here */
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| 	if (wait_cnt == 0)
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| 		rkpm_uart_debug_init(base, 24000000, UART_DEFAULT_BAUDRATE);
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| 
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| 	ctx->uart_lcr = readl_relaxed(base + UARTLCR);
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| 	ctx->uart_ier = readl_relaxed(base + UARTIER);
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| 	ctx->uart_mcr = readl_relaxed(base + UARTMCR);
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| 	writel_relaxed(ctx->uart_lcr | UARTLCR_DLAB, base + UARTLCR);
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| 	ctx->uart_dll = readl_relaxed(base + UARTDLL);
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| 	ctx->uart_dlh = readl_relaxed(base + UARTDLLM);
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| 	writel_relaxed(ctx->uart_lcr, base + UARTLCR);
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| }
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| 
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| void rkpm_uart_debug_restore(void __iomem *base,
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| 			     struct uart_debug_ctx *ctx)
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| {
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| 	u32 uart_lcr;
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| 	u32 wait_cnt = 50000;
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| 
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| 	while ((readl_relaxed(base + UARTUSR) & UARTUSR_BUSY) &&
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| 	       --wait_cnt)
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| 		rkpm_raw_udelay(10);
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| 
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| 	writel_relaxed(XMIT_FIFO_RESET | RCVR_FIFO_RESET | UART_RESET,
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| 		       base + UARTSRR);
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| 	rkpm_raw_udelay(10);
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| 	uart_lcr = readl_relaxed(base + UARTLCR);
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| 	writel_relaxed(DIAGNOSTIC_MODE, base + UARTMCR);
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| 	writel_relaxed(uart_lcr | UARTLCR_DLAB, base + UARTLCR);
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| 	writel_relaxed(ctx->uart_dll, base + UARTDLL);
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| 	writel_relaxed(ctx->uart_dlh, base + UARTDLLM);
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| 	writel_relaxed(ctx->uart_lcr, base + UARTLCR);
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| 	writel_relaxed(ctx->uart_ier, base + UARTIER);
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| 	writel_relaxed(UARTFCR_FIFOEN, base + UARTFCR);
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| 	writel_relaxed(ctx->uart_mcr, base + UARTMCR);
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| }
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| 
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