368 lines
8.3 KiB
C
368 lines
8.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* STMicroelectronics STMPE811 IIO ADC Driver
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*
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* 4 channel, 10/12-bit ADC
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*
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* Copyright (C) 2013-2018 Toradex AG <stefan.agner@toradex.com>
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*/
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#include <linux/completion.h>
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#include <linux/err.h>
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#include <linux/iio/iio.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/mfd/stmpe.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/device.h>
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#define STMPE_REG_INT_STA 0x0B
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#define STMPE_REG_ADC_INT_EN 0x0E
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#define STMPE_REG_ADC_INT_STA 0x0F
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#define STMPE_REG_ADC_CTRL1 0x20
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#define STMPE_REG_ADC_CTRL2 0x21
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#define STMPE_REG_ADC_CAPT 0x22
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#define STMPE_REG_ADC_DATA_CH(channel) (0x30 + 2 * (channel))
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#define STMPE_REG_TEMP_CTRL 0x60
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#define STMPE_TEMP_CTRL_ENABLE BIT(0)
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#define STMPE_TEMP_CTRL_ACQ BIT(1)
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#define STMPE_TEMP_CTRL_THRES_EN BIT(3)
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#define STMPE_START_ONE_TEMP_CONV (STMPE_TEMP_CTRL_ENABLE | \
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STMPE_TEMP_CTRL_ACQ | \
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STMPE_TEMP_CTRL_THRES_EN)
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#define STMPE_REG_TEMP_DATA 0x61
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#define STMPE_REG_TEMP_TH 0x63
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#define STMPE_ADC_LAST_NR 7
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#define STMPE_TEMP_CHANNEL (STMPE_ADC_LAST_NR + 1)
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#define STMPE_ADC_CH(channel) ((1 << (channel)) & 0xff)
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#define STMPE_ADC_TIMEOUT msecs_to_jiffies(1000)
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struct stmpe_adc {
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struct stmpe *stmpe;
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struct clk *clk;
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struct device *dev;
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struct mutex lock;
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/* We are allocating plus one for the temperature channel */
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struct iio_chan_spec stmpe_adc_iio_channels[STMPE_ADC_LAST_NR + 2];
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struct completion completion;
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u8 channel;
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u32 value;
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};
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static int stmpe_read_voltage(struct stmpe_adc *info,
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struct iio_chan_spec const *chan, int *val)
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{
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unsigned long ret;
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mutex_lock(&info->lock);
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reinit_completion(&info->completion);
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info->channel = (u8)chan->channel;
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if (info->channel > STMPE_ADC_LAST_NR) {
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mutex_unlock(&info->lock);
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return -EINVAL;
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}
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stmpe_reg_write(info->stmpe, STMPE_REG_ADC_CAPT,
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STMPE_ADC_CH(info->channel));
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ret = wait_for_completion_timeout(&info->completion, STMPE_ADC_TIMEOUT);
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if (ret == 0) {
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stmpe_reg_write(info->stmpe, STMPE_REG_ADC_INT_STA,
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STMPE_ADC_CH(info->channel));
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mutex_unlock(&info->lock);
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return -ETIMEDOUT;
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}
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*val = info->value;
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mutex_unlock(&info->lock);
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return 0;
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}
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static int stmpe_read_temp(struct stmpe_adc *info,
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struct iio_chan_spec const *chan, int *val)
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{
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unsigned long ret;
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mutex_lock(&info->lock);
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reinit_completion(&info->completion);
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info->channel = (u8)chan->channel;
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if (info->channel != STMPE_TEMP_CHANNEL) {
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mutex_unlock(&info->lock);
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return -EINVAL;
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}
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stmpe_reg_write(info->stmpe, STMPE_REG_TEMP_CTRL,
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STMPE_START_ONE_TEMP_CONV);
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ret = wait_for_completion_timeout(&info->completion, STMPE_ADC_TIMEOUT);
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if (ret == 0) {
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mutex_unlock(&info->lock);
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return -ETIMEDOUT;
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}
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/*
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* absolute temp = +V3.3 * value /7.51 [K]
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* scale to [milli °C]
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*/
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*val = ((449960l * info->value) / 1024l) - 273150;
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mutex_unlock(&info->lock);
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return 0;
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}
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static int stmpe_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val,
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int *val2,
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long mask)
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{
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struct stmpe_adc *info = iio_priv(indio_dev);
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long ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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case IIO_CHAN_INFO_PROCESSED:
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switch (chan->type) {
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case IIO_VOLTAGE:
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ret = stmpe_read_voltage(info, chan, val);
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break;
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case IIO_TEMP:
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ret = stmpe_read_temp(info, chan, val);
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break;
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default:
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return -EINVAL;
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}
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if (ret < 0)
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return ret;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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*val = 3300;
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*val2 = info->stmpe->mod_12b ? 12 : 10;
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return IIO_VAL_FRACTIONAL_LOG2;
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default:
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break;
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}
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return -EINVAL;
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}
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static irqreturn_t stmpe_adc_isr(int irq, void *dev_id)
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{
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struct stmpe_adc *info = (struct stmpe_adc *)dev_id;
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__be16 data;
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if (info->channel <= STMPE_ADC_LAST_NR) {
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int int_sta;
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int_sta = stmpe_reg_read(info->stmpe, STMPE_REG_ADC_INT_STA);
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/* Is the interrupt relevant */
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if (!(int_sta & STMPE_ADC_CH(info->channel)))
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return IRQ_NONE;
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/* Read value */
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stmpe_block_read(info->stmpe,
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STMPE_REG_ADC_DATA_CH(info->channel), 2, (u8 *) &data);
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stmpe_reg_write(info->stmpe, STMPE_REG_ADC_INT_STA, int_sta);
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} else if (info->channel == STMPE_TEMP_CHANNEL) {
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/* Read value */
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stmpe_block_read(info->stmpe, STMPE_REG_TEMP_DATA, 2,
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(u8 *) &data);
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} else {
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return IRQ_NONE;
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}
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info->value = (u32) be16_to_cpu(data);
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complete(&info->completion);
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return IRQ_HANDLED;
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}
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static const struct iio_info stmpe_adc_iio_info = {
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.read_raw = &stmpe_read_raw,
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};
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static void stmpe_adc_voltage_chan(struct iio_chan_spec *ics, int chan)
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{
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ics->type = IIO_VOLTAGE;
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ics->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
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ics->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
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ics->indexed = 1;
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ics->channel = chan;
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}
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static void stmpe_adc_temp_chan(struct iio_chan_spec *ics, int chan)
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{
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ics->type = IIO_TEMP;
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ics->info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED);
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ics->indexed = 1;
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ics->channel = chan;
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}
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static int stmpe_adc_init_hw(struct stmpe_adc *adc)
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{
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int ret;
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struct stmpe *stmpe = adc->stmpe;
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ret = stmpe_enable(stmpe, STMPE_BLOCK_ADC);
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if (ret) {
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dev_err(stmpe->dev, "Could not enable clock for ADC\n");
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return ret;
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}
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ret = stmpe811_adc_common_init(stmpe);
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if (ret) {
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stmpe_disable(stmpe, STMPE_BLOCK_ADC);
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return ret;
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}
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/* use temp irq for each conversion completion */
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stmpe_reg_write(stmpe, STMPE_REG_TEMP_TH, 0);
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stmpe_reg_write(stmpe, STMPE_REG_TEMP_TH + 1, 0);
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return 0;
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}
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static int stmpe_adc_probe(struct platform_device *pdev)
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{
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struct iio_dev *indio_dev;
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struct stmpe_adc *info;
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struct device_node *np;
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u32 norequest_mask = 0;
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unsigned long bits;
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int irq_temp, irq_adc;
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int num_chan = 0;
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int i = 0;
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int ret;
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irq_adc = platform_get_irq_byname(pdev, "STMPE_ADC");
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if (irq_adc < 0)
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return irq_adc;
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indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(struct stmpe_adc));
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if (!indio_dev) {
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dev_err(&pdev->dev, "failed allocating iio device\n");
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return -ENOMEM;
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}
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info = iio_priv(indio_dev);
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mutex_init(&info->lock);
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init_completion(&info->completion);
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ret = devm_request_threaded_irq(&pdev->dev, irq_adc, NULL,
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stmpe_adc_isr, IRQF_ONESHOT,
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"stmpe-adc", info);
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if (ret < 0) {
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dev_err(&pdev->dev, "failed requesting irq, irq = %d\n",
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irq_adc);
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return ret;
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}
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irq_temp = platform_get_irq_byname(pdev, "STMPE_TEMP_SENS");
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if (irq_temp >= 0) {
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ret = devm_request_threaded_irq(&pdev->dev, irq_temp, NULL,
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stmpe_adc_isr, IRQF_ONESHOT,
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"stmpe-adc", info);
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if (ret < 0)
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dev_warn(&pdev->dev, "failed requesting irq for"
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" temp sensor, irq = %d\n", irq_temp);
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}
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platform_set_drvdata(pdev, indio_dev);
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indio_dev->name = dev_name(&pdev->dev);
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indio_dev->info = &stmpe_adc_iio_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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info->stmpe = dev_get_drvdata(pdev->dev.parent);
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np = pdev->dev.of_node;
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if (!np)
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dev_err(&pdev->dev, "no device tree node found\n");
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of_property_read_u32(np, "st,norequest-mask", &norequest_mask);
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bits = norequest_mask;
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for_each_clear_bit(i, &bits, (STMPE_ADC_LAST_NR + 1)) {
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stmpe_adc_voltage_chan(&info->stmpe_adc_iio_channels[num_chan], i);
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num_chan++;
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}
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stmpe_adc_temp_chan(&info->stmpe_adc_iio_channels[num_chan], i);
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num_chan++;
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indio_dev->channels = info->stmpe_adc_iio_channels;
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indio_dev->num_channels = num_chan;
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ret = stmpe_adc_init_hw(info);
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if (ret)
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return ret;
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stmpe_reg_write(info->stmpe, STMPE_REG_ADC_INT_EN,
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~(norequest_mask & 0xFF));
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stmpe_reg_write(info->stmpe, STMPE_REG_ADC_INT_STA,
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~(norequest_mask & 0xFF));
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return devm_iio_device_register(&pdev->dev, indio_dev);
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}
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static int stmpe_adc_resume(struct device *dev)
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{
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct stmpe_adc *info = iio_priv(indio_dev);
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stmpe_adc_init_hw(info);
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return 0;
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}
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static DEFINE_SIMPLE_DEV_PM_OPS(stmpe_adc_pm_ops, NULL, stmpe_adc_resume);
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static const struct of_device_id stmpe_adc_ids[] = {
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{ .compatible = "st,stmpe-adc", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, stmpe_adc_ids);
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static struct platform_driver stmpe_adc_driver = {
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.probe = stmpe_adc_probe,
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.driver = {
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.name = "stmpe-adc",
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.pm = pm_sleep_ptr(&stmpe_adc_pm_ops),
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.of_match_table = stmpe_adc_ids,
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},
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};
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module_platform_driver(stmpe_adc_driver);
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MODULE_AUTHOR("Stefan Agner <stefan.agner@toradex.com>");
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MODULE_DESCRIPTION("STMPEXXX ADC driver");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:stmpe-adc");
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