442 lines
12 KiB
C
442 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Driver for Rockchip Flexbus ADC opmode
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*
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* Copyright (C) 2024 Rockchip Electronics Co., Ltd.
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*/
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#include <linux/clk.h>
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#include <linux/completion.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <dt-bindings/mfd/rockchip-flexbus.h>
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#include <linux/mfd/rockchip-flexbus.h>
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#define FLEXBUS_MAX_RX_RATE 200000000
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#define FLEXBUS_ADC_ERR_ISR (FLEXBUS_DMA_TIMEOUT_ISR | FLEXBUS_DMA_ERR_ISR | \
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FLEXBUS_RX_UDF_ISR | FLEXBUS_RX_OVF_ISR)
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#define FLEXBUS_ADC_ISR (FLEXBUS_ADC_ERR_ISR | FLEXBUS_RX_DONE_ISR)
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#define FLEXBUS_ADC_TIMEOUT msecs_to_jiffies(100)
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#define FLEXBUS_ADC_REPEAT 0x40
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enum flexbus_adc_result {
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ADC_DONE = 0,
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ADC_ERR,
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};
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struct rockchip_flexbus_adc;
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struct rockchip_flexbus_adc_ops {
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int (*read_block)(struct rockchip_flexbus_adc *rkfb_adc, dma_addr_t dst_phys, u32 dst_len,
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u32 num_of_dfs);
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};
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struct rockchip_flexbus_adc {
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struct device *dev;
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struct rockchip_flexbus *rkfb;
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struct clk *ref_clk; /* ref_clk is only used for slave-mode */
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u32 dfs;
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bool slave_mode;
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bool free_sclk;
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bool auto_pad;
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bool cpol;
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bool cpha;
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struct mutex lock;
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struct completion completion;
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enum flexbus_adc_result result;
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u32 dst_buf_len;
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dma_addr_t dst_buf_phys;
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void *dst_buf;
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const struct rockchip_flexbus_adc_ops *ops;
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};
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static const struct iio_chan_spec rockchip_flexbus_adc_channel[] = {
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{
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.type = IIO_VOLTAGE,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
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.scan_type = {
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.sign = 'u',
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.realbits = 16,
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.storagebits = 16,
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.shift = 0,
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.repeat = FLEXBUS_ADC_REPEAT,
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.endianness = IIO_CPU,
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},
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},
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};
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static int rockchip_flexbus_adc_read_block(struct rockchip_flexbus_adc *rkfb_adc,
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dma_addr_t dst_phys, u32 dst_len, u32 num_of_dfs)
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{
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struct rockchip_flexbus *rkfb = rkfb_adc->rkfb;
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int ret = 0;
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if (num_of_dfs > 0x08000000) {
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dev_err(rkfb_adc->dev, "num_of_dfs is too large\n");
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return -EINVAL;
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}
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mutex_lock(&rkfb_adc->lock);
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reinit_completion(&rkfb_adc->completion);
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rockchip_flexbus_writel(rkfb, FLEXBUS_RX_NUM, num_of_dfs);
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rockchip_flexbus_writel(rkfb, FLEXBUS_DMA_DST_ADDR0, (ulong)dst_phys >> 2);
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rockchip_flexbus_writel(rkfb, FLEXBUS_DMA_DST_LEN0, dst_len);
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rockchip_flexbus_writel(rkfb, FLEXBUS_ENR, FLEXBUS_RX_ENR);
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if (!wait_for_completion_timeout(&rkfb_adc->completion, FLEXBUS_ADC_TIMEOUT)) {
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ret = -ETIMEDOUT;
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goto end;
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}
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if (rkfb_adc->result != ADC_DONE)
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ret = -1;
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end:
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rockchip_flexbus_writel(rkfb, FLEXBUS_ENR, FLEXBUS_RX_DIS);
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mutex_unlock(&rkfb_adc->lock);
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return ret;
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}
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static void rockchip_flexbus_adc_isr(struct rockchip_flexbus *rkfb, u32 isr)
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{
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struct rockchip_flexbus_adc *rkfb_adc = rkfb->fb1_data;
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if (rkfb->opmode1 != ROCKCHIP_FLEXBUS1_OPMODE_ADC)
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return;
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if (isr & FLEXBUS_RX_DONE_ISR) {
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rkfb_adc->result = ADC_DONE;
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rockchip_flexbus_writel(rkfb, FLEXBUS_ICR, FLEXBUS_RX_DONE_ISR);
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}
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if (isr & FLEXBUS_ADC_ERR_ISR) {
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rkfb_adc->result = ADC_ERR;
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if (isr & FLEXBUS_DMA_TIMEOUT_ISR) {
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dev_err_ratelimited(rkfb_adc->dev, "dma timeout!\n");
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rockchip_flexbus_writel(rkfb, FLEXBUS_ICR, FLEXBUS_DMA_TIMEOUT_ISR);
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}
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if (isr & FLEXBUS_DMA_ERR_ISR) {
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dev_err_ratelimited(rkfb_adc->dev, "dma err!\n");
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rockchip_flexbus_writel(rkfb, FLEXBUS_ICR, FLEXBUS_DMA_ERR_ISR);
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}
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if (isr & FLEXBUS_RX_UDF_ISR) {
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dev_err_ratelimited(rkfb_adc->dev, "rx underflow!\n");
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rockchip_flexbus_writel(rkfb, FLEXBUS_ICR, FLEXBUS_RX_UDF_ISR);
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}
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if (isr & FLEXBUS_RX_OVF_ISR) {
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dev_err_ratelimited(rkfb_adc->dev, "rx overflow!\n");
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rockchip_flexbus_writel(rkfb, FLEXBUS_ICR, FLEXBUS_RX_OVF_ISR);
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}
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}
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complete(&rkfb_adc->completion);
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}
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static int rockchip_flexbus_adc_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val, int *val2,
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long mask)
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{
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struct rockchip_flexbus_adc *rkfb_adc = iio_priv(indio_dev);
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u32 val_mask;
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = rkfb_adc->ops->read_block(rkfb_adc, rkfb_adc->dst_buf_phys,
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rkfb_adc->dst_buf_len, 8);
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if (ret)
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return ret;
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switch (rkfb_adc->dfs) {
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case 4:
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val_mask = 0xf;
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break;
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case 8:
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val_mask = 0xff;
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break;
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case 16:
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default:
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val_mask = 0xffff;
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break;
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}
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*val = readw(rkfb_adc->dst_buf) & val_mask;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SAMP_FREQ:
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if (rkfb_adc->slave_mode && !rkfb_adc->ref_clk) {
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dev_err(rkfb_adc->dev,
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"sample freq depends on clock source of the ADC device\n");
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return -EINVAL;
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}
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if (rkfb_adc->slave_mode)
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*val = clk_get_rate(rkfb_adc->ref_clk);
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else
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*val = clk_get_rate(rkfb_adc->rkfb->clks[1].clk) / 2;
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return IIO_VAL_INT;
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default:
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return -EINVAL;
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}
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}
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static int rockchip_flexbus_adc_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int val, int val2,
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long mask)
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{
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struct rockchip_flexbus_adc *rkfb_adc = iio_priv(indio_dev);
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_SAMP_FREQ:
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if (rkfb_adc->slave_mode && !rkfb_adc->ref_clk) {
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dev_err(rkfb_adc->dev,
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"sample freq depends on clock source of the ADC device\n");
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return -EINVAL;
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}
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mutex_lock(&rkfb_adc->lock);
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if (val > FLEXBUS_MAX_RX_RATE / 2)
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val = FLEXBUS_MAX_RX_RATE / 2;
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if (rkfb_adc->slave_mode)
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ret = clk_set_rate(rkfb_adc->ref_clk, val);
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else
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ret = clk_set_rate(rkfb_adc->rkfb->clks[1].clk, val * 2);
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mutex_unlock(&rkfb_adc->lock);
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break;
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default:
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return -EINVAL;
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}
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return ret;
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}
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static const struct iio_info rockchip_flexbus_adc_info = {
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.read_raw = rockchip_flexbus_adc_read_raw,
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.write_raw = rockchip_flexbus_adc_write_raw,
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};
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static irqreturn_t rockchip_flexbus_adc_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct rockchip_flexbus_adc *rkfb_adc = iio_priv(indio_dev);
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int ret;
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ret = rkfb_adc->ops->read_block(rkfb_adc, rkfb_adc->dst_buf_phys, rkfb_adc->dst_buf_len,
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indio_dev->channels->scan_type.repeat);
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if (!ret)
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iio_push_to_buffers_with_timestamp(indio_dev, rkfb_adc->dst_buf,
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iio_get_time_ns(indio_dev));
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static int rockchip_flexbus_adc_init(struct rockchip_flexbus_adc *rkfb_adc)
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{
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struct rockchip_flexbus *rkfb = rkfb_adc->rkfb;
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u32 val;
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if (!rkfb_adc->slave_mode && rkfb_adc->free_sclk)
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rockchip_flexbus_writel(rkfb, FLEXBUS_FREE_SCLK, FLEXBUS_RX_FREE_MODE);
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val = 0x0;
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if (rkfb_adc->slave_mode)
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val |= FLEXBUS_CLK1_IN;
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rockchip_flexbus_writel(rkfb, FLEXBUS_SLAVE_MODE, val);
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switch (rkfb_adc->dfs) {
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case 4:
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val = rkfb->dfs_reg->dfs_4bit;
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break;
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case 8:
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val = rkfb->dfs_reg->dfs_8bit;
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break;
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case 16:
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val = rkfb->dfs_reg->dfs_16bit;
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break;
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default:
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return -EINVAL;
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}
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if (rkfb_adc->auto_pad)
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val |= FLEXBUS_AUTOPAD;
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if (rkfb_adc->cpol)
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val |= FLEXBUS_CPOL;
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if (rkfb_adc->cpha)
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val |= FLEXBUS_CPHA;
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rockchip_flexbus_writel(rkfb, FLEXBUS_RX_CTL, val);
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rockchip_flexbus_setbits(rkfb, FLEXBUS_IMR, FLEXBUS_ADC_ISR);
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rkfb->config->grf_config(rkfb, rkfb_adc->slave_mode, rkfb_adc->cpol, rkfb_adc->cpha);
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return 0;
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}
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static int rockchip_flexbus_adc_parse_dt(struct rockchip_flexbus_adc *rkfb_adc)
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{
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rkfb_adc->slave_mode = device_property_read_bool(rkfb_adc->dev, "rockchip,slave-mode");
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rkfb_adc->auto_pad = device_property_read_bool(rkfb_adc->dev, "rockchip,auto-pad");
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rkfb_adc->cpol = device_property_read_bool(rkfb_adc->dev, "rockchip,cpol");
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rkfb_adc->cpha = device_property_read_bool(rkfb_adc->dev, "rockchip,cpha");
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rkfb_adc->free_sclk = device_property_read_bool(rkfb_adc->dev, "rockchip,free-sclk");
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if (device_property_read_u32(rkfb_adc->dev, "rockchip,dfs", &rkfb_adc->dfs)) {
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dev_err(rkfb_adc->dev, "failed to get dfs\n");
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return -EINVAL;
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}
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if (rkfb_adc->dfs != 4 && rkfb_adc->dfs != 8 && rkfb_adc->dfs != 16) {
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dev_err(rkfb_adc->dev, "invalid dfs\n");
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return -EINVAL;
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}
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return 0;
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}
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static const struct rockchip_flexbus_adc_ops rockchip_flexbus_adc_ops = {
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.read_block = rockchip_flexbus_adc_read_block,
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};
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static const struct of_device_id rockchip_flexbus_adc_of_match[] = {
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{ .compatible = "rockchip,flexbus-adc" },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, rockchip_flexbus_adc_of_match);
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static int rockchip_flexbus_adc_probe(struct platform_device *pdev)
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{
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struct rockchip_flexbus *rkfb = dev_get_drvdata(pdev->dev.parent);
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struct rockchip_flexbus_adc *rkfb_adc = NULL;
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struct iio_dev *indio_dev = NULL;
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int ret = 0;
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if (rkfb->opmode1 != ROCKCHIP_FLEXBUS1_OPMODE_ADC) {
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dev_err(&pdev->dev, "flexbus1 opmode mismatch!\n");
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return -ENODEV;
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}
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indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*rkfb_adc));
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if (!indio_dev)
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return -ENOMEM;
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rkfb_adc = iio_priv(indio_dev);
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platform_set_drvdata(pdev, indio_dev);
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rkfb_adc->dev = &pdev->dev;
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rkfb_adc->rkfb = rkfb;
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rockchip_flexbus_set_fb1(rkfb, rkfb_adc, rockchip_flexbus_adc_isr);
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ret = rockchip_flexbus_adc_parse_dt(rkfb_adc);
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if (ret)
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goto err_fb1;
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if (rkfb_adc->slave_mode) {
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rkfb_adc->ref_clk = devm_clk_get(&pdev->dev, "ref_clk");
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if (IS_ERR(rkfb_adc->ref_clk)) {
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dev_warn(rkfb_adc->dev,
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"failed to get ref_clk in slave-mode. Please make sure the ADC device has clock source.\n");
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rkfb_adc->ref_clk = NULL;
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} else {
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ret = clk_prepare_enable(rkfb_adc->ref_clk);
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if (ret) {
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dev_err(rkfb_adc->dev, "failed to enable ref_clk.\n");
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goto err_fb1;
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}
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}
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}
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mutex_init(&rkfb_adc->lock);
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init_completion(&rkfb_adc->completion);
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indio_dev->name = dev_name(&pdev->dev);
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indio_dev->info = &rockchip_flexbus_adc_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = rockchip_flexbus_adc_channel;
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indio_dev->num_channels = 1;
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ret = rockchip_flexbus_adc_init(rkfb_adc);
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if (ret)
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goto err_mutex_destroy;
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rkfb_adc->ops = &rockchip_flexbus_adc_ops;
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rkfb_adc->dst_buf_len = DIV_ROUND_UP(indio_dev->channels->scan_type.repeat * rkfb_adc->dfs,
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8);
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rkfb_adc->dst_buf_len = round_up(rkfb_adc->dst_buf_len, 0x40);
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if (rkfb_adc->dst_buf_len < 0x40 || rkfb_adc->dst_buf_len > 0x0fffffc0) {
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dev_err(rkfb_adc->dev, "buf_len should >= 0x40 and <= 0x0fffffc0\n");
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ret = -EINVAL;
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goto err_mutex_destroy;
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}
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rkfb_adc->dst_buf = dmam_alloc_coherent(rkfb_adc->dev, rkfb_adc->dst_buf_len,
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&rkfb_adc->dst_buf_phys, GFP_KERNEL | __GFP_ZERO);
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if (!rkfb_adc->dst_buf) {
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ret = -ENOMEM;
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goto err_mutex_destroy;
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}
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ret = devm_iio_triggered_buffer_setup(&pdev->dev, indio_dev, &iio_pollfunc_store_time,
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&rockchip_flexbus_adc_trigger_handler, NULL);
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if (ret)
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goto err_mutex_destroy;
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ret = devm_iio_device_register(&pdev->dev, indio_dev);
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if (ret)
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goto err_mutex_destroy;
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return ret;
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err_mutex_destroy:
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mutex_destroy(&rkfb_adc->lock);
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if (rkfb_adc->ref_clk)
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clk_disable_unprepare(rkfb_adc->ref_clk);
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err_fb1:
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rockchip_flexbus_set_fb1(rkfb, NULL, NULL);
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return ret;
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}
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static int rockchip_flexbus_adc_remove(struct platform_device *pdev)
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{
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struct iio_dev *indio_dev = platform_get_drvdata(pdev);
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struct rockchip_flexbus_adc *rkfb_adc = iio_priv(indio_dev);
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struct rockchip_flexbus *rkfb = rkfb_adc->rkfb;
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mutex_destroy(&rkfb_adc->lock);
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if (rkfb_adc->ref_clk)
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clk_disable_unprepare(rkfb_adc->ref_clk);
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rockchip_flexbus_set_fb1(rkfb, NULL, NULL);
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return 0;
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}
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static struct platform_driver rockchip_flexbus_adc_driver = {
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.probe = rockchip_flexbus_adc_probe,
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.remove = rockchip_flexbus_adc_remove,
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.driver = {
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.name = "rockchip_flexbus_adc",
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.of_match_table = rockchip_flexbus_adc_of_match,
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},
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};
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module_platform_driver(rockchip_flexbus_adc_driver);
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MODULE_DESCRIPTION("Rockchip Flexbus ADC driver");
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MODULE_LICENSE("GPL");
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