531 lines
		
	
	
		
			14 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			531 lines
		
	
	
		
			14 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-only
 | |
| /*
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|  * Copyright (C) 2013 Oskar Andero <oskar.andero@gmail.com>
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|  * Copyright (C) 2014 Rose Technology
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|  * 	   Allan Bendorff Jensen <abj@rosetechnology.dk>
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|  *	   Soren Andersen <san@rosetechnology.dk>
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|  *
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|  * Driver for following ADC chips from Microchip Technology's:
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|  * 10 Bit converter
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|  * MCP3001
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|  * MCP3002
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|  * MCP3004
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|  * MCP3008
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|  * ------------
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|  * 12 bit converter
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|  * MCP3201
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|  * MCP3202
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|  * MCP3204
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|  * MCP3208
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|  * ------------
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|  * 13 bit converter
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|  * MCP3301
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|  * ------------
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|  * 22 bit converter
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|  * MCP3550
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|  * MCP3551
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|  * MCP3553
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|  *
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|  * Datasheet can be found here:
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|  * https://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf  mcp3001
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|  * https://ww1.microchip.com/downloads/en/DeviceDoc/21294E.pdf  mcp3002
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|  * https://ww1.microchip.com/downloads/en/DeviceDoc/21295d.pdf  mcp3004/08
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|  * http://ww1.microchip.com/downloads/en/DeviceDoc/21290D.pdf  mcp3201
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|  * http://ww1.microchip.com/downloads/en/DeviceDoc/21034D.pdf  mcp3202
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|  * http://ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf  mcp3204/08
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|  * https://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf  mcp3301
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|  * http://ww1.microchip.com/downloads/en/DeviceDoc/21950D.pdf  mcp3550/1/3
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|  */
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| 
 | |
| #include <linux/err.h>
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| #include <linux/delay.h>
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| #include <linux/spi/spi.h>
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| #include <linux/module.h>
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| #include <linux/mod_devicetable.h>
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| #include <linux/iio/iio.h>
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| #include <linux/regulator/consumer.h>
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| 
 | |
| enum {
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| 	mcp3001,
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| 	mcp3002,
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| 	mcp3004,
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| 	mcp3008,
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| 	mcp3201,
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| 	mcp3202,
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| 	mcp3204,
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| 	mcp3208,
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| 	mcp3301,
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| 	mcp3550_50,
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| 	mcp3550_60,
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| 	mcp3551,
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| 	mcp3553,
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| };
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| 
 | |
| struct mcp320x_chip_info {
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| 	const struct iio_chan_spec *channels;
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| 	unsigned int num_channels;
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| 	unsigned int resolution;
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| 	unsigned int conv_time; /* usec */
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| };
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| 
 | |
| /**
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|  * struct mcp320x - Microchip SPI ADC instance
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|  * @spi: SPI slave (parent of the IIO device)
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|  * @msg: SPI message to select a channel and receive a value from the ADC
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|  * @transfer: SPI transfers used by @msg
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|  * @start_conv_msg: SPI message to start a conversion by briefly asserting CS
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|  * @start_conv_transfer: SPI transfer used by @start_conv_msg
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|  * @reg: regulator generating Vref
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|  * @lock: protects read sequences
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|  * @chip_info: ADC properties
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|  * @tx_buf: buffer for @transfer[0] (not used on single-channel converters)
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|  * @rx_buf: buffer for @transfer[1]
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|  */
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| struct mcp320x {
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| 	struct spi_device *spi;
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| 	struct spi_message msg;
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| 	struct spi_transfer transfer[2];
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| 	struct spi_message start_conv_msg;
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| 	struct spi_transfer start_conv_transfer;
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| 
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| 	struct regulator *reg;
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| 	struct mutex lock;
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| 	const struct mcp320x_chip_info *chip_info;
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| 
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| 	u8 tx_buf __aligned(IIO_DMA_MINALIGN);
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| 	u8 rx_buf[4];
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| };
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| 
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| static int mcp320x_channel_to_tx_data(int device_index,
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| 			const unsigned int channel, bool differential)
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| {
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| 	int start_bit = 1;
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| 
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| 	switch (device_index) {
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| 	case mcp3002:
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| 	case mcp3202:
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| 		return ((start_bit << 4) | (!differential << 3) |
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| 							(channel << 2));
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| 	case mcp3004:
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| 	case mcp3204:
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| 	case mcp3008:
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| 	case mcp3208:
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| 		return ((start_bit << 6) | (!differential << 5) |
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| 							(channel << 2));
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| 	default:
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| 		return -EINVAL;
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| 	}
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| }
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| 
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| static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel,
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| 				  bool differential, int device_index, int *val)
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| {
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| 	int ret;
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| 
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| 	if (adc->chip_info->conv_time) {
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| 		ret = spi_sync(adc->spi, &adc->start_conv_msg);
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| 		if (ret < 0)
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| 			return ret;
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| 
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| 		usleep_range(adc->chip_info->conv_time,
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| 			     adc->chip_info->conv_time + 100);
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| 	}
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| 
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| 	memset(&adc->rx_buf, 0, sizeof(adc->rx_buf));
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| 	if (adc->chip_info->num_channels > 1)
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| 		adc->tx_buf = mcp320x_channel_to_tx_data(device_index, channel,
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| 							 differential);
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| 
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| 	ret = spi_sync(adc->spi, &adc->msg);
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| 	if (ret < 0)
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| 		return ret;
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| 
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| 	switch (device_index) {
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| 	case mcp3001:
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| 		*val = (adc->rx_buf[0] << 5 | adc->rx_buf[1] >> 3);
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| 		return 0;
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| 	case mcp3002:
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| 	case mcp3004:
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| 	case mcp3008:
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| 		*val = (adc->rx_buf[0] << 2 | adc->rx_buf[1] >> 6);
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| 		return 0;
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| 	case mcp3201:
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| 		*val = (adc->rx_buf[0] << 7 | adc->rx_buf[1] >> 1);
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| 		return 0;
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| 	case mcp3202:
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| 	case mcp3204:
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| 	case mcp3208:
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| 		*val = (adc->rx_buf[0] << 4 | adc->rx_buf[1] >> 4);
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| 		return 0;
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| 	case mcp3301:
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| 		*val = sign_extend32((adc->rx_buf[0] & 0x1f) << 8
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| 				    | adc->rx_buf[1], 12);
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| 		return 0;
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| 	case mcp3550_50:
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| 	case mcp3550_60:
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| 	case mcp3551:
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| 	case mcp3553: {
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| 		u32 raw = be32_to_cpup((__be32 *)adc->rx_buf);
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| 
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| 		if (!(adc->spi->mode & SPI_CPOL))
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| 			raw <<= 1; /* strip Data Ready bit in SPI mode 0,0 */
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| 
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| 		/*
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| 		 * If the input is within -vref and vref, bit 21 is the sign.
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| 		 * Up to 12% overrange or underrange are allowed, in which case
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| 		 * bit 23 is the sign and bit 0 to 21 is the value.
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| 		 */
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| 		raw >>= 8;
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| 		if (raw & BIT(22) && raw & BIT(23))
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| 			return -EIO; /* cannot have overrange AND underrange */
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| 		else if (raw & BIT(22))
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| 			raw &= ~BIT(22); /* overrange */
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| 		else if (raw & BIT(23) || raw & BIT(21))
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| 			raw |= GENMASK(31, 22); /* underrange or negative */
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| 
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| 		*val = (s32)raw;
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| 		return 0;
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| 		}
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| 	default:
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| 		return -EINVAL;
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| 	}
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| }
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| 
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| static int mcp320x_read_raw(struct iio_dev *indio_dev,
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| 			    struct iio_chan_spec const *channel, int *val,
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| 			    int *val2, long mask)
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| {
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| 	struct mcp320x *adc = iio_priv(indio_dev);
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| 	int ret = -EINVAL;
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| 	int device_index = 0;
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| 
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| 	mutex_lock(&adc->lock);
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| 
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| 	device_index = spi_get_device_id(adc->spi)->driver_data;
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| 
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| 	switch (mask) {
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| 	case IIO_CHAN_INFO_RAW:
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| 		ret = mcp320x_adc_conversion(adc, channel->address,
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| 			channel->differential, device_index, val);
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| 		if (ret < 0)
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| 			goto out;
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| 
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| 		ret = IIO_VAL_INT;
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| 		break;
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| 
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| 	case IIO_CHAN_INFO_SCALE:
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| 		ret = regulator_get_voltage(adc->reg);
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| 		if (ret < 0)
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| 			goto out;
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| 
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| 		/* convert regulator output voltage to mV */
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| 		*val = ret / 1000;
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| 		*val2 = adc->chip_info->resolution;
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| 		ret = IIO_VAL_FRACTIONAL_LOG2;
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| 		break;
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| 	}
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| 
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| out:
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| 	mutex_unlock(&adc->lock);
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| 
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| 	return ret;
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| }
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| 
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| #define MCP320X_VOLTAGE_CHANNEL(num)				\
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| 	{							\
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| 		.type = IIO_VOLTAGE,				\
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| 		.indexed = 1,					\
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| 		.channel = (num),				\
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| 		.address = (num),				\
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| 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
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| 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
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| 	}
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| 
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| #define MCP320X_VOLTAGE_CHANNEL_DIFF(chan1, chan2)		\
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| 	{							\
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| 		.type = IIO_VOLTAGE,				\
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| 		.indexed = 1,					\
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| 		.channel = (chan1),				\
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| 		.channel2 = (chan2),				\
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| 		.address = (chan1),				\
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| 		.differential = 1,				\
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| 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
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| 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
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| 	}
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| 
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| static const struct iio_chan_spec mcp3201_channels[] = {
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| 	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
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| };
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| 
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| static const struct iio_chan_spec mcp3202_channels[] = {
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| 	MCP320X_VOLTAGE_CHANNEL(0),
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| 	MCP320X_VOLTAGE_CHANNEL(1),
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| 	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
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| 	MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
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| };
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| 
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| static const struct iio_chan_spec mcp3204_channels[] = {
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| 	MCP320X_VOLTAGE_CHANNEL(0),
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| 	MCP320X_VOLTAGE_CHANNEL(1),
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| 	MCP320X_VOLTAGE_CHANNEL(2),
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| 	MCP320X_VOLTAGE_CHANNEL(3),
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| 	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
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| 	MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
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| 	MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
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| 	MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
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| };
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| 
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| static const struct iio_chan_spec mcp3208_channels[] = {
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| 	MCP320X_VOLTAGE_CHANNEL(0),
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| 	MCP320X_VOLTAGE_CHANNEL(1),
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| 	MCP320X_VOLTAGE_CHANNEL(2),
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| 	MCP320X_VOLTAGE_CHANNEL(3),
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| 	MCP320X_VOLTAGE_CHANNEL(4),
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| 	MCP320X_VOLTAGE_CHANNEL(5),
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| 	MCP320X_VOLTAGE_CHANNEL(6),
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| 	MCP320X_VOLTAGE_CHANNEL(7),
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| 	MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
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| 	MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
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| 	MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
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| 	MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
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| 	MCP320X_VOLTAGE_CHANNEL_DIFF(4, 5),
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| 	MCP320X_VOLTAGE_CHANNEL_DIFF(5, 4),
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| 	MCP320X_VOLTAGE_CHANNEL_DIFF(6, 7),
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| 	MCP320X_VOLTAGE_CHANNEL_DIFF(7, 6),
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| };
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| 
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| static const struct iio_info mcp320x_info = {
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| 	.read_raw = mcp320x_read_raw,
 | |
| };
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| 
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| static const struct mcp320x_chip_info mcp320x_chip_infos[] = {
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| 	[mcp3001] = {
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| 		.channels = mcp3201_channels,
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| 		.num_channels = ARRAY_SIZE(mcp3201_channels),
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| 		.resolution = 10
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| 	},
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| 	[mcp3002] = {
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| 		.channels = mcp3202_channels,
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| 		.num_channels = ARRAY_SIZE(mcp3202_channels),
 | |
| 		.resolution = 10
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| 	},
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| 	[mcp3004] = {
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| 		.channels = mcp3204_channels,
 | |
| 		.num_channels = ARRAY_SIZE(mcp3204_channels),
 | |
| 		.resolution = 10
 | |
| 	},
 | |
| 	[mcp3008] = {
 | |
| 		.channels = mcp3208_channels,
 | |
| 		.num_channels = ARRAY_SIZE(mcp3208_channels),
 | |
| 		.resolution = 10
 | |
| 	},
 | |
| 	[mcp3201] = {
 | |
| 		.channels = mcp3201_channels,
 | |
| 		.num_channels = ARRAY_SIZE(mcp3201_channels),
 | |
| 		.resolution = 12
 | |
| 	},
 | |
| 	[mcp3202] = {
 | |
| 		.channels = mcp3202_channels,
 | |
| 		.num_channels = ARRAY_SIZE(mcp3202_channels),
 | |
| 		.resolution = 12
 | |
| 	},
 | |
| 	[mcp3204] = {
 | |
| 		.channels = mcp3204_channels,
 | |
| 		.num_channels = ARRAY_SIZE(mcp3204_channels),
 | |
| 		.resolution = 12
 | |
| 	},
 | |
| 	[mcp3208] = {
 | |
| 		.channels = mcp3208_channels,
 | |
| 		.num_channels = ARRAY_SIZE(mcp3208_channels),
 | |
| 		.resolution = 12
 | |
| 	},
 | |
| 	[mcp3301] = {
 | |
| 		.channels = mcp3201_channels,
 | |
| 		.num_channels = ARRAY_SIZE(mcp3201_channels),
 | |
| 		.resolution = 13
 | |
| 	},
 | |
| 	[mcp3550_50] = {
 | |
| 		.channels = mcp3201_channels,
 | |
| 		.num_channels = ARRAY_SIZE(mcp3201_channels),
 | |
| 		.resolution = 21,
 | |
| 		/* 2% max deviation + 144 clock periods to exit shutdown */
 | |
| 		.conv_time = 80000 * 1.02 + 144000 / 102.4,
 | |
| 	},
 | |
| 	[mcp3550_60] = {
 | |
| 		.channels = mcp3201_channels,
 | |
| 		.num_channels = ARRAY_SIZE(mcp3201_channels),
 | |
| 		.resolution = 21,
 | |
| 		.conv_time = 66670 * 1.02 + 144000 / 122.88,
 | |
| 	},
 | |
| 	[mcp3551] = {
 | |
| 		.channels = mcp3201_channels,
 | |
| 		.num_channels = ARRAY_SIZE(mcp3201_channels),
 | |
| 		.resolution = 21,
 | |
| 		.conv_time = 73100 * 1.02 + 144000 / 112.64,
 | |
| 	},
 | |
| 	[mcp3553] = {
 | |
| 		.channels = mcp3201_channels,
 | |
| 		.num_channels = ARRAY_SIZE(mcp3201_channels),
 | |
| 		.resolution = 21,
 | |
| 		.conv_time = 16670 * 1.02 + 144000 / 122.88,
 | |
| 	},
 | |
| };
 | |
| 
 | |
| static int mcp320x_probe(struct spi_device *spi)
 | |
| {
 | |
| 	struct iio_dev *indio_dev;
 | |
| 	struct mcp320x *adc;
 | |
| 	const struct mcp320x_chip_info *chip_info;
 | |
| 	int ret, device_index;
 | |
| 
 | |
| 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
 | |
| 	if (!indio_dev)
 | |
| 		return -ENOMEM;
 | |
| 
 | |
| 	adc = iio_priv(indio_dev);
 | |
| 	adc->spi = spi;
 | |
| 
 | |
| 	indio_dev->name = spi_get_device_id(spi)->name;
 | |
| 	indio_dev->modes = INDIO_DIRECT_MODE;
 | |
| 	indio_dev->info = &mcp320x_info;
 | |
| 	spi_set_drvdata(spi, indio_dev);
 | |
| 
 | |
| 	device_index = spi_get_device_id(spi)->driver_data;
 | |
| 	chip_info = &mcp320x_chip_infos[device_index];
 | |
| 	indio_dev->channels = chip_info->channels;
 | |
| 	indio_dev->num_channels = chip_info->num_channels;
 | |
| 
 | |
| 	adc->chip_info = chip_info;
 | |
| 
 | |
| 	adc->transfer[0].tx_buf = &adc->tx_buf;
 | |
| 	adc->transfer[0].len = sizeof(adc->tx_buf);
 | |
| 	adc->transfer[1].rx_buf = adc->rx_buf;
 | |
| 	adc->transfer[1].len = DIV_ROUND_UP(chip_info->resolution, 8);
 | |
| 
 | |
| 	if (chip_info->num_channels == 1)
 | |
| 		/* single-channel converters are rx only (no MOSI pin) */
 | |
| 		spi_message_init_with_transfers(&adc->msg,
 | |
| 						&adc->transfer[1], 1);
 | |
| 	else
 | |
| 		spi_message_init_with_transfers(&adc->msg, adc->transfer,
 | |
| 						ARRAY_SIZE(adc->transfer));
 | |
| 
 | |
| 	switch (device_index) {
 | |
| 	case mcp3550_50:
 | |
| 	case mcp3550_60:
 | |
| 	case mcp3551:
 | |
| 	case mcp3553:
 | |
| 		/* rx len increases from 24 to 25 bit in SPI mode 0,0 */
 | |
| 		if (!(spi->mode & SPI_CPOL))
 | |
| 			adc->transfer[1].len++;
 | |
| 
 | |
| 		/* conversions are started by asserting CS pin for 8 usec */
 | |
| 		adc->start_conv_transfer.delay.value = 8;
 | |
| 		adc->start_conv_transfer.delay.unit = SPI_DELAY_UNIT_USECS;
 | |
| 		spi_message_init_with_transfers(&adc->start_conv_msg,
 | |
| 						&adc->start_conv_transfer, 1);
 | |
| 
 | |
| 		/*
 | |
| 		 * If CS was previously kept low (continuous conversion mode)
 | |
| 		 * and then changed to high, the chip is in shutdown.
 | |
| 		 * Sometimes it fails to wake from shutdown and clocks out
 | |
| 		 * only 0xffffff.  The magic sequence of performing two
 | |
| 		 * conversions without delay between them resets the chip
 | |
| 		 * and ensures all subsequent conversions succeed.
 | |
| 		 */
 | |
| 		mcp320x_adc_conversion(adc, 0, 1, device_index, &ret);
 | |
| 		mcp320x_adc_conversion(adc, 0, 1, device_index, &ret);
 | |
| 	}
 | |
| 
 | |
| 	adc->reg = devm_regulator_get(&spi->dev, "vref");
 | |
| 	if (IS_ERR(adc->reg))
 | |
| 		return PTR_ERR(adc->reg);
 | |
| 
 | |
| 	ret = regulator_enable(adc->reg);
 | |
| 	if (ret < 0)
 | |
| 		return ret;
 | |
| 
 | |
| 	mutex_init(&adc->lock);
 | |
| 
 | |
| 	ret = iio_device_register(indio_dev);
 | |
| 	if (ret < 0)
 | |
| 		goto reg_disable;
 | |
| 
 | |
| 	return 0;
 | |
| 
 | |
| reg_disable:
 | |
| 	regulator_disable(adc->reg);
 | |
| 
 | |
| 	return ret;
 | |
| }
 | |
| 
 | |
| static void mcp320x_remove(struct spi_device *spi)
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| {
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| 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
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| 	struct mcp320x *adc = iio_priv(indio_dev);
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| 
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| 	iio_device_unregister(indio_dev);
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| 	regulator_disable(adc->reg);
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| }
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| 
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| static const struct of_device_id mcp320x_dt_ids[] = {
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| 	/* NOTE: The use of compatibles with no vendor prefix is deprecated. */
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| 	{ .compatible = "mcp3001" },
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| 	{ .compatible = "mcp3002" },
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| 	{ .compatible = "mcp3004" },
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| 	{ .compatible = "mcp3008" },
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| 	{ .compatible = "mcp3201" },
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| 	{ .compatible = "mcp3202" },
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| 	{ .compatible = "mcp3204" },
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| 	{ .compatible = "mcp3208" },
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| 	{ .compatible = "mcp3301" },
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| 	{ .compatible = "microchip,mcp3001" },
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| 	{ .compatible = "microchip,mcp3002" },
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| 	{ .compatible = "microchip,mcp3004" },
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| 	{ .compatible = "microchip,mcp3008" },
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| 	{ .compatible = "microchip,mcp3201" },
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| 	{ .compatible = "microchip,mcp3202" },
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| 	{ .compatible = "microchip,mcp3204" },
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| 	{ .compatible = "microchip,mcp3208" },
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| 	{ .compatible = "microchip,mcp3301" },
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| 	{ .compatible = "microchip,mcp3550-50" },
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| 	{ .compatible = "microchip,mcp3550-60" },
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| 	{ .compatible = "microchip,mcp3551" },
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| 	{ .compatible = "microchip,mcp3553" },
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| 	{ }
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| };
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| MODULE_DEVICE_TABLE(of, mcp320x_dt_ids);
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| 
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| static const struct spi_device_id mcp320x_id[] = {
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| 	{ "mcp3001", mcp3001 },
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| 	{ "mcp3002", mcp3002 },
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| 	{ "mcp3004", mcp3004 },
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| 	{ "mcp3008", mcp3008 },
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| 	{ "mcp3201", mcp3201 },
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| 	{ "mcp3202", mcp3202 },
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| 	{ "mcp3204", mcp3204 },
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| 	{ "mcp3208", mcp3208 },
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| 	{ "mcp3301", mcp3301 },
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| 	{ "mcp3550-50", mcp3550_50 },
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| 	{ "mcp3550-60", mcp3550_60 },
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| 	{ "mcp3551", mcp3551 },
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| 	{ "mcp3553", mcp3553 },
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| 	{ }
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| };
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| MODULE_DEVICE_TABLE(spi, mcp320x_id);
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| 
 | |
| static struct spi_driver mcp320x_driver = {
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| 	.driver = {
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| 		.name = "mcp320x",
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| 		.of_match_table = mcp320x_dt_ids,
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| 	},
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| 	.probe = mcp320x_probe,
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| 	.remove = mcp320x_remove,
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| 	.id_table = mcp320x_id,
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| };
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| module_spi_driver(mcp320x_driver);
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| 
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| MODULE_AUTHOR("Oskar Andero <oskar.andero@gmail.com>");
 | |
| MODULE_DESCRIPTION("Microchip Technology MCP3x01/02/04/08 and MCP3550/1/3");
 | |
| MODULE_LICENSE("GPL v2");
 |