392 lines
12 KiB
C
392 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* AMD Platform Management Framework Driver
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*
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* Copyright (c) 2022, Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Author: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
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*/
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#include <linux/workqueue.h>
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#include "pmf.h"
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static struct cnqf_config config_store;
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static int amd_pmf_set_cnqf(struct amd_pmf_dev *dev, int src, int idx,
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struct cnqf_config *table)
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{
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struct power_table_control *pc;
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pc = &config_store.mode_set[src][idx].power_control;
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amd_pmf_send_cmd(dev, SET_SPL, false, pc->spl, NULL);
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amd_pmf_send_cmd(dev, SET_FPPT, false, pc->fppt, NULL);
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amd_pmf_send_cmd(dev, SET_SPPT, false, pc->sppt, NULL);
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amd_pmf_send_cmd(dev, SET_SPPT_APU_ONLY, false, pc->sppt_apu_only, NULL);
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amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false, pc->stt_min, NULL);
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amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false, pc->stt_skin_temp[STT_TEMP_APU],
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NULL);
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amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false, pc->stt_skin_temp[STT_TEMP_HS2],
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NULL);
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if (is_apmf_func_supported(dev, APMF_FUNC_SET_FAN_IDX))
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apmf_update_fan_idx(dev,
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config_store.mode_set[src][idx].fan_control.manual,
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config_store.mode_set[src][idx].fan_control.fan_id);
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return 0;
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}
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static void amd_pmf_update_power_threshold(int src)
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{
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struct cnqf_mode_settings *ts;
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struct cnqf_tran_params *tp;
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tp = &config_store.trans_param[src][CNQF_TRANSITION_TO_QUIET];
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ts = &config_store.mode_set[src][CNQF_MODE_BALANCE];
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tp->power_threshold = ts->power_floor;
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tp = &config_store.trans_param[src][CNQF_TRANSITION_TO_TURBO];
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ts = &config_store.mode_set[src][CNQF_MODE_PERFORMANCE];
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tp->power_threshold = ts->power_floor;
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tp = &config_store.trans_param[src][CNQF_TRANSITION_FROM_BALANCE_TO_PERFORMANCE];
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ts = &config_store.mode_set[src][CNQF_MODE_BALANCE];
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tp->power_threshold = ts->power_floor;
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tp = &config_store.trans_param[src][CNQF_TRANSITION_FROM_PERFORMANCE_TO_BALANCE];
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ts = &config_store.mode_set[src][CNQF_MODE_PERFORMANCE];
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tp->power_threshold = ts->power_floor;
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tp = &config_store.trans_param[src][CNQF_TRANSITION_FROM_QUIET_TO_BALANCE];
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ts = &config_store.mode_set[src][CNQF_MODE_QUIET];
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tp->power_threshold = ts->power_floor;
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tp = &config_store.trans_param[src][CNQF_TRANSITION_FROM_TURBO_TO_PERFORMANCE];
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ts = &config_store.mode_set[src][CNQF_MODE_TURBO];
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tp->power_threshold = ts->power_floor;
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}
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static const char *state_as_str(unsigned int state)
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{
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switch (state) {
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case CNQF_MODE_QUIET:
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return "QUIET";
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case CNQF_MODE_BALANCE:
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return "BALANCED";
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case CNQF_MODE_TURBO:
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return "TURBO";
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case CNQF_MODE_PERFORMANCE:
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return "PERFORMANCE";
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default:
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return "Unknown CnQF mode";
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}
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}
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static int amd_pmf_cnqf_get_power_source(struct amd_pmf_dev *dev)
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{
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if (is_apmf_func_supported(dev, APMF_FUNC_DYN_SLIDER_AC) &&
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is_apmf_func_supported(dev, APMF_FUNC_DYN_SLIDER_DC))
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return amd_pmf_get_power_source();
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else if (is_apmf_func_supported(dev, APMF_FUNC_DYN_SLIDER_DC))
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return POWER_SOURCE_DC;
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else
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return POWER_SOURCE_AC;
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}
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int amd_pmf_trans_cnqf(struct amd_pmf_dev *dev, int socket_power, ktime_t time_lapsed_ms)
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{
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struct cnqf_tran_params *tp;
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int src, i, j;
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u32 avg_power = 0;
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src = amd_pmf_cnqf_get_power_source(dev);
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if (is_pprof_balanced(dev)) {
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amd_pmf_set_cnqf(dev, src, config_store.current_mode, NULL);
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} else {
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/*
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* Return from here if the platform_profile is not balanced
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* so that preference is given to user mode selection, rather
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* than enforcing CnQF to run all the time (if enabled)
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*/
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return -EINVAL;
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}
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for (i = 0; i < CNQF_TRANSITION_MAX; i++) {
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config_store.trans_param[src][i].timer += time_lapsed_ms;
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config_store.trans_param[src][i].total_power += socket_power;
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config_store.trans_param[src][i].count++;
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tp = &config_store.trans_param[src][i];
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if (tp->timer >= tp->time_constant && tp->count) {
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avg_power = tp->total_power / tp->count;
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/* Reset the indices */
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tp->timer = 0;
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tp->total_power = 0;
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tp->count = 0;
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if ((tp->shifting_up && avg_power >= tp->power_threshold) ||
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(!tp->shifting_up && avg_power <= tp->power_threshold)) {
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tp->priority = true;
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} else {
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tp->priority = false;
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}
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}
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}
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dev_dbg(dev->dev, "[CNQF] Avg power: %u mW socket power: %u mW mode:%s\n",
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avg_power, socket_power, state_as_str(config_store.current_mode));
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for (j = 0; j < CNQF_TRANSITION_MAX; j++) {
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/* apply the highest priority */
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if (config_store.trans_param[src][j].priority) {
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if (config_store.current_mode !=
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config_store.trans_param[src][j].target_mode) {
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config_store.current_mode =
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config_store.trans_param[src][j].target_mode;
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dev_dbg(dev->dev, "Moving to Mode :%s\n",
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state_as_str(config_store.current_mode));
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amd_pmf_set_cnqf(dev, src,
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config_store.current_mode, NULL);
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}
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break;
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}
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}
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return 0;
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}
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static void amd_pmf_update_trans_data(int idx, struct apmf_dyn_slider_output out)
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{
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struct cnqf_tran_params *tp;
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tp = &config_store.trans_param[idx][CNQF_TRANSITION_TO_QUIET];
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tp->time_constant = out.t_balanced_to_quiet;
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tp->target_mode = CNQF_MODE_QUIET;
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tp->shifting_up = false;
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tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_BALANCE_TO_PERFORMANCE];
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tp->time_constant = out.t_balanced_to_perf;
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tp->target_mode = CNQF_MODE_PERFORMANCE;
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tp->shifting_up = true;
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tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_QUIET_TO_BALANCE];
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tp->time_constant = out.t_quiet_to_balanced;
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tp->target_mode = CNQF_MODE_BALANCE;
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tp->shifting_up = true;
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tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_PERFORMANCE_TO_BALANCE];
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tp->time_constant = out.t_perf_to_balanced;
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tp->target_mode = CNQF_MODE_BALANCE;
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tp->shifting_up = false;
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tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_TURBO_TO_PERFORMANCE];
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tp->time_constant = out.t_turbo_to_perf;
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tp->target_mode = CNQF_MODE_PERFORMANCE;
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tp->shifting_up = false;
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tp = &config_store.trans_param[idx][CNQF_TRANSITION_TO_TURBO];
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tp->time_constant = out.t_perf_to_turbo;
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tp->target_mode = CNQF_MODE_TURBO;
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tp->shifting_up = true;
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}
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static void amd_pmf_update_mode_set(int idx, struct apmf_dyn_slider_output out)
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{
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struct cnqf_mode_settings *ms;
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/* Quiet Mode */
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ms = &config_store.mode_set[idx][CNQF_MODE_QUIET];
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ms->power_floor = out.ps[APMF_CNQF_QUIET].pfloor;
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ms->power_control.fppt = out.ps[APMF_CNQF_QUIET].fppt;
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ms->power_control.sppt = out.ps[APMF_CNQF_QUIET].sppt;
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ms->power_control.sppt_apu_only = out.ps[APMF_CNQF_QUIET].sppt_apu_only;
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ms->power_control.spl = out.ps[APMF_CNQF_QUIET].spl;
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ms->power_control.stt_min = out.ps[APMF_CNQF_QUIET].stt_min_limit;
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ms->power_control.stt_skin_temp[STT_TEMP_APU] =
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out.ps[APMF_CNQF_QUIET].stt_skintemp[STT_TEMP_APU];
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ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
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out.ps[APMF_CNQF_QUIET].stt_skintemp[STT_TEMP_HS2];
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ms->fan_control.fan_id = out.ps[APMF_CNQF_QUIET].fan_id;
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/* Balance Mode */
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ms = &config_store.mode_set[idx][CNQF_MODE_BALANCE];
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ms->power_floor = out.ps[APMF_CNQF_BALANCE].pfloor;
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ms->power_control.fppt = out.ps[APMF_CNQF_BALANCE].fppt;
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ms->power_control.sppt = out.ps[APMF_CNQF_BALANCE].sppt;
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ms->power_control.sppt_apu_only = out.ps[APMF_CNQF_BALANCE].sppt_apu_only;
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ms->power_control.spl = out.ps[APMF_CNQF_BALANCE].spl;
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ms->power_control.stt_min = out.ps[APMF_CNQF_BALANCE].stt_min_limit;
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ms->power_control.stt_skin_temp[STT_TEMP_APU] =
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out.ps[APMF_CNQF_BALANCE].stt_skintemp[STT_TEMP_APU];
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ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
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out.ps[APMF_CNQF_BALANCE].stt_skintemp[STT_TEMP_HS2];
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ms->fan_control.fan_id = out.ps[APMF_CNQF_BALANCE].fan_id;
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/* Performance Mode */
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ms = &config_store.mode_set[idx][CNQF_MODE_PERFORMANCE];
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ms->power_floor = out.ps[APMF_CNQF_PERFORMANCE].pfloor;
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ms->power_control.fppt = out.ps[APMF_CNQF_PERFORMANCE].fppt;
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ms->power_control.sppt = out.ps[APMF_CNQF_PERFORMANCE].sppt;
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ms->power_control.sppt_apu_only = out.ps[APMF_CNQF_PERFORMANCE].sppt_apu_only;
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ms->power_control.spl = out.ps[APMF_CNQF_PERFORMANCE].spl;
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ms->power_control.stt_min = out.ps[APMF_CNQF_PERFORMANCE].stt_min_limit;
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ms->power_control.stt_skin_temp[STT_TEMP_APU] =
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out.ps[APMF_CNQF_PERFORMANCE].stt_skintemp[STT_TEMP_APU];
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ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
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out.ps[APMF_CNQF_PERFORMANCE].stt_skintemp[STT_TEMP_HS2];
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ms->fan_control.fan_id = out.ps[APMF_CNQF_PERFORMANCE].fan_id;
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/* Turbo Mode */
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ms = &config_store.mode_set[idx][CNQF_MODE_TURBO];
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ms->power_floor = out.ps[APMF_CNQF_TURBO].pfloor;
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ms->power_control.fppt = out.ps[APMF_CNQF_TURBO].fppt;
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ms->power_control.sppt = out.ps[APMF_CNQF_TURBO].sppt;
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ms->power_control.sppt_apu_only = out.ps[APMF_CNQF_TURBO].sppt_apu_only;
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ms->power_control.spl = out.ps[APMF_CNQF_TURBO].spl;
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ms->power_control.stt_min = out.ps[APMF_CNQF_TURBO].stt_min_limit;
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ms->power_control.stt_skin_temp[STT_TEMP_APU] =
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out.ps[APMF_CNQF_TURBO].stt_skintemp[STT_TEMP_APU];
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ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
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out.ps[APMF_CNQF_TURBO].stt_skintemp[STT_TEMP_HS2];
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ms->fan_control.fan_id = out.ps[APMF_CNQF_TURBO].fan_id;
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}
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static int amd_pmf_check_flags(struct amd_pmf_dev *dev)
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{
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struct apmf_dyn_slider_output out = {};
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if (is_apmf_func_supported(dev, APMF_FUNC_DYN_SLIDER_AC))
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apmf_get_dyn_slider_def_ac(dev, &out);
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else if (is_apmf_func_supported(dev, APMF_FUNC_DYN_SLIDER_DC))
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apmf_get_dyn_slider_def_dc(dev, &out);
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return out.flags;
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}
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static int amd_pmf_load_defaults_cnqf(struct amd_pmf_dev *dev)
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{
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struct apmf_dyn_slider_output out;
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int i, j, ret;
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for (i = 0; i < POWER_SOURCE_MAX; i++) {
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if (!is_apmf_func_supported(dev, APMF_FUNC_DYN_SLIDER_AC + i))
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continue;
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if (i == POWER_SOURCE_AC)
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ret = apmf_get_dyn_slider_def_ac(dev, &out);
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else
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ret = apmf_get_dyn_slider_def_dc(dev, &out);
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if (ret) {
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dev_err(dev->dev, "APMF apmf_get_dyn_slider_def_dc failed :%d\n", ret);
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return ret;
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}
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amd_pmf_update_mode_set(i, out);
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amd_pmf_update_trans_data(i, out);
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amd_pmf_update_power_threshold(i);
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for (j = 0; j < CNQF_MODE_MAX; j++) {
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if (config_store.mode_set[i][j].fan_control.fan_id == FAN_INDEX_AUTO)
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config_store.mode_set[i][j].fan_control.manual = false;
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else
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config_store.mode_set[i][j].fan_control.manual = true;
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}
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}
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/* set to initial default values */
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config_store.current_mode = CNQF_MODE_BALANCE;
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return 0;
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}
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static ssize_t cnqf_enable_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct amd_pmf_dev *pdev = dev_get_drvdata(dev);
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int result, src;
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bool input;
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result = kstrtobool(buf, &input);
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if (result)
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return result;
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src = amd_pmf_cnqf_get_power_source(pdev);
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pdev->cnqf_enabled = input;
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if (pdev->cnqf_enabled && is_pprof_balanced(pdev)) {
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amd_pmf_set_cnqf(pdev, src, config_store.current_mode, NULL);
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} else {
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if (is_apmf_func_supported(pdev, APMF_FUNC_STATIC_SLIDER_GRANULAR))
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amd_pmf_set_sps_power_limits(pdev);
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}
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dev_dbg(pdev->dev, "Received CnQF %s\n", input ? "on" : "off");
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return count;
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}
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static ssize_t cnqf_enable_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct amd_pmf_dev *pdev = dev_get_drvdata(dev);
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return sysfs_emit(buf, "%s\n", pdev->cnqf_enabled ? "on" : "off");
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}
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static DEVICE_ATTR_RW(cnqf_enable);
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static umode_t cnqf_feature_is_visible(struct kobject *kobj,
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struct attribute *attr, int n)
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{
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struct device *dev = kobj_to_dev(kobj);
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struct amd_pmf_dev *pdev = dev_get_drvdata(dev);
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return pdev->cnqf_supported ? attr->mode : 0;
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}
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static struct attribute *cnqf_feature_attrs[] = {
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&dev_attr_cnqf_enable.attr,
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NULL
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};
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const struct attribute_group cnqf_feature_attribute_group = {
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.is_visible = cnqf_feature_is_visible,
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.attrs = cnqf_feature_attrs,
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};
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void amd_pmf_deinit_cnqf(struct amd_pmf_dev *dev)
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{
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cancel_delayed_work_sync(&dev->work_buffer);
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}
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int amd_pmf_init_cnqf(struct amd_pmf_dev *dev)
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{
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int ret, src;
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/*
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* Note the caller of this function has already checked that both
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* APMF_FUNC_DYN_SLIDER_AC and APMF_FUNC_DYN_SLIDER_DC are supported.
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*/
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ret = amd_pmf_load_defaults_cnqf(dev);
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if (ret < 0)
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return ret;
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amd_pmf_init_metrics_table(dev);
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dev->cnqf_supported = true;
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dev->cnqf_enabled = amd_pmf_check_flags(dev);
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/* update the thermal for CnQF */
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if (dev->cnqf_enabled && is_pprof_balanced(dev)) {
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src = amd_pmf_cnqf_get_power_source(dev);
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amd_pmf_set_cnqf(dev, src, config_store.current_mode, NULL);
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}
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return 0;
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}
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