602 lines
16 KiB
C
602 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2020 Invensense, Inc.
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*/
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/mutex.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/delay.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/buffer.h>
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#include "inv_icm42600.h"
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#include "inv_icm42600_timestamp.h"
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#include "inv_icm42600_buffer.h"
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/* FIFO header: 1 byte */
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#define INV_ICM42600_FIFO_HEADER_MSG BIT(7)
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#define INV_ICM42600_FIFO_HEADER_ACCEL BIT(6)
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#define INV_ICM42600_FIFO_HEADER_GYRO BIT(5)
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#define INV_ICM42600_FIFO_HEADER_TMST_FSYNC GENMASK(3, 2)
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#define INV_ICM42600_FIFO_HEADER_ODR_ACCEL BIT(1)
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#define INV_ICM42600_FIFO_HEADER_ODR_GYRO BIT(0)
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struct inv_icm42600_fifo_1sensor_packet {
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uint8_t header;
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struct inv_icm42600_fifo_sensor_data data;
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int8_t temp;
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} __packed;
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#define INV_ICM42600_FIFO_1SENSOR_PACKET_SIZE 8
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struct inv_icm42600_fifo_2sensors_packet {
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uint8_t header;
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struct inv_icm42600_fifo_sensor_data accel;
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struct inv_icm42600_fifo_sensor_data gyro;
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int8_t temp;
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__be16 timestamp;
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} __packed;
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#define INV_ICM42600_FIFO_2SENSORS_PACKET_SIZE 16
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ssize_t inv_icm42600_fifo_decode_packet(const void *packet, const void **accel,
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const void **gyro, const int8_t **temp,
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const void **timestamp, unsigned int *odr)
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{
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const struct inv_icm42600_fifo_1sensor_packet *pack1 = packet;
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const struct inv_icm42600_fifo_2sensors_packet *pack2 = packet;
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uint8_t header = *((const uint8_t *)packet);
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/* FIFO empty */
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if (header & INV_ICM42600_FIFO_HEADER_MSG) {
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*accel = NULL;
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*gyro = NULL;
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*temp = NULL;
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*timestamp = NULL;
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*odr = 0;
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return 0;
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}
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/* handle odr flags */
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*odr = 0;
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if (header & INV_ICM42600_FIFO_HEADER_ODR_GYRO)
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*odr |= INV_ICM42600_SENSOR_GYRO;
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if (header & INV_ICM42600_FIFO_HEADER_ODR_ACCEL)
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*odr |= INV_ICM42600_SENSOR_ACCEL;
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/* accel + gyro */
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if ((header & INV_ICM42600_FIFO_HEADER_ACCEL) &&
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(header & INV_ICM42600_FIFO_HEADER_GYRO)) {
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*accel = &pack2->accel;
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*gyro = &pack2->gyro;
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*temp = &pack2->temp;
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*timestamp = &pack2->timestamp;
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return INV_ICM42600_FIFO_2SENSORS_PACKET_SIZE;
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}
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/* accel only */
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if (header & INV_ICM42600_FIFO_HEADER_ACCEL) {
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*accel = &pack1->data;
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*gyro = NULL;
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*temp = &pack1->temp;
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*timestamp = NULL;
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return INV_ICM42600_FIFO_1SENSOR_PACKET_SIZE;
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}
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/* gyro only */
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if (header & INV_ICM42600_FIFO_HEADER_GYRO) {
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*accel = NULL;
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*gyro = &pack1->data;
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*temp = &pack1->temp;
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*timestamp = NULL;
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return INV_ICM42600_FIFO_1SENSOR_PACKET_SIZE;
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}
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/* invalid packet if here */
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return -EINVAL;
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}
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void inv_icm42600_buffer_update_fifo_period(struct inv_icm42600_state *st)
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{
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uint32_t period_gyro, period_accel, period;
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if (st->fifo.en & INV_ICM42600_SENSOR_GYRO)
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period_gyro = inv_icm42600_odr_to_period(st->conf.gyro.odr);
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else
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period_gyro = U32_MAX;
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if (st->fifo.en & INV_ICM42600_SENSOR_ACCEL)
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period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr);
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else
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period_accel = U32_MAX;
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if (period_gyro <= period_accel)
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period = period_gyro;
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else
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period = period_accel;
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st->fifo.period = period;
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}
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int inv_icm42600_buffer_set_fifo_en(struct inv_icm42600_state *st,
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unsigned int fifo_en)
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{
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unsigned int mask, val;
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int ret;
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/* update only FIFO EN bits */
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mask = INV_ICM42600_FIFO_CONFIG1_TMST_FSYNC_EN |
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INV_ICM42600_FIFO_CONFIG1_TEMP_EN |
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INV_ICM42600_FIFO_CONFIG1_GYRO_EN |
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INV_ICM42600_FIFO_CONFIG1_ACCEL_EN;
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val = 0;
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if (fifo_en & INV_ICM42600_SENSOR_GYRO)
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val |= INV_ICM42600_FIFO_CONFIG1_GYRO_EN;
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if (fifo_en & INV_ICM42600_SENSOR_ACCEL)
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val |= INV_ICM42600_FIFO_CONFIG1_ACCEL_EN;
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if (fifo_en & INV_ICM42600_SENSOR_TEMP)
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val |= INV_ICM42600_FIFO_CONFIG1_TEMP_EN;
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ret = regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1, mask, val);
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if (ret)
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return ret;
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st->fifo.en = fifo_en;
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inv_icm42600_buffer_update_fifo_period(st);
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return 0;
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}
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static size_t inv_icm42600_get_packet_size(unsigned int fifo_en)
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{
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size_t packet_size;
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if ((fifo_en & INV_ICM42600_SENSOR_GYRO) &&
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(fifo_en & INV_ICM42600_SENSOR_ACCEL))
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packet_size = INV_ICM42600_FIFO_2SENSORS_PACKET_SIZE;
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else
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packet_size = INV_ICM42600_FIFO_1SENSOR_PACKET_SIZE;
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return packet_size;
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}
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static unsigned int inv_icm42600_wm_truncate(unsigned int watermark,
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size_t packet_size)
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{
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size_t wm_size;
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unsigned int wm;
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wm_size = watermark * packet_size;
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if (wm_size > INV_ICM42600_FIFO_WATERMARK_MAX)
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wm_size = INV_ICM42600_FIFO_WATERMARK_MAX;
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wm = wm_size / packet_size;
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return wm;
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}
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/**
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* inv_icm42600_buffer_update_watermark - update watermark FIFO threshold
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* @st: driver internal state
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*
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* Returns 0 on success, a negative error code otherwise.
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*
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* FIFO watermark threshold is computed based on the required watermark values
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* set for gyro and accel sensors. Since watermark is all about acceptable data
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* latency, use the smallest setting between the 2. It means choosing the
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* smallest latency but this is not as simple as choosing the smallest watermark
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* value. Latency depends on watermark and ODR. It requires several steps:
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* 1) compute gyro and accel latencies and choose the smallest value.
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* 2) adapt the choosen latency so that it is a multiple of both gyro and accel
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* ones. Otherwise it is possible that you don't meet a requirement. (for
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* example with gyro @100Hz wm 4 and accel @100Hz with wm 6, choosing the
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* value of 4 will not meet accel latency requirement because 6 is not a
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* multiple of 4. You need to use the value 2.)
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* 3) Since all periods are multiple of each others, watermark is computed by
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* dividing this computed latency by the smallest period, which corresponds
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* to the FIFO frequency. Beware that this is only true because we are not
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* using 500Hz frequency which is not a multiple of the others.
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*/
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int inv_icm42600_buffer_update_watermark(struct inv_icm42600_state *st)
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{
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size_t packet_size, wm_size;
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unsigned int wm_gyro, wm_accel, watermark;
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uint32_t period_gyro, period_accel, period;
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uint32_t latency_gyro, latency_accel, latency;
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bool restore;
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__le16 raw_wm;
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int ret;
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packet_size = inv_icm42600_get_packet_size(st->fifo.en);
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/* compute sensors latency, depending on sensor watermark and odr */
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wm_gyro = inv_icm42600_wm_truncate(st->fifo.watermark.gyro, packet_size);
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wm_accel = inv_icm42600_wm_truncate(st->fifo.watermark.accel, packet_size);
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/* use us for odr to avoid overflow using 32 bits values */
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period_gyro = inv_icm42600_odr_to_period(st->conf.gyro.odr) / 1000UL;
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period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr) / 1000UL;
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latency_gyro = period_gyro * wm_gyro;
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latency_accel = period_accel * wm_accel;
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/* 0 value for watermark means that the sensor is turned off */
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if (latency_gyro == 0) {
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watermark = wm_accel;
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} else if (latency_accel == 0) {
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watermark = wm_gyro;
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} else {
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/* compute the smallest latency that is a multiple of both */
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if (latency_gyro <= latency_accel)
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latency = latency_gyro - (latency_accel % latency_gyro);
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else
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latency = latency_accel - (latency_gyro % latency_accel);
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/* use the shortest period */
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if (period_gyro <= period_accel)
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period = period_gyro;
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else
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period = period_accel;
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/* all this works because periods are multiple of each others */
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watermark = latency / period;
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if (watermark < 1)
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watermark = 1;
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}
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/* compute watermark value in bytes */
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wm_size = watermark * packet_size;
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/* changing FIFO watermark requires to turn off watermark interrupt */
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ret = regmap_update_bits_check(st->map, INV_ICM42600_REG_INT_SOURCE0,
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INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN,
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0, &restore);
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if (ret)
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return ret;
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raw_wm = INV_ICM42600_FIFO_WATERMARK_VAL(wm_size);
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memcpy(st->buffer, &raw_wm, sizeof(raw_wm));
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ret = regmap_bulk_write(st->map, INV_ICM42600_REG_FIFO_WATERMARK,
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st->buffer, sizeof(raw_wm));
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if (ret)
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return ret;
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/* restore watermark interrupt */
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if (restore) {
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ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0,
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INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN,
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INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN);
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if (ret)
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return ret;
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}
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return 0;
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}
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static int inv_icm42600_buffer_preenable(struct iio_dev *indio_dev)
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{
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struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
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struct device *dev = regmap_get_device(st->map);
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struct inv_icm42600_timestamp *ts = iio_priv(indio_dev);
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pm_runtime_get_sync(dev);
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mutex_lock(&st->lock);
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inv_icm42600_timestamp_reset(ts);
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mutex_unlock(&st->lock);
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return 0;
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}
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/*
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* update_scan_mode callback is turning sensors on and setting data FIFO enable
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* bits.
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*/
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static int inv_icm42600_buffer_postenable(struct iio_dev *indio_dev)
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{
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struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
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int ret;
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mutex_lock(&st->lock);
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/* exit if FIFO is already on */
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if (st->fifo.on) {
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ret = 0;
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goto out_on;
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}
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/* set FIFO threshold interrupt */
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ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0,
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INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN,
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INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN);
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if (ret)
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goto out_unlock;
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/* flush FIFO data */
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ret = regmap_write(st->map, INV_ICM42600_REG_SIGNAL_PATH_RESET,
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INV_ICM42600_SIGNAL_PATH_RESET_FIFO_FLUSH);
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if (ret)
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goto out_unlock;
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/* set FIFO in streaming mode */
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ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG,
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INV_ICM42600_FIFO_CONFIG_STREAM);
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if (ret)
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goto out_unlock;
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/* workaround: first read of FIFO count after reset is always 0 */
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ret = regmap_bulk_read(st->map, INV_ICM42600_REG_FIFO_COUNT, st->buffer, 2);
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if (ret)
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goto out_unlock;
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out_on:
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/* increase FIFO on counter */
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st->fifo.on++;
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out_unlock:
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mutex_unlock(&st->lock);
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return ret;
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}
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static int inv_icm42600_buffer_predisable(struct iio_dev *indio_dev)
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{
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struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
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int ret;
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mutex_lock(&st->lock);
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/* exit if there are several sensors using the FIFO */
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if (st->fifo.on > 1) {
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ret = 0;
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goto out_off;
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}
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/* set FIFO in bypass mode */
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ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG,
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INV_ICM42600_FIFO_CONFIG_BYPASS);
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if (ret)
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goto out_unlock;
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/* flush FIFO data */
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ret = regmap_write(st->map, INV_ICM42600_REG_SIGNAL_PATH_RESET,
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INV_ICM42600_SIGNAL_PATH_RESET_FIFO_FLUSH);
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if (ret)
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goto out_unlock;
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/* disable FIFO threshold interrupt */
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ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0,
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INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN, 0);
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if (ret)
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goto out_unlock;
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out_off:
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/* decrease FIFO on counter */
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st->fifo.on--;
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out_unlock:
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mutex_unlock(&st->lock);
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return ret;
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}
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static int inv_icm42600_buffer_postdisable(struct iio_dev *indio_dev)
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{
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struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
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struct device *dev = regmap_get_device(st->map);
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unsigned int sensor;
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unsigned int *watermark;
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struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT;
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unsigned int sleep_temp = 0;
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unsigned int sleep_sensor = 0;
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unsigned int sleep;
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int ret;
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if (indio_dev == st->indio_gyro) {
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sensor = INV_ICM42600_SENSOR_GYRO;
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watermark = &st->fifo.watermark.gyro;
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} else if (indio_dev == st->indio_accel) {
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sensor = INV_ICM42600_SENSOR_ACCEL;
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watermark = &st->fifo.watermark.accel;
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} else {
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return -EINVAL;
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}
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mutex_lock(&st->lock);
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ret = inv_icm42600_buffer_set_fifo_en(st, st->fifo.en & ~sensor);
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if (ret)
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goto out_unlock;
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*watermark = 0;
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ret = inv_icm42600_buffer_update_watermark(st);
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if (ret)
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goto out_unlock;
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conf.mode = INV_ICM42600_SENSOR_MODE_OFF;
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if (sensor == INV_ICM42600_SENSOR_GYRO)
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ret = inv_icm42600_set_gyro_conf(st, &conf, &sleep_sensor);
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else
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ret = inv_icm42600_set_accel_conf(st, &conf, &sleep_sensor);
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if (ret)
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goto out_unlock;
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/* if FIFO is off, turn temperature off */
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if (!st->fifo.on)
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ret = inv_icm42600_set_temp_conf(st, false, &sleep_temp);
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out_unlock:
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mutex_unlock(&st->lock);
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/* sleep maximum required time */
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if (sleep_sensor > sleep_temp)
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sleep = sleep_sensor;
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else
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sleep = sleep_temp;
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if (sleep)
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msleep(sleep);
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pm_runtime_mark_last_busy(dev);
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pm_runtime_put_autosuspend(dev);
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return ret;
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}
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const struct iio_buffer_setup_ops inv_icm42600_buffer_ops = {
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.preenable = inv_icm42600_buffer_preenable,
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.postenable = inv_icm42600_buffer_postenable,
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.predisable = inv_icm42600_buffer_predisable,
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.postdisable = inv_icm42600_buffer_postdisable,
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};
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int inv_icm42600_buffer_fifo_read(struct inv_icm42600_state *st,
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unsigned int max)
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{
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size_t max_count;
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__be16 *raw_fifo_count;
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ssize_t i, size;
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const void *accel, *gyro, *timestamp;
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const int8_t *temp;
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unsigned int odr;
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int ret;
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/* reset all samples counters */
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st->fifo.count = 0;
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st->fifo.nb.gyro = 0;
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st->fifo.nb.accel = 0;
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st->fifo.nb.total = 0;
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/* compute maximum FIFO read size */
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if (max == 0)
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max_count = sizeof(st->fifo.data);
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else
|
|
max_count = max * inv_icm42600_get_packet_size(st->fifo.en);
|
|
|
|
/* read FIFO count value */
|
|
raw_fifo_count = (__be16 *)st->buffer;
|
|
ret = regmap_bulk_read(st->map, INV_ICM42600_REG_FIFO_COUNT,
|
|
raw_fifo_count, sizeof(*raw_fifo_count));
|
|
if (ret)
|
|
return ret;
|
|
st->fifo.count = be16_to_cpup(raw_fifo_count);
|
|
|
|
/* check and clamp FIFO count value */
|
|
if (st->fifo.count == 0)
|
|
return 0;
|
|
if (st->fifo.count > max_count)
|
|
st->fifo.count = max_count;
|
|
|
|
/* read all FIFO data in internal buffer */
|
|
ret = regmap_noinc_read(st->map, INV_ICM42600_REG_FIFO_DATA,
|
|
st->fifo.data, st->fifo.count);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* compute number of samples for each sensor */
|
|
for (i = 0; i < st->fifo.count; i += size) {
|
|
size = inv_icm42600_fifo_decode_packet(&st->fifo.data[i],
|
|
&accel, &gyro, &temp, ×tamp, &odr);
|
|
if (size <= 0)
|
|
break;
|
|
if (gyro != NULL && inv_icm42600_fifo_is_data_valid(gyro))
|
|
st->fifo.nb.gyro++;
|
|
if (accel != NULL && inv_icm42600_fifo_is_data_valid(accel))
|
|
st->fifo.nb.accel++;
|
|
st->fifo.nb.total++;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int inv_icm42600_buffer_fifo_parse(struct inv_icm42600_state *st)
|
|
{
|
|
struct inv_icm42600_timestamp *ts;
|
|
int ret;
|
|
|
|
if (st->fifo.nb.total == 0)
|
|
return 0;
|
|
|
|
/* handle gyroscope timestamp and FIFO data parsing */
|
|
ts = iio_priv(st->indio_gyro);
|
|
inv_icm42600_timestamp_interrupt(ts, st->fifo.period, st->fifo.nb.total,
|
|
st->fifo.nb.gyro, st->timestamp.gyro);
|
|
if (st->fifo.nb.gyro > 0) {
|
|
ret = inv_icm42600_gyro_parse_fifo(st->indio_gyro);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
/* handle accelerometer timestamp and FIFO data parsing */
|
|
ts = iio_priv(st->indio_accel);
|
|
inv_icm42600_timestamp_interrupt(ts, st->fifo.period, st->fifo.nb.total,
|
|
st->fifo.nb.accel, st->timestamp.accel);
|
|
if (st->fifo.nb.accel > 0) {
|
|
ret = inv_icm42600_accel_parse_fifo(st->indio_accel);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int inv_icm42600_buffer_hwfifo_flush(struct inv_icm42600_state *st,
|
|
unsigned int count)
|
|
{
|
|
struct inv_icm42600_timestamp *ts;
|
|
int64_t gyro_ts, accel_ts;
|
|
int ret;
|
|
|
|
gyro_ts = iio_get_time_ns(st->indio_gyro);
|
|
accel_ts = iio_get_time_ns(st->indio_accel);
|
|
|
|
ret = inv_icm42600_buffer_fifo_read(st, count);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (st->fifo.nb.total == 0)
|
|
return 0;
|
|
|
|
if (st->fifo.nb.gyro > 0) {
|
|
ts = iio_priv(st->indio_gyro);
|
|
inv_icm42600_timestamp_interrupt(ts, st->fifo.period,
|
|
st->fifo.nb.total, st->fifo.nb.gyro,
|
|
gyro_ts);
|
|
ret = inv_icm42600_gyro_parse_fifo(st->indio_gyro);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
if (st->fifo.nb.accel > 0) {
|
|
ts = iio_priv(st->indio_accel);
|
|
inv_icm42600_timestamp_interrupt(ts, st->fifo.period,
|
|
st->fifo.nb.total, st->fifo.nb.accel,
|
|
accel_ts);
|
|
ret = inv_icm42600_accel_parse_fifo(st->indio_accel);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int inv_icm42600_buffer_init(struct inv_icm42600_state *st)
|
|
{
|
|
unsigned int val;
|
|
int ret;
|
|
|
|
/*
|
|
* Default FIFO configuration (bits 7 to 5)
|
|
* - use invalid value
|
|
* - FIFO count in bytes
|
|
* - FIFO count in big endian
|
|
*/
|
|
val = INV_ICM42600_INTF_CONFIG0_FIFO_COUNT_ENDIAN;
|
|
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0,
|
|
GENMASK(7, 5), val);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/*
|
|
* Enable FIFO partial read and continuous watermark interrupt.
|
|
* Disable all FIFO EN bits.
|
|
*/
|
|
val = INV_ICM42600_FIFO_CONFIG1_RESUME_PARTIAL_RD |
|
|
INV_ICM42600_FIFO_CONFIG1_WM_GT_TH;
|
|
return regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1,
|
|
GENMASK(6, 5) | GENMASK(3, 0), val);
|
|
}
|