138 lines
3.6 KiB
C
138 lines
3.6 KiB
C
/* SPDX-License-Identifier: MIT */
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#ifndef __NVKM_CLK_H__
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#define __NVKM_CLK_H__
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#include <core/subdev.h>
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#include <subdev/pci.h>
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struct nvbios_pll;
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struct nvkm_pll_vals;
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#define NVKM_CLK_CSTATE_DEFAULT -1 /* POSTed default */
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#define NVKM_CLK_CSTATE_BASE -2 /* pstate base */
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#define NVKM_CLK_CSTATE_HIGHEST -3 /* highest possible */
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enum nv_clk_src {
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nv_clk_src_crystal,
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nv_clk_src_href,
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nv_clk_src_hclk,
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nv_clk_src_hclkm3,
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nv_clk_src_hclkm3d2,
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nv_clk_src_hclkm2d3, /* NVAA */
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nv_clk_src_hclkm4, /* NVAA */
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nv_clk_src_cclk, /* NVAA */
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nv_clk_src_host,
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nv_clk_src_sppll0,
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nv_clk_src_sppll1,
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nv_clk_src_mpllsrcref,
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nv_clk_src_mpllsrc,
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nv_clk_src_mpll,
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nv_clk_src_mdiv,
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nv_clk_src_core,
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nv_clk_src_core_intm,
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nv_clk_src_shader,
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nv_clk_src_mem,
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nv_clk_src_gpc,
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nv_clk_src_rop,
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nv_clk_src_hubk01,
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nv_clk_src_hubk06,
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nv_clk_src_hubk07,
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nv_clk_src_copy,
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nv_clk_src_pmu,
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nv_clk_src_disp,
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nv_clk_src_vdec,
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nv_clk_src_dom6,
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nv_clk_src_max,
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};
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struct nvkm_cstate {
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struct list_head head;
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u8 voltage;
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u32 domain[nv_clk_src_max];
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u8 id;
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};
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struct nvkm_pstate {
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struct list_head head;
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struct list_head list; /* c-states */
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struct nvkm_cstate base;
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u8 pstate;
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u8 fanspeed;
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enum nvkm_pcie_speed pcie_speed;
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u8 pcie_width;
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};
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struct nvkm_domain {
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enum nv_clk_src name;
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u8 bios; /* 0xff for none */
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#define NVKM_CLK_DOM_FLAG_CORE 0x01
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#define NVKM_CLK_DOM_FLAG_VPSTATE 0x02
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u8 flags;
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const char *mname;
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int mdiv;
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};
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struct nvkm_clk {
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const struct nvkm_clk_func *func;
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struct nvkm_subdev subdev;
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const struct nvkm_domain *domains;
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struct nvkm_pstate bstate;
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struct list_head states;
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int state_nr;
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struct work_struct work;
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wait_queue_head_t wait;
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atomic_t waiting;
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int pwrsrc;
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int pstate; /* current */
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int ustate_ac; /* user-requested (-1 disabled, -2 perfmon) */
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int ustate_dc; /* user-requested (-1 disabled, -2 perfmon) */
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int astate; /* perfmon adjustment (base) */
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int dstate; /* display adjustment (min+) */
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u8 temp;
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bool allow_reclock;
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#define NVKM_CLK_BOOST_NONE 0x0
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#define NVKM_CLK_BOOST_BIOS 0x1
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#define NVKM_CLK_BOOST_FULL 0x2
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u8 boost_mode;
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u32 base_khz;
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u32 boost_khz;
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/*XXX: die, these are here *only* to support the completely
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* bat-shit insane what-was-nouveau_hw.c code
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*/
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int (*pll_calc)(struct nvkm_clk *, struct nvbios_pll *, int clk,
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struct nvkm_pll_vals *pv);
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int (*pll_prog)(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *pv);
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};
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int nvkm_clk_read(struct nvkm_clk *, enum nv_clk_src);
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int nvkm_clk_ustate(struct nvkm_clk *, int req, int pwr);
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int nvkm_clk_astate(struct nvkm_clk *, int req, int rel, bool wait);
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int nvkm_clk_dstate(struct nvkm_clk *, int req, int rel);
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int nvkm_clk_tstate(struct nvkm_clk *, u8 temperature);
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int nvkm_clk_pwrsrc(struct nvkm_device *);
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int nv04_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
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int nv40_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
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int nv50_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
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int g84_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
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int mcp77_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
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int gt215_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
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int gf100_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
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int gk104_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
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int gk20a_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
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int gm20b_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
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#endif
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