496 lines
12 KiB
C
496 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
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*/
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#include <linux/bitops.h>
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#include <linux/clk-provider.h>
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#include <linux/clkdev.h>
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#include <linux/clk/at91_pmc.h>
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#include <linux/of.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include "pmc.h"
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DEFINE_SPINLOCK(pmc_pcr_lock);
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#define PERIPHERAL_ID_MIN 2
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#define PERIPHERAL_ID_MAX 31
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#define PERIPHERAL_MASK(id) (1 << ((id) & PERIPHERAL_ID_MAX))
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#define PERIPHERAL_MAX_SHIFT 3
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struct clk_peripheral {
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struct clk_hw hw;
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struct regmap *regmap;
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u32 id;
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};
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#define to_clk_peripheral(hw) container_of(hw, struct clk_peripheral, hw)
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struct clk_sam9x5_peripheral {
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struct clk_hw hw;
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struct regmap *regmap;
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struct clk_range range;
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spinlock_t *lock;
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u32 id;
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u32 div;
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const struct clk_pcr_layout *layout;
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struct at91_clk_pms pms;
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bool auto_div;
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int chg_pid;
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};
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#define to_clk_sam9x5_peripheral(hw) \
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container_of(hw, struct clk_sam9x5_peripheral, hw)
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static int clk_peripheral_enable(struct clk_hw *hw)
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{
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struct clk_peripheral *periph = to_clk_peripheral(hw);
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int offset = AT91_PMC_PCER;
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u32 id = periph->id;
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if (id < PERIPHERAL_ID_MIN)
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return 0;
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if (id > PERIPHERAL_ID_MAX)
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offset = AT91_PMC_PCER1;
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regmap_write(periph->regmap, offset, PERIPHERAL_MASK(id));
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return 0;
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}
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static void clk_peripheral_disable(struct clk_hw *hw)
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{
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struct clk_peripheral *periph = to_clk_peripheral(hw);
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int offset = AT91_PMC_PCDR;
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u32 id = periph->id;
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if (id < PERIPHERAL_ID_MIN)
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return;
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if (id > PERIPHERAL_ID_MAX)
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offset = AT91_PMC_PCDR1;
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regmap_write(periph->regmap, offset, PERIPHERAL_MASK(id));
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}
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static int clk_peripheral_is_enabled(struct clk_hw *hw)
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{
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struct clk_peripheral *periph = to_clk_peripheral(hw);
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int offset = AT91_PMC_PCSR;
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unsigned int status;
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u32 id = periph->id;
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if (id < PERIPHERAL_ID_MIN)
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return 1;
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if (id > PERIPHERAL_ID_MAX)
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offset = AT91_PMC_PCSR1;
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regmap_read(periph->regmap, offset, &status);
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return status & PERIPHERAL_MASK(id) ? 1 : 0;
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}
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static const struct clk_ops peripheral_ops = {
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.enable = clk_peripheral_enable,
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.disable = clk_peripheral_disable,
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.is_enabled = clk_peripheral_is_enabled,
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};
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struct clk_hw * __init
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at91_clk_register_peripheral(struct regmap *regmap, const char *name,
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const char *parent_name, u32 id)
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{
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struct clk_peripheral *periph;
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struct clk_init_data init;
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struct clk_hw *hw;
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int ret;
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if (!name || !parent_name || id > PERIPHERAL_ID_MAX)
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return ERR_PTR(-EINVAL);
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periph = kzalloc(sizeof(*periph), GFP_KERNEL);
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if (!periph)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &peripheral_ops;
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init.parent_names = &parent_name;
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init.num_parents = 1;
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init.flags = 0;
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periph->id = id;
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periph->hw.init = &init;
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periph->regmap = regmap;
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hw = &periph->hw;
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ret = clk_hw_register(NULL, &periph->hw);
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if (ret) {
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kfree(periph);
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hw = ERR_PTR(ret);
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}
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return hw;
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}
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static void clk_sam9x5_peripheral_autodiv(struct clk_sam9x5_peripheral *periph)
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{
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struct clk_hw *parent;
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unsigned long parent_rate;
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int shift = 0;
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if (!periph->auto_div)
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return;
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if (periph->range.max) {
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parent = clk_hw_get_parent_by_index(&periph->hw, 0);
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parent_rate = clk_hw_get_rate(parent);
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if (!parent_rate)
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return;
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for (; shift < PERIPHERAL_MAX_SHIFT; shift++) {
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if (parent_rate >> shift <= periph->range.max)
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break;
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}
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}
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periph->auto_div = false;
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periph->div = shift;
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}
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static int clk_sam9x5_peripheral_set(struct clk_sam9x5_peripheral *periph,
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unsigned int status)
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{
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unsigned long flags;
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unsigned int enable = status ? AT91_PMC_PCR_EN : 0;
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if (periph->id < PERIPHERAL_ID_MIN)
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return 0;
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spin_lock_irqsave(periph->lock, flags);
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regmap_write(periph->regmap, periph->layout->offset,
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(periph->id & periph->layout->pid_mask));
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regmap_update_bits(periph->regmap, periph->layout->offset,
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periph->layout->div_mask | periph->layout->cmd |
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enable,
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field_prep(periph->layout->div_mask, periph->div) |
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periph->layout->cmd | enable);
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spin_unlock_irqrestore(periph->lock, flags);
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return 0;
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}
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static int clk_sam9x5_peripheral_enable(struct clk_hw *hw)
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{
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struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
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return clk_sam9x5_peripheral_set(periph, 1);
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}
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static void clk_sam9x5_peripheral_disable(struct clk_hw *hw)
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{
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struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
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unsigned long flags;
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if (periph->id < PERIPHERAL_ID_MIN)
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return;
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spin_lock_irqsave(periph->lock, flags);
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regmap_write(periph->regmap, periph->layout->offset,
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(periph->id & periph->layout->pid_mask));
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regmap_update_bits(periph->regmap, periph->layout->offset,
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AT91_PMC_PCR_EN | periph->layout->cmd,
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periph->layout->cmd);
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spin_unlock_irqrestore(periph->lock, flags);
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}
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static int clk_sam9x5_peripheral_is_enabled(struct clk_hw *hw)
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{
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struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
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unsigned long flags;
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unsigned int status;
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if (periph->id < PERIPHERAL_ID_MIN)
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return 1;
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spin_lock_irqsave(periph->lock, flags);
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regmap_write(periph->regmap, periph->layout->offset,
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(periph->id & periph->layout->pid_mask));
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regmap_read(periph->regmap, periph->layout->offset, &status);
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spin_unlock_irqrestore(periph->lock, flags);
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return !!(status & AT91_PMC_PCR_EN);
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}
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static unsigned long
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clk_sam9x5_peripheral_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
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unsigned long flags;
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unsigned int status;
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if (periph->id < PERIPHERAL_ID_MIN)
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return parent_rate;
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spin_lock_irqsave(periph->lock, flags);
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regmap_write(periph->regmap, periph->layout->offset,
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(periph->id & periph->layout->pid_mask));
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regmap_read(periph->regmap, periph->layout->offset, &status);
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spin_unlock_irqrestore(periph->lock, flags);
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if (status & AT91_PMC_PCR_EN) {
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periph->div = field_get(periph->layout->div_mask, status);
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periph->auto_div = false;
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} else {
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clk_sam9x5_peripheral_autodiv(periph);
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}
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return parent_rate >> periph->div;
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}
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static void clk_sam9x5_peripheral_best_diff(struct clk_rate_request *req,
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struct clk_hw *parent,
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unsigned long parent_rate,
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u32 shift, long *best_diff,
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long *best_rate)
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{
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unsigned long tmp_rate = parent_rate >> shift;
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unsigned long tmp_diff = abs(req->rate - tmp_rate);
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if (*best_diff < 0 || *best_diff >= tmp_diff) {
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*best_rate = tmp_rate;
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*best_diff = tmp_diff;
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req->best_parent_rate = parent_rate;
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req->best_parent_hw = parent;
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}
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}
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static int clk_sam9x5_peripheral_determine_rate(struct clk_hw *hw,
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struct clk_rate_request *req)
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{
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struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
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struct clk_hw *parent = clk_hw_get_parent(hw);
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unsigned long parent_rate = clk_hw_get_rate(parent);
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unsigned long tmp_rate;
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long best_rate = LONG_MIN;
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long best_diff = LONG_MIN;
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u32 shift;
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if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max)
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return parent_rate;
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/* Fist step: check the available dividers. */
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for (shift = 0; shift <= PERIPHERAL_MAX_SHIFT; shift++) {
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tmp_rate = parent_rate >> shift;
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if (periph->range.max && tmp_rate > periph->range.max)
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continue;
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clk_sam9x5_peripheral_best_diff(req, parent, parent_rate,
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shift, &best_diff, &best_rate);
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if (!best_diff || best_rate <= req->rate)
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break;
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}
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if (periph->chg_pid < 0)
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goto end;
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/* Step two: try to request rate from parent. */
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parent = clk_hw_get_parent_by_index(hw, periph->chg_pid);
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if (!parent)
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goto end;
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for (shift = 0; shift <= PERIPHERAL_MAX_SHIFT; shift++) {
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struct clk_rate_request req_parent;
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clk_hw_forward_rate_request(hw, req, parent, &req_parent, req->rate << shift);
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if (__clk_determine_rate(parent, &req_parent))
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continue;
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clk_sam9x5_peripheral_best_diff(req, parent, req_parent.rate,
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shift, &best_diff, &best_rate);
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if (!best_diff)
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break;
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}
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end:
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if (best_rate < 0 ||
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(periph->range.max && best_rate > periph->range.max))
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return -EINVAL;
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pr_debug("PCK: %s, best_rate = %ld, parent clk: %s @ %ld\n",
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__func__, best_rate,
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__clk_get_name((req->best_parent_hw)->clk),
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req->best_parent_rate);
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req->rate = best_rate;
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return 0;
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}
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static long clk_sam9x5_peripheral_round_rate(struct clk_hw *hw,
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unsigned long rate,
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unsigned long *parent_rate)
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{
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int shift = 0;
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unsigned long best_rate;
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unsigned long best_diff;
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unsigned long cur_rate = *parent_rate;
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unsigned long cur_diff;
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struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
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if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max)
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return *parent_rate;
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if (periph->range.max) {
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for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) {
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cur_rate = *parent_rate >> shift;
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if (cur_rate <= periph->range.max)
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break;
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}
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}
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if (rate >= cur_rate)
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return cur_rate;
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best_diff = cur_rate - rate;
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best_rate = cur_rate;
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for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) {
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cur_rate = *parent_rate >> shift;
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if (cur_rate < rate)
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cur_diff = rate - cur_rate;
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else
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cur_diff = cur_rate - rate;
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if (cur_diff < best_diff) {
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best_diff = cur_diff;
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best_rate = cur_rate;
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}
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if (!best_diff || cur_rate < rate)
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break;
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}
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return best_rate;
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}
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static int clk_sam9x5_peripheral_set_rate(struct clk_hw *hw,
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unsigned long rate,
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unsigned long parent_rate)
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{
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int shift;
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struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
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if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max) {
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if (parent_rate == rate)
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return 0;
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else
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return -EINVAL;
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}
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if (periph->range.max && rate > periph->range.max)
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return -EINVAL;
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for (shift = 0; shift <= PERIPHERAL_MAX_SHIFT; shift++) {
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if (parent_rate >> shift == rate) {
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periph->auto_div = false;
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periph->div = shift;
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return 0;
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}
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}
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return -EINVAL;
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}
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static int clk_sam9x5_peripheral_save_context(struct clk_hw *hw)
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{
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struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
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periph->pms.status = clk_sam9x5_peripheral_is_enabled(hw);
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return 0;
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}
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static void clk_sam9x5_peripheral_restore_context(struct clk_hw *hw)
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{
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struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
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if (periph->pms.status)
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clk_sam9x5_peripheral_set(periph, periph->pms.status);
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}
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static const struct clk_ops sam9x5_peripheral_ops = {
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.enable = clk_sam9x5_peripheral_enable,
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.disable = clk_sam9x5_peripheral_disable,
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.is_enabled = clk_sam9x5_peripheral_is_enabled,
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.recalc_rate = clk_sam9x5_peripheral_recalc_rate,
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.round_rate = clk_sam9x5_peripheral_round_rate,
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.set_rate = clk_sam9x5_peripheral_set_rate,
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.save_context = clk_sam9x5_peripheral_save_context,
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.restore_context = clk_sam9x5_peripheral_restore_context,
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};
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static const struct clk_ops sam9x5_peripheral_chg_ops = {
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.enable = clk_sam9x5_peripheral_enable,
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.disable = clk_sam9x5_peripheral_disable,
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.is_enabled = clk_sam9x5_peripheral_is_enabled,
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.recalc_rate = clk_sam9x5_peripheral_recalc_rate,
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.determine_rate = clk_sam9x5_peripheral_determine_rate,
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.set_rate = clk_sam9x5_peripheral_set_rate,
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.save_context = clk_sam9x5_peripheral_save_context,
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.restore_context = clk_sam9x5_peripheral_restore_context,
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};
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struct clk_hw * __init
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at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
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const struct clk_pcr_layout *layout,
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const char *name, const char *parent_name,
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u32 id, const struct clk_range *range,
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int chg_pid)
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{
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struct clk_sam9x5_peripheral *periph;
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struct clk_init_data init;
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struct clk_hw *hw;
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int ret;
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if (!name || !parent_name)
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return ERR_PTR(-EINVAL);
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periph = kzalloc(sizeof(*periph), GFP_KERNEL);
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if (!periph)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.parent_names = &parent_name;
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init.num_parents = 1;
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if (chg_pid < 0) {
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init.flags = 0;
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init.ops = &sam9x5_peripheral_ops;
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} else {
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init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
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CLK_SET_RATE_PARENT;
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init.ops = &sam9x5_peripheral_chg_ops;
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}
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periph->id = id;
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periph->hw.init = &init;
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periph->div = 0;
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periph->regmap = regmap;
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periph->lock = lock;
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if (layout->div_mask)
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periph->auto_div = true;
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periph->layout = layout;
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periph->range = *range;
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periph->chg_pid = chg_pid;
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hw = &periph->hw;
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ret = clk_hw_register(NULL, &periph->hw);
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if (ret) {
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kfree(periph);
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hw = ERR_PTR(ret);
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} else {
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clk_sam9x5_peripheral_autodiv(periph);
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}
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return hw;
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}
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