172 lines
3.6 KiB
C
172 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Ptrace test for TAR, PPR, DSCR registers in the TM Suspend context
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*
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* Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
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*/
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#include "ptrace.h"
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#include "tm.h"
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#include "ptrace-tar.h"
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int shm_id;
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int *cptr, *pptr;
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__attribute__((used)) void wait_parent(void)
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{
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cptr[2] = 1;
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while (!cptr[1])
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asm volatile("" : : : "memory");
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}
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void tm_spd_tar(void)
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{
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unsigned long result, texasr;
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unsigned long regs[3];
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int ret;
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cptr = (int *)shmat(shm_id, NULL, 0);
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trans:
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cptr[2] = 0;
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asm __volatile__(
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"li 4, %[tar_1];"
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"mtspr %[sprn_tar], 4;" /* TAR_1 */
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"li 4, %[dscr_1];"
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"mtspr %[sprn_dscr], 4;" /* DSCR_1 */
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"or 31,31,31;" /* PPR_1*/
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"1: ;"
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"tbegin.;"
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"beq 2f;"
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"li 4, %[tar_2];"
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"mtspr %[sprn_tar], 4;" /* TAR_2 */
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"li 4, %[dscr_2];"
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"mtspr %[sprn_dscr], 4;" /* DSCR_2 */
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"or 1,1,1;" /* PPR_2 */
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"tsuspend.;"
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"li 4, %[tar_3];"
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"mtspr %[sprn_tar], 4;" /* TAR_3 */
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"li 4, %[dscr_3];"
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"mtspr %[sprn_dscr], 4;" /* DSCR_3 */
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"or 6,6,6;" /* PPR_3 */
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"bl wait_parent;"
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"tresume.;"
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"tend.;"
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"li 0, 0;"
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"ori %[res], 0, 0;"
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"b 3f;"
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/* Transaction abort handler */
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"2: ;"
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"li 0, 1;"
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"ori %[res], 0, 0;"
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"mfspr %[texasr], %[sprn_texasr];"
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"3: ;"
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: [res] "=r" (result), [texasr] "=r" (texasr)
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: [sprn_dscr]"i"(SPRN_DSCR),
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[sprn_tar]"i"(SPRN_TAR), [sprn_ppr]"i"(SPRN_PPR),
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[sprn_texasr]"i"(SPRN_TEXASR), [tar_1]"i"(TAR_1),
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[dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2), [dscr_2]"i"(DSCR_2),
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[tar_3]"i"(TAR_3), [dscr_3]"i"(DSCR_3)
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: "memory", "r0", "r3", "r4", "r5", "r6", "lr"
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);
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/* TM failed, analyse */
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if (result) {
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if (!cptr[0])
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goto trans;
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regs[0] = mfspr(SPRN_TAR);
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regs[1] = mfspr(SPRN_PPR);
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regs[2] = mfspr(SPRN_DSCR);
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shmdt(&cptr);
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printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
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user_read, regs[0], regs[1], regs[2]);
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ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
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if (ret)
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exit(1);
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exit(0);
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}
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shmdt(&cptr);
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exit(1);
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}
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int trace_tm_spd_tar(pid_t child)
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{
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unsigned long regs[3];
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FAIL_IF(start_trace(child));
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FAIL_IF(show_tar_registers(child, regs));
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printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
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ptrace_read_running, regs[0], regs[1], regs[2]);
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FAIL_IF(validate_tar_registers(regs, TAR_3, PPR_3, DSCR_3));
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FAIL_IF(show_tm_checkpointed_state(child, regs));
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printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
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ptrace_read_ckpt, regs[0], regs[1], regs[2]);
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FAIL_IF(validate_tar_registers(regs, TAR_1, PPR_1, DSCR_1));
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FAIL_IF(write_ckpt_tar_registers(child, TAR_4, PPR_4, DSCR_4));
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printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
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ptrace_write_ckpt, TAR_4, PPR_4, DSCR_4);
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pptr[0] = 1;
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pptr[1] = 1;
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FAIL_IF(stop_trace(child));
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return TEST_PASS;
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}
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int ptrace_tm_spd_tar(void)
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{
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pid_t pid;
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int ret, status;
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SKIP_IF(!have_htm());
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SKIP_IF(htm_is_synthetic());
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shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
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pid = fork();
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if (pid == 0)
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tm_spd_tar();
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pptr = (int *)shmat(shm_id, NULL, 0);
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pptr[0] = 0;
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pptr[1] = 0;
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if (pid) {
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while (!pptr[2])
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asm volatile("" : : : "memory");
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ret = trace_tm_spd_tar(pid);
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if (ret) {
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kill(pid, SIGTERM);
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shmdt(&pptr);
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shmctl(shm_id, IPC_RMID, NULL);
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return TEST_FAIL;
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}
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shmdt(&pptr);
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ret = wait(&status);
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shmctl(shm_id, IPC_RMID, NULL);
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if (ret != pid) {
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printf("Child's exit status not captured\n");
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return TEST_FAIL;
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}
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return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
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TEST_PASS;
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}
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return TEST_PASS;
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}
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int main(int argc, char *argv[])
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{
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return test_harness(ptrace_tm_spd_tar, "ptrace_tm_spd_tar");
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}
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