94 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			94 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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 * tools/testing/selftests/kvm/include/x86_64/apic.h
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 *
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 * Copyright (C) 2021, Google LLC.
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 */
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#ifndef SELFTEST_KVM_APIC_H
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#define SELFTEST_KVM_APIC_H
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#include <stdint.h>
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#include "processor.h"
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#define APIC_DEFAULT_GPA		0xfee00000ULL
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/* APIC base address MSR and fields */
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#define MSR_IA32_APICBASE		0x0000001b
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#define MSR_IA32_APICBASE_BSP		(1<<8)
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#define MSR_IA32_APICBASE_EXTD		(1<<10)
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#define MSR_IA32_APICBASE_ENABLE	(1<<11)
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#define MSR_IA32_APICBASE_BASE		(0xfffff<<12)
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#define		GET_APIC_BASE(x)	(((x) >> 12) << 12)
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#define APIC_BASE_MSR	0x800
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#define X2APIC_ENABLE	(1UL << 10)
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#define	APIC_ID		0x20
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#define	APIC_LVR	0x30
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#define		GET_APIC_ID_FIELD(x)	(((x) >> 24) & 0xFF)
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#define	APIC_TASKPRI	0x80
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#define	APIC_PROCPRI	0xA0
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#define	APIC_EOI	0xB0
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#define	APIC_SPIV	0xF0
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#define		APIC_SPIV_FOCUS_DISABLED	(1 << 9)
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#define		APIC_SPIV_APIC_ENABLED		(1 << 8)
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#define APIC_IRR	0x200
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#define	APIC_ICR	0x300
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#define	APIC_LVTCMCI	0x2f0
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#define		APIC_DEST_SELF		0x40000
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#define		APIC_DEST_ALLINC	0x80000
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#define		APIC_DEST_ALLBUT	0xC0000
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#define		APIC_ICR_RR_MASK	0x30000
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#define		APIC_ICR_RR_INVALID	0x00000
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#define		APIC_ICR_RR_INPROG	0x10000
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#define		APIC_ICR_RR_VALID	0x20000
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#define		APIC_INT_LEVELTRIG	0x08000
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#define		APIC_INT_ASSERT		0x04000
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#define		APIC_ICR_BUSY		0x01000
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#define		APIC_DEST_LOGICAL	0x00800
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#define		APIC_DEST_PHYSICAL	0x00000
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#define		APIC_DM_FIXED		0x00000
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#define		APIC_DM_FIXED_MASK	0x00700
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#define		APIC_DM_LOWEST		0x00100
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#define		APIC_DM_SMI		0x00200
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#define		APIC_DM_REMRD		0x00300
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#define		APIC_DM_NMI		0x00400
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#define		APIC_DM_INIT		0x00500
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#define		APIC_DM_STARTUP		0x00600
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#define		APIC_DM_EXTINT		0x00700
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#define		APIC_VECTOR_MASK	0x000FF
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#define	APIC_ICR2	0x310
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#define		SET_APIC_DEST_FIELD(x)	((x) << 24)
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void apic_disable(void);
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void xapic_enable(void);
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void x2apic_enable(void);
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static inline uint32_t get_bsp_flag(void)
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{
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	return rdmsr(MSR_IA32_APICBASE) & MSR_IA32_APICBASE_BSP;
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}
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static inline uint32_t xapic_read_reg(unsigned int reg)
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{
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	return ((volatile uint32_t *)APIC_DEFAULT_GPA)[reg >> 2];
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}
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static inline void xapic_write_reg(unsigned int reg, uint32_t val)
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{
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	((volatile uint32_t *)APIC_DEFAULT_GPA)[reg >> 2] = val;
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}
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static inline uint64_t x2apic_read_reg(unsigned int reg)
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{
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	return rdmsr(APIC_BASE_MSR + (reg >> 4));
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}
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static inline void x2apic_write_reg(unsigned int reg, uint64_t value)
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{
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	wrmsr(APIC_BASE_MSR + (reg >> 4), value);
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}
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#endif /* SELFTEST_KVM_APIC_H */
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