77 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			77 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-or-later */
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| /*
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|  * GSPCA Endpoints (formerly known as AOX) se401 USB Camera sub Driver
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|  *
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|  * Copyright (C) 2011 Hans de Goede <hdegoede@redhat.com>
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|  *
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|  * Based on the v4l1 se401 driver which is:
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|  *
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|  * Copyright (c) 2000 Jeroen B. Vreeken (pe1rxq@amsat.org)
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|  */
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| 
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| #define SE401_REQ_GET_CAMERA_DESCRIPTOR		0x06
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| #define SE401_REQ_START_CONTINUOUS_CAPTURE	0x41
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| #define SE401_REQ_STOP_CONTINUOUS_CAPTURE	0x42
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| #define SE401_REQ_CAPTURE_FRAME			0x43
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| #define SE401_REQ_GET_BRT			0x44
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| #define SE401_REQ_SET_BRT			0x45
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| #define SE401_REQ_GET_WIDTH			0x4c
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| #define SE401_REQ_SET_WIDTH			0x4d
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| #define SE401_REQ_GET_HEIGHT			0x4e
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| #define SE401_REQ_SET_HEIGHT			0x4f
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| #define SE401_REQ_GET_OUTPUT_MODE		0x50
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| #define SE401_REQ_SET_OUTPUT_MODE		0x51
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| #define SE401_REQ_GET_EXT_FEATURE		0x52
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| #define SE401_REQ_SET_EXT_FEATURE		0x53
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| #define SE401_REQ_CAMERA_POWER			0x56
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| #define SE401_REQ_LED_CONTROL			0x57
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| #define SE401_REQ_BIOS				0xff
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| 
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| #define SE401_BIOS_READ				0x07
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| 
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| #define SE401_FORMAT_BAYER	0x40
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| 
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| /* Hyundai hv7131b registers
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|    7121 and 7141 should be the same (haven't really checked...) */
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| /* Mode registers: */
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| #define HV7131_REG_MODE_A		0x00
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| #define HV7131_REG_MODE_B		0x01
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| #define HV7131_REG_MODE_C		0x02
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| /* Frame registers: */
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| #define HV7131_REG_FRSU		0x10
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| #define HV7131_REG_FRSL		0x11
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| #define HV7131_REG_FCSU		0x12
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| #define HV7131_REG_FCSL		0x13
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| #define HV7131_REG_FWHU		0x14
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| #define HV7131_REG_FWHL		0x15
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| #define HV7131_REG_FWWU		0x16
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| #define HV7131_REG_FWWL		0x17
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| /* Timing registers: */
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| #define HV7131_REG_THBU		0x20
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| #define HV7131_REG_THBL		0x21
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| #define HV7131_REG_TVBU		0x22
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| #define HV7131_REG_TVBL		0x23
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| #define HV7131_REG_TITU		0x25
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| #define HV7131_REG_TITM		0x26
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| #define HV7131_REG_TITL		0x27
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| #define HV7131_REG_TMCD		0x28
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| /* Adjust Registers: */
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| #define HV7131_REG_ARLV		0x30
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| #define HV7131_REG_ARCG		0x31
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| #define HV7131_REG_AGCG		0x32
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| #define HV7131_REG_ABCG		0x33
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| #define HV7131_REG_APBV		0x34
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| #define HV7131_REG_ASLP		0x54
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| /* Offset Registers: */
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| #define HV7131_REG_OFSR		0x50
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| #define HV7131_REG_OFSG		0x51
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| #define HV7131_REG_OFSB		0x52
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| /* REset level statistics registers: */
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| #define HV7131_REG_LOREFNOH	0x57
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| #define HV7131_REG_LOREFNOL	0x58
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| #define HV7131_REG_HIREFNOH	0x59
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| #define HV7131_REG_HIREFNOL	0x5a
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| 
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| /* se401 registers */
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| #define SE401_OPERATINGMODE	0x2000
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