110 lines
3.0 KiB
C
110 lines
3.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Xilinx Video DMA
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*
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* Copyright (C) 2013-2015 Ideas on Board
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* Copyright (C) 2013-2015 Xilinx, Inc.
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*
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* Contacts: Hyun Kwon <hyun.kwon@xilinx.com>
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* Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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*/
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#ifndef __XILINX_VIP_DMA_H__
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#define __XILINX_VIP_DMA_H__
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#include <linux/dmaengine.h>
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#include <linux/mutex.h>
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#include <linux/spinlock.h>
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#include <linux/videodev2.h>
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#include <media/media-entity.h>
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#include <media/v4l2-dev.h>
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#include <media/videobuf2-v4l2.h>
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struct dma_chan;
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struct xvip_composite_device;
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struct xvip_video_format;
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/**
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* struct xvip_pipeline - Xilinx Video IP pipeline structure
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* @pipe: media pipeline
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* @lock: protects the pipeline @stream_count
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* @use_count: number of DMA engines using the pipeline
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* @stream_count: number of DMA engines currently streaming
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* @num_dmas: number of DMA engines in the pipeline
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* @output: DMA engine at the output of the pipeline
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*/
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struct xvip_pipeline {
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struct media_pipeline pipe;
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struct mutex lock;
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unsigned int use_count;
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unsigned int stream_count;
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unsigned int num_dmas;
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struct xvip_dma *output;
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};
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static inline struct xvip_pipeline *to_xvip_pipeline(struct video_device *vdev)
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{
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struct media_pipeline *pipe = video_device_pipeline(vdev);
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if (!pipe)
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return NULL;
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return container_of(pipe, struct xvip_pipeline, pipe);
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}
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/**
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* struct xvip_dma - Video DMA channel
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* @list: list entry in a composite device dmas list
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* @video: V4L2 video device associated with the DMA channel
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* @pad: media pad for the video device entity
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* @xdev: composite device the DMA channel belongs to
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* @pipe: pipeline belonging to the DMA channel
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* @port: composite device DT node port number for the DMA channel
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* @lock: protects the @format, @fmtinfo and @queue fields
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* @format: active V4L2 pixel format
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* @fmtinfo: format information corresponding to the active @format
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* @queue: vb2 buffers queue
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* @sequence: V4L2 buffers sequence number
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* @queued_bufs: list of queued buffers
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* @queued_lock: protects the buf_queued list
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* @dma: DMA engine channel
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* @align: transfer alignment required by the DMA channel (in bytes)
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* @xt: dma interleaved template for dma configuration
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* @sgl: data chunk structure for dma_interleaved_template
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*/
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struct xvip_dma {
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struct list_head list;
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struct video_device video;
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struct media_pad pad;
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struct xvip_composite_device *xdev;
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struct xvip_pipeline pipe;
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unsigned int port;
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struct mutex lock;
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struct v4l2_pix_format format;
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const struct xvip_video_format *fmtinfo;
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struct vb2_queue queue;
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unsigned int sequence;
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struct list_head queued_bufs;
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spinlock_t queued_lock;
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struct dma_chan *dma;
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unsigned int align;
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struct dma_interleaved_template xt;
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struct data_chunk sgl[1];
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};
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#define to_xvip_dma(vdev) container_of(vdev, struct xvip_dma, video)
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int xvip_dma_init(struct xvip_composite_device *xdev, struct xvip_dma *dma,
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enum v4l2_buf_type type, unsigned int port);
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void xvip_dma_cleanup(struct xvip_dma *dma);
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#endif /* __XILINX_VIP_DMA_H__ */
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