567 lines
		
	
	
		
			15 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			567 lines
		
	
	
		
			15 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0
 | |
| /*
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|  * camss-vfe-480.c
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|  *
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|  * Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module v480 (SM8250)
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|  *
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|  * Copyright (C) 2020-2021 Linaro Ltd.
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|  * Copyright (C) 2021 Jonathan Marek
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|  */
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| 
 | |
| #include <linux/interrupt.h>
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| #include <linux/io.h>
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| #include <linux/iopoll.h>
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| 
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| #include "camss.h"
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| #include "camss-vfe.h"
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| 
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| /* VFE 2/3 are lite and have a different register layout */
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| #define IS_LITE		(vfe->id >= 2 ? 1 : 0)
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| 
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| #define VFE_HW_VERSION			(0x00)
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| 
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| #define VFE_GLOBAL_RESET_CMD		(IS_LITE ? 0x0c : 0x1c)
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| #define	    GLOBAL_RESET_HW_AND_REG	(IS_LITE ? BIT(1) : BIT(0))
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| 
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| #define VFE_REG_UPDATE_CMD		(IS_LITE ? 0x20 : 0x34)
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| static inline int reg_update_rdi(struct vfe_device *vfe, int n)
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| {
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| 	return IS_LITE ? BIT(n) : BIT(1 + (n));
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| }
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| 
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| #define	    REG_UPDATE_RDI		reg_update_rdi
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| #define VFE_IRQ_CMD			(IS_LITE ? 0x24 : 0x38)
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| #define     IRQ_CMD_GLOBAL_CLEAR	BIT(0)
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| 
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| #define VFE_IRQ_MASK(n)			((IS_LITE ? 0x28 : 0x3c) + (n) * 4)
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| #define	    IRQ_MASK_0_RESET_ACK	(IS_LITE ? BIT(17) : BIT(0))
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| #define	    IRQ_MASK_0_BUS_TOP_IRQ	(IS_LITE ? BIT(4) : BIT(7))
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| #define VFE_IRQ_CLEAR(n)		((IS_LITE ? 0x34 : 0x48) + (n) * 4)
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| #define VFE_IRQ_STATUS(n)		((IS_LITE ? 0x40 : 0x54) + (n) * 4)
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| 
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| #define BUS_REG_BASE			(IS_LITE ? 0x1a00 : 0xaa00)
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| 
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| #define VFE_BUS_WM_CGC_OVERRIDE		(BUS_REG_BASE + 0x08)
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| #define		WM_CGC_OVERRIDE_ALL	(0x3FFFFFF)
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| 
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| #define VFE_BUS_WM_TEST_BUS_CTRL	(BUS_REG_BASE + 0xdc)
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| 
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| #define VFE_BUS_IRQ_MASK(n)		(BUS_REG_BASE + 0x18 + (n) * 4)
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| static inline int bus_irq_mask_0_rdi_rup(struct vfe_device *vfe, int n)
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| {
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| 	return IS_LITE ? BIT(n) : BIT(3 + (n));
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| }
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| 
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| #define     BUS_IRQ_MASK_0_RDI_RUP	bus_irq_mask_0_rdi_rup
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| static inline int bus_irq_mask_0_comp_done(struct vfe_device *vfe, int n)
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| {
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| 	return IS_LITE ? BIT(4 + (n)) : BIT(6 + (n));
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| }
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| 
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| #define     BUS_IRQ_MASK_0_COMP_DONE	bus_irq_mask_0_comp_done
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| #define VFE_BUS_IRQ_CLEAR(n)		(BUS_REG_BASE + 0x20 + (n) * 4)
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| #define VFE_BUS_IRQ_STATUS(n)		(BUS_REG_BASE + 0x28 + (n) * 4)
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| #define VFE_BUS_IRQ_CLEAR_GLOBAL	(BUS_REG_BASE + 0x30)
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| 
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| #define VFE_BUS_WM_CFG(n)		(BUS_REG_BASE + 0x200 + (n) * 0x100)
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| #define		WM_CFG_EN			(0)
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| #define		WM_CFG_MODE			(16)
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| #define			MODE_QCOM_PLAIN	(0)
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| #define			MODE_MIPI_RAW	(1)
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| #define VFE_BUS_WM_IMAGE_ADDR(n)	(BUS_REG_BASE + 0x204 + (n) * 0x100)
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| #define VFE_BUS_WM_FRAME_INCR(n)	(BUS_REG_BASE + 0x208 + (n) * 0x100)
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| #define VFE_BUS_WM_IMAGE_CFG_0(n)	(BUS_REG_BASE + 0x20c + (n) * 0x100)
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| #define		WM_IMAGE_CFG_0_DEFAULT_WIDTH	(0xFFFF)
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| #define VFE_BUS_WM_IMAGE_CFG_1(n)	(BUS_REG_BASE + 0x210 + (n) * 0x100)
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| #define VFE_BUS_WM_IMAGE_CFG_2(n)	(BUS_REG_BASE + 0x214 + (n) * 0x100)
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| #define VFE_BUS_WM_PACKER_CFG(n)	(BUS_REG_BASE + 0x218 + (n) * 0x100)
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| #define VFE_BUS_WM_HEADER_ADDR(n)	(BUS_REG_BASE + 0x220 + (n) * 0x100)
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| #define VFE_BUS_WM_HEADER_INCR(n)	(BUS_REG_BASE + 0x224 + (n) * 0x100)
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| #define VFE_BUS_WM_HEADER_CFG(n)	(BUS_REG_BASE + 0x228 + (n) * 0x100)
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| 
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| #define VFE_BUS_WM_IRQ_SUBSAMPLE_PERIOD(n)	(BUS_REG_BASE + 0x230 + (n) * 0x100)
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| #define VFE_BUS_WM_IRQ_SUBSAMPLE_PATTERN(n)	(BUS_REG_BASE + 0x234 + (n) * 0x100)
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| #define VFE_BUS_WM_FRAMEDROP_PERIOD(n)		(BUS_REG_BASE + 0x238 + (n) * 0x100)
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| #define VFE_BUS_WM_FRAMEDROP_PATTERN(n)		(BUS_REG_BASE + 0x23c + (n) * 0x100)
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| 
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| #define VFE_BUS_WM_SYSTEM_CACHE_CFG(n)	(BUS_REG_BASE + 0x260 + (n) * 0x100)
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| #define VFE_BUS_WM_BURST_LIMIT(n)	(BUS_REG_BASE + 0x264 + (n) * 0x100)
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| 
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| /* for titan 480, each bus client is hardcoded to a specific path
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|  * and each bus client is part of a hardcoded "comp group"
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|  */
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| #define RDI_WM(n)			((IS_LITE ? 0 : 23) + (n))
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| #define RDI_COMP_GROUP(n)		((IS_LITE ? 0 : 11) + (n))
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| 
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| static u32 vfe_hw_version(struct vfe_device *vfe)
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| {
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| 	u32 hw_version = readl_relaxed(vfe->base + VFE_HW_VERSION);
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| 
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| 	u32 gen = (hw_version >> 28) & 0xF;
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| 	u32 rev = (hw_version >> 16) & 0xFFF;
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| 	u32 step = hw_version & 0xFFFF;
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| 
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| 	dev_dbg(vfe->camss->dev, "VFE HW Version = %u.%u.%u\n", gen, rev, step);
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| 
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| 	return hw_version;
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| }
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| 
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| static void vfe_global_reset(struct vfe_device *vfe)
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| {
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| 	writel_relaxed(IRQ_MASK_0_RESET_ACK, vfe->base + VFE_IRQ_MASK(0));
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| 	writel_relaxed(GLOBAL_RESET_HW_AND_REG, vfe->base + VFE_GLOBAL_RESET_CMD);
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| }
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| 
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| static void vfe_wm_start(struct vfe_device *vfe, u8 wm, struct vfe_line *line)
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| {
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| 	struct v4l2_pix_format_mplane *pix =
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| 		&line->video_out.active_fmt.fmt.pix_mp;
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| 
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| 	wm = RDI_WM(wm); /* map to actual WM used (from wm=RDI index) */
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| 
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| 	/* no clock gating at bus input */
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| 	writel_relaxed(WM_CGC_OVERRIDE_ALL, vfe->base + VFE_BUS_WM_CGC_OVERRIDE);
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| 
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| 	writel_relaxed(0x0, vfe->base + VFE_BUS_WM_TEST_BUS_CTRL);
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| 
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| 	writel_relaxed(pix->plane_fmt[0].bytesperline * pix->height,
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| 		       vfe->base + VFE_BUS_WM_FRAME_INCR(wm));
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| 	writel_relaxed(0xf, vfe->base + VFE_BUS_WM_BURST_LIMIT(wm));
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| 	writel_relaxed(WM_IMAGE_CFG_0_DEFAULT_WIDTH,
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| 		       vfe->base + VFE_BUS_WM_IMAGE_CFG_0(wm));
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| 	writel_relaxed(pix->plane_fmt[0].bytesperline,
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| 		       vfe->base + VFE_BUS_WM_IMAGE_CFG_2(wm));
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| 	writel_relaxed(0, vfe->base + VFE_BUS_WM_PACKER_CFG(wm));
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| 
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| 	/* no dropped frames, one irq per frame */
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| 	writel_relaxed(0, vfe->base + VFE_BUS_WM_FRAMEDROP_PERIOD(wm));
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| 	writel_relaxed(1, vfe->base + VFE_BUS_WM_FRAMEDROP_PATTERN(wm));
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| 	writel_relaxed(0, vfe->base + VFE_BUS_WM_IRQ_SUBSAMPLE_PERIOD(wm));
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| 	writel_relaxed(1, vfe->base + VFE_BUS_WM_IRQ_SUBSAMPLE_PATTERN(wm));
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| 
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| 	writel_relaxed(1 << WM_CFG_EN | MODE_MIPI_RAW << WM_CFG_MODE,
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| 		       vfe->base + VFE_BUS_WM_CFG(wm));
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| }
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| 
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| static void vfe_wm_stop(struct vfe_device *vfe, u8 wm)
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| {
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| 	wm = RDI_WM(wm); /* map to actual WM used (from wm=RDI index) */
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| 	writel_relaxed(0, vfe->base + VFE_BUS_WM_CFG(wm));
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| }
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| 
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| static void vfe_wm_update(struct vfe_device *vfe, u8 wm, u32 addr,
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| 			  struct vfe_line *line)
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| {
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| 	wm = RDI_WM(wm); /* map to actual WM used (from wm=RDI index) */
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| 	writel_relaxed(addr, vfe->base + VFE_BUS_WM_IMAGE_ADDR(wm));
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| }
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| 
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| static void vfe_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id)
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| {
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| 	vfe->reg_update |= REG_UPDATE_RDI(vfe, line_id);
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| 	writel_relaxed(vfe->reg_update, vfe->base + VFE_REG_UPDATE_CMD);
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| }
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| 
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| static inline void vfe_reg_update_clear(struct vfe_device *vfe,
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| 					enum vfe_line_id line_id)
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| {
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| 	vfe->reg_update &= ~REG_UPDATE_RDI(vfe, line_id);
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| }
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| 
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| static void vfe_enable_irq_common(struct vfe_device *vfe)
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| {
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| 	/* enable only the IRQs used: rup and comp_done irqs for RDI0 */
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| 	writel_relaxed(IRQ_MASK_0_RESET_ACK | IRQ_MASK_0_BUS_TOP_IRQ,
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| 		       vfe->base + VFE_IRQ_MASK(0));
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| 	writel_relaxed(BUS_IRQ_MASK_0_RDI_RUP(vfe, 0) |
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| 		       BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(0)),
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| 		       vfe->base + VFE_BUS_IRQ_MASK(0));
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| }
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| 
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| static void vfe_isr_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id);
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| static void vfe_isr_wm_done(struct vfe_device *vfe, u8 wm);
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| 
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| /*
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|  * vfe_isr - VFE module interrupt handler
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|  * @irq: Interrupt line
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|  * @dev: VFE device
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|  *
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|  * Return IRQ_HANDLED on success
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|  */
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| static irqreturn_t vfe_isr(int irq, void *dev)
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| {
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| 	struct vfe_device *vfe = dev;
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| 	u32 status;
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| 
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| 	status = readl_relaxed(vfe->base + VFE_IRQ_STATUS(0));
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| 	writel_relaxed(status, vfe->base + VFE_IRQ_CLEAR(0));
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| 	writel_relaxed(IRQ_CMD_GLOBAL_CLEAR, vfe->base + VFE_IRQ_CMD);
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| 
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| 	if (status & IRQ_MASK_0_RESET_ACK)
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| 		vfe_isr_reset_ack(vfe);
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| 
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| 	if (status & IRQ_MASK_0_BUS_TOP_IRQ) {
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| 		u32 status = readl_relaxed(vfe->base + VFE_BUS_IRQ_STATUS(0));
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| 
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| 		writel_relaxed(status, vfe->base + VFE_BUS_IRQ_CLEAR(0));
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| 		writel_relaxed(1, vfe->base + VFE_BUS_IRQ_CLEAR_GLOBAL);
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| 
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| 		if (status & BUS_IRQ_MASK_0_RDI_RUP(vfe, 0))
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| 			vfe_isr_reg_update(vfe, 0);
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| 
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| 		if (status & BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(0)))
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| 			vfe_isr_wm_done(vfe, 0);
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| 	}
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| 
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| 	return IRQ_HANDLED;
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| }
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| 
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| /*
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|  * vfe_halt - Trigger halt on VFE module and wait to complete
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|  * @vfe: VFE device
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|  *
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|  * Return 0 on success or a negative error code otherwise
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|  */
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| static int vfe_halt(struct vfe_device *vfe)
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| {
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| 	/* rely on vfe_disable_output() to stop the VFE */
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| 	return 0;
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| }
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| 
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| static int vfe_get_output(struct vfe_line *line)
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| {
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| 	struct vfe_device *vfe = to_vfe(line);
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| 	struct vfe_output *output;
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| 	unsigned long flags;
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| 	int wm_idx;
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| 
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| 	spin_lock_irqsave(&vfe->output_lock, flags);
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| 
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| 	output = &line->output;
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| 	if (output->state != VFE_OUTPUT_OFF) {
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| 		dev_err(vfe->camss->dev, "Output is running\n");
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| 		goto error;
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| 	}
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| 
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| 	output->wm_num = 1;
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| 
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| 	wm_idx = vfe_reserve_wm(vfe, line->id);
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| 	if (wm_idx < 0) {
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| 		dev_err(vfe->camss->dev, "Can not reserve wm\n");
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| 		goto error_get_wm;
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| 	}
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| 	output->wm_idx[0] = wm_idx;
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| 
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| 	output->drop_update_idx = 0;
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| 
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| 	spin_unlock_irqrestore(&vfe->output_lock, flags);
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| 
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| 	return 0;
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| 
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| error_get_wm:
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| 	vfe_release_wm(vfe, output->wm_idx[0]);
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| 	output->state = VFE_OUTPUT_OFF;
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| error:
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| 	spin_unlock_irqrestore(&vfe->output_lock, flags);
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| 
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| 	return -EINVAL;
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| }
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| 
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| static int vfe_enable_output(struct vfe_line *line)
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| {
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| 	struct vfe_device *vfe = to_vfe(line);
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| 	struct vfe_output *output = &line->output;
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| 	unsigned long flags;
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| 	unsigned int i;
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| 
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| 	spin_lock_irqsave(&vfe->output_lock, flags);
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| 
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| 	vfe_reg_update_clear(vfe, line->id);
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| 
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| 	if (output->state != VFE_OUTPUT_OFF) {
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| 		dev_err(vfe->camss->dev, "Output is not in reserved state %d\n",
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| 			output->state);
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| 		spin_unlock_irqrestore(&vfe->output_lock, flags);
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| 		return -EINVAL;
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| 	}
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| 
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| 	WARN_ON(output->gen2.active_num);
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| 
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| 	output->state = VFE_OUTPUT_ON;
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| 
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| 	output->sequence = 0;
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| 	output->wait_reg_update = 0;
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| 	reinit_completion(&output->reg_update);
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| 
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| 	vfe_wm_start(vfe, output->wm_idx[0], line);
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| 
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| 	for (i = 0; i < 2; i++) {
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| 		output->buf[i] = vfe_buf_get_pending(output);
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| 		if (!output->buf[i])
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| 			break;
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| 		output->gen2.active_num++;
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| 		vfe_wm_update(vfe, output->wm_idx[0], output->buf[i]->addr[0], line);
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| 	}
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| 
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| 	vfe_reg_update(vfe, line->id);
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| 
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| 	spin_unlock_irqrestore(&vfe->output_lock, flags);
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| 
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| 	return 0;
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| }
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| 
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| static void vfe_disable_output(struct vfe_line *line)
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| {
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| 	struct vfe_device *vfe = to_vfe(line);
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| 	struct vfe_output *output = &line->output;
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| 	unsigned long flags;
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| 	unsigned int i;
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| 
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| 	spin_lock_irqsave(&vfe->output_lock, flags);
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| 	for (i = 0; i < output->wm_num; i++)
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| 		vfe_wm_stop(vfe, output->wm_idx[i]);
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| 	output->gen2.active_num = 0;
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| 	spin_unlock_irqrestore(&vfe->output_lock, flags);
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| 
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| 	vfe_reset(vfe);
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| }
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| 
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| /*
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|  * vfe_enable - Enable streaming on VFE line
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|  * @line: VFE line
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|  *
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|  * Return 0 on success or a negative error code otherwise
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|  */
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| static int vfe_enable(struct vfe_line *line)
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| {
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| 	struct vfe_device *vfe = to_vfe(line);
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| 	int ret;
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| 
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| 	mutex_lock(&vfe->stream_lock);
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| 
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| 	if (!vfe->stream_count)
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| 		vfe_enable_irq_common(vfe);
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| 
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| 	vfe->stream_count++;
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| 
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| 	mutex_unlock(&vfe->stream_lock);
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| 
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| 	ret = vfe_get_output(line);
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| 	if (ret < 0)
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| 		goto error_get_output;
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| 
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| 	ret = vfe_enable_output(line);
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| 	if (ret < 0)
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| 		goto error_enable_output;
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| 
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| 	vfe->was_streaming = 1;
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| 
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| 	return 0;
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| 
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| error_enable_output:
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| 	vfe_put_output(line);
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| 
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| error_get_output:
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| 	mutex_lock(&vfe->stream_lock);
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| 
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| 	vfe->stream_count--;
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| 
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| 	mutex_unlock(&vfe->stream_lock);
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| 
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| 	return ret;
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| }
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| 
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| /*
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|  * vfe_disable - Disable streaming on VFE line
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|  * @line: VFE line
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|  *
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|  * Return 0 on success or a negative error code otherwise
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|  */
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| static int vfe_disable(struct vfe_line *line)
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| {
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| 	struct vfe_device *vfe = to_vfe(line);
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| 
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| 	vfe_disable_output(line);
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| 
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| 	vfe_put_output(line);
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| 
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| 	mutex_lock(&vfe->stream_lock);
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| 
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| 	vfe->stream_count--;
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| 
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| 	mutex_unlock(&vfe->stream_lock);
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| 
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| 	return 0;
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| }
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| 
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| /*
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|  * vfe_isr_reg_update - Process reg update interrupt
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|  * @vfe: VFE Device
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|  * @line_id: VFE line
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|  */
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| static void vfe_isr_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id)
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| {
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| 	struct vfe_output *output;
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| 	unsigned long flags;
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| 
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| 	spin_lock_irqsave(&vfe->output_lock, flags);
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| 	vfe_reg_update_clear(vfe, line_id);
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| 
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| 	output = &vfe->line[line_id].output;
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| 
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| 	if (output->wait_reg_update) {
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| 		output->wait_reg_update = 0;
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| 		complete(&output->reg_update);
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| 	}
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| 
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| 	spin_unlock_irqrestore(&vfe->output_lock, flags);
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| }
 | |
| 
 | |
| /*
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|  * vfe_isr_wm_done - Process write master done interrupt
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|  * @vfe: VFE Device
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|  * @wm: Write master id
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|  */
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| static void vfe_isr_wm_done(struct vfe_device *vfe, u8 wm)
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| {
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| 	struct vfe_line *line = &vfe->line[vfe->wm_output_map[wm]];
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| 	struct camss_buffer *ready_buf;
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| 	struct vfe_output *output;
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| 	unsigned long flags;
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| 	u32 index;
 | |
| 	u64 ts = ktime_get_ns();
 | |
| 
 | |
| 	spin_lock_irqsave(&vfe->output_lock, flags);
 | |
| 
 | |
| 	if (vfe->wm_output_map[wm] == VFE_LINE_NONE) {
 | |
| 		dev_err_ratelimited(vfe->camss->dev,
 | |
| 				    "Received wm done for unmapped index\n");
 | |
| 		goto out_unlock;
 | |
| 	}
 | |
| 	output = &vfe->line[vfe->wm_output_map[wm]].output;
 | |
| 
 | |
| 	ready_buf = output->buf[0];
 | |
| 	if (!ready_buf) {
 | |
| 		dev_err_ratelimited(vfe->camss->dev,
 | |
| 				    "Missing ready buf %d!\n", output->state);
 | |
| 		goto out_unlock;
 | |
| 	}
 | |
| 
 | |
| 	ready_buf->vb.vb2_buf.timestamp = ts;
 | |
| 	ready_buf->vb.sequence = output->sequence++;
 | |
| 
 | |
| 	index = 0;
 | |
| 	output->buf[0] = output->buf[1];
 | |
| 	if (output->buf[0])
 | |
| 		index = 1;
 | |
| 
 | |
| 	output->buf[index] = vfe_buf_get_pending(output);
 | |
| 
 | |
| 	if (output->buf[index])
 | |
| 		vfe_wm_update(vfe, output->wm_idx[0], output->buf[index]->addr[0], line);
 | |
| 	else
 | |
| 		output->gen2.active_num--;
 | |
| 
 | |
| 	spin_unlock_irqrestore(&vfe->output_lock, flags);
 | |
| 
 | |
| 	vb2_buffer_done(&ready_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
 | |
| 
 | |
| 	return;
 | |
| 
 | |
| out_unlock:
 | |
| 	spin_unlock_irqrestore(&vfe->output_lock, flags);
 | |
| }
 | |
| 
 | |
| /*
 | |
|  * vfe_pm_domain_off - Disable power domains specific to this VFE.
 | |
|  * @vfe: VFE Device
 | |
|  */
 | |
| static void vfe_pm_domain_off(struct vfe_device *vfe)
 | |
| {
 | |
| 	struct camss *camss = vfe->camss;
 | |
| 
 | |
| 	if (vfe->id >= camss->vfe_num)
 | |
| 		return;
 | |
| 
 | |
| 	device_link_del(camss->genpd_link[vfe->id]);
 | |
| }
 | |
| 
 | |
| /*
 | |
|  * vfe_pm_domain_on - Enable power domains specific to this VFE.
 | |
|  * @vfe: VFE Device
 | |
|  */
 | |
| static int vfe_pm_domain_on(struct vfe_device *vfe)
 | |
| {
 | |
| 	struct camss *camss = vfe->camss;
 | |
| 	enum vfe_line_id id = vfe->id;
 | |
| 
 | |
| 	if (id >= camss->vfe_num)
 | |
| 		return 0;
 | |
| 
 | |
| 	camss->genpd_link[id] = device_link_add(camss->dev, camss->genpd[id],
 | |
| 						DL_FLAG_STATELESS |
 | |
| 						DL_FLAG_PM_RUNTIME |
 | |
| 						DL_FLAG_RPM_ACTIVE);
 | |
| 	if (!camss->genpd_link[id])
 | |
| 		return -EINVAL;
 | |
| 
 | |
| 	return 0;
 | |
| }
 | |
| 
 | |
| /*
 | |
|  * vfe_queue_buffer - Add empty buffer
 | |
|  * @vid: Video device structure
 | |
|  * @buf: Buffer to be enqueued
 | |
|  *
 | |
|  * Add an empty buffer - depending on the current number of buffers it will be
 | |
|  * put in pending buffer queue or directly given to the hardware to be filled.
 | |
|  *
 | |
|  * Return 0 on success or a negative error code otherwise
 | |
|  */
 | |
| static int vfe_queue_buffer(struct camss_video *vid,
 | |
| 			    struct camss_buffer *buf)
 | |
| {
 | |
| 	struct vfe_line *line = container_of(vid, struct vfe_line, video_out);
 | |
| 	struct vfe_device *vfe = to_vfe(line);
 | |
| 	struct vfe_output *output;
 | |
| 	unsigned long flags;
 | |
| 
 | |
| 	output = &line->output;
 | |
| 
 | |
| 	spin_lock_irqsave(&vfe->output_lock, flags);
 | |
| 
 | |
| 	if (output->state == VFE_OUTPUT_ON && output->gen2.active_num < 2) {
 | |
| 		output->buf[output->gen2.active_num++] = buf;
 | |
| 		vfe_wm_update(vfe, output->wm_idx[0], buf->addr[0], line);
 | |
| 	} else {
 | |
| 		vfe_buf_add_pending(output, buf);
 | |
| 	}
 | |
| 
 | |
| 	spin_unlock_irqrestore(&vfe->output_lock, flags);
 | |
| 
 | |
| 	return 0;
 | |
| }
 | |
| 
 | |
| static const struct camss_video_ops vfe_video_ops_480 = {
 | |
| 	.queue_buffer = vfe_queue_buffer,
 | |
| 	.flush_buffers = vfe_flush_buffers,
 | |
| };
 | |
| 
 | |
| static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe)
 | |
| {
 | |
| 	vfe->video_ops = vfe_video_ops_480;
 | |
| 	vfe->line_num = 1;
 | |
| }
 | |
| 
 | |
| const struct vfe_hw_ops vfe_ops_480 = {
 | |
| 	.global_reset = vfe_global_reset,
 | |
| 	.hw_version = vfe_hw_version,
 | |
| 	.isr = vfe_isr,
 | |
| 	.pm_domain_off = vfe_pm_domain_off,
 | |
| 	.pm_domain_on = vfe_pm_domain_on,
 | |
| 	.subdev_init = vfe_subdev_init,
 | |
| 	.vfe_disable = vfe_disable,
 | |
| 	.vfe_enable = vfe_enable,
 | |
| 	.vfe_halt = vfe_halt,
 | |
| };
 |