477 lines
		
	
	
		
			11 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			477 lines
		
	
	
		
			11 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0
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| /*
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|  * Copyright 2020-2021 NXP
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|  */
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| 
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| #include <linux/init.h>
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| #include <linux/interconnect.h>
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| #include <linux/ioctl.h>
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| #include <linux/list.h>
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| #include <linux/kernel.h>
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| #include <linux/module.h>
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| #include <linux/platform_device.h>
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| #include "vpu.h"
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| #include "vpu_defs.h"
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| #include "vpu_core.h"
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| #include "vpu_rpc.h"
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| #include "vpu_helpers.h"
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| 
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| int vpu_helper_find_in_array_u8(const u8 *array, u32 size, u32 x)
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| {
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| 	int i;
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| 
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| 	for (i = 0; i < size; i++) {
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| 		if (array[i] == x)
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| 			return i;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| bool vpu_helper_check_type(struct vpu_inst *inst, u32 type)
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| {
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| 	const struct vpu_format *pfmt;
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| 
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| 	for (pfmt = inst->formats; pfmt->pixfmt; pfmt++) {
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| 		if (!vpu_iface_check_format(inst, pfmt->pixfmt))
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| 			continue;
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| 		if (pfmt->type == type)
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| 			return true;
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| 	}
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| 
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| 	return false;
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| }
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| 
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| const struct vpu_format *vpu_helper_find_format(struct vpu_inst *inst, u32 type, u32 pixelfmt)
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| {
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| 	const struct vpu_format *pfmt;
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| 
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| 	if (!inst || !inst->formats)
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| 		return NULL;
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| 
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| 	if (!vpu_iface_check_format(inst, pixelfmt))
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| 		return NULL;
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| 
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| 	for (pfmt = inst->formats; pfmt->pixfmt; pfmt++) {
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| 		if (pfmt->pixfmt == pixelfmt && (!type || type == pfmt->type))
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| 			return pfmt;
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| 	}
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| 
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| 	return NULL;
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| }
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| 
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| const struct vpu_format *vpu_helper_enum_format(struct vpu_inst *inst, u32 type, int index)
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| {
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| 	const struct vpu_format *pfmt;
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| 	int i = 0;
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| 
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| 	if (!inst || !inst->formats)
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| 		return NULL;
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| 
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| 	for (pfmt = inst->formats; pfmt->pixfmt; pfmt++) {
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| 		if (!vpu_iface_check_format(inst, pfmt->pixfmt))
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| 			continue;
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| 
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| 		if (pfmt->type == type) {
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| 			if (index == i)
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| 				return pfmt;
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| 			i++;
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| 		}
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| 	}
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| 
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| 	return NULL;
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| }
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| 
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| u32 vpu_helper_valid_frame_width(struct vpu_inst *inst, u32 width)
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| {
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| 	const struct vpu_core_resources *res;
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| 
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| 	if (!inst)
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| 		return width;
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| 
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| 	res = vpu_get_resource(inst);
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| 	if (!res)
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| 		return width;
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| 	if (res->max_width)
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| 		width = clamp(width, res->min_width, res->max_width);
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| 	if (res->step_width)
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| 		width = ALIGN(width, res->step_width);
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| 
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| 	return width;
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| }
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| 
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| u32 vpu_helper_valid_frame_height(struct vpu_inst *inst, u32 height)
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| {
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| 	const struct vpu_core_resources *res;
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| 
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| 	if (!inst)
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| 		return height;
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| 
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| 	res = vpu_get_resource(inst);
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| 	if (!res)
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| 		return height;
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| 	if (res->max_height)
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| 		height = clamp(height, res->min_height, res->max_height);
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| 	if (res->step_height)
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| 		height = ALIGN(height, res->step_height);
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| 
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| 	return height;
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| }
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| 
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| static u32 get_nv12_plane_size(u32 width, u32 height, int plane_no,
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| 			       u32 stride, u32 interlaced, u32 *pbl)
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| {
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| 	u32 bytesperline;
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| 	u32 size = 0;
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| 
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| 	bytesperline = ALIGN(width, stride);
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| 	if (pbl)
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| 		bytesperline = max(bytesperline, *pbl);
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| 	height = ALIGN(height, 2);
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| 	if (plane_no == 0)
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| 		size = bytesperline * height;
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| 	else if (plane_no == 1)
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| 		size = bytesperline * height >> 1;
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| 	if (pbl)
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| 		*pbl = bytesperline;
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| 
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| 	return size;
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| }
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| 
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| static u32 get_tiled_8l128_plane_size(u32 fmt, u32 width, u32 height, int plane_no,
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| 				      u32 stride, u32 interlaced, u32 *pbl)
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| {
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| 	u32 ws = 3;
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| 	u32 hs = 7;
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| 	u32 bitdepth = 8;
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| 	u32 bytesperline;
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| 	u32 size = 0;
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| 
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| 	if (interlaced)
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| 		hs++;
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| 	if (fmt == V4L2_PIX_FMT_NV12M_10BE_8L128)
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| 		bitdepth = 10;
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| 	bytesperline = DIV_ROUND_UP(width * bitdepth, BITS_PER_BYTE);
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| 	bytesperline = ALIGN(bytesperline, 1 << ws);
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| 	bytesperline = ALIGN(bytesperline, stride);
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| 	if (pbl)
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| 		bytesperline = max(bytesperline, *pbl);
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| 	height = ALIGN(height, 1 << hs);
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| 	if (plane_no == 0)
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| 		size = bytesperline * height;
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| 	else if (plane_no == 1)
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| 		size = (bytesperline * ALIGN(height, 1 << (hs + 1))) >> 1;
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| 	if (pbl)
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| 		*pbl = bytesperline;
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| 
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| 	return size;
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| }
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| 
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| static u32 get_default_plane_size(u32 width, u32 height, int plane_no,
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| 				  u32 stride, u32 interlaced, u32 *pbl)
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| {
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| 	u32 bytesperline;
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| 	u32 size = 0;
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| 
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| 	bytesperline = ALIGN(width, stride);
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| 	if (pbl)
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| 		bytesperline = max(bytesperline, *pbl);
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| 	if (plane_no == 0)
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| 		size = bytesperline * height;
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| 	if (pbl)
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| 		*pbl = bytesperline;
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| 
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| 	return size;
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| }
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| 
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| u32 vpu_helper_get_plane_size(u32 fmt, u32 w, u32 h, int plane_no,
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| 			      u32 stride, u32 interlaced, u32 *pbl)
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| {
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| 	switch (fmt) {
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| 	case V4L2_PIX_FMT_NV12M:
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| 		return get_nv12_plane_size(w, h, plane_no, stride, interlaced, pbl);
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| 	case V4L2_PIX_FMT_NV12M_8L128:
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| 	case V4L2_PIX_FMT_NV12M_10BE_8L128:
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| 		return get_tiled_8l128_plane_size(fmt, w, h, plane_no, stride, interlaced, pbl);
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| 	default:
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| 		return get_default_plane_size(w, h, plane_no, stride, interlaced, pbl);
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| 	}
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| }
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| 
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| int vpu_helper_copy_from_stream_buffer(struct vpu_buffer *stream_buffer,
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| 				       u32 *rptr, u32 size, void *dst)
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| {
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| 	u32 offset;
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| 	u32 start;
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| 	u32 end;
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| 	void *virt;
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| 
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| 	if (!stream_buffer || !rptr || !dst)
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| 		return -EINVAL;
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| 
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| 	if (!size)
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| 		return 0;
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| 
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| 	offset = *rptr;
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| 	start = stream_buffer->phys;
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| 	end = start + stream_buffer->length;
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| 	virt = stream_buffer->virt;
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| 
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| 	if (offset < start || offset > end)
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| 		return -EINVAL;
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| 
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| 	if (offset + size <= end) {
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| 		memcpy(dst, virt + (offset - start), size);
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| 	} else {
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| 		memcpy(dst, virt + (offset - start), end - offset);
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| 		memcpy(dst + end - offset, virt, size + offset - end);
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| 	}
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| 
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| 	*rptr = vpu_helper_step_walk(stream_buffer, offset, size);
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| 
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| 	return 0;
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| }
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| 
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| int vpu_helper_copy_to_stream_buffer(struct vpu_buffer *stream_buffer,
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| 				     u32 *wptr, u32 size, void *src)
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| {
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| 	u32 offset;
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| 	u32 start;
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| 	u32 end;
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| 	void *virt;
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| 
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| 	if (!stream_buffer || !wptr || !src)
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| 		return -EINVAL;
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| 
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| 	if (!size)
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| 		return 0;
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| 
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| 	offset = *wptr;
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| 	start = stream_buffer->phys;
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| 	end = start + stream_buffer->length;
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| 	virt = stream_buffer->virt;
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| 	if (offset < start || offset > end)
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| 		return -EINVAL;
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| 
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| 	if (offset + size <= end) {
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| 		memcpy(virt + (offset - start), src, size);
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| 	} else {
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| 		memcpy(virt + (offset - start), src, end - offset);
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| 		memcpy(virt, src + end - offset, size + offset - end);
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| 	}
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| 
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| 	*wptr = vpu_helper_step_walk(stream_buffer, offset, size);
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| 
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| 	return 0;
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| }
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| 
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| int vpu_helper_memset_stream_buffer(struct vpu_buffer *stream_buffer,
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| 				    u32 *wptr, u8 val, u32 size)
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| {
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| 	u32 offset;
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| 	u32 start;
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| 	u32 end;
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| 	void *virt;
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| 
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| 	if (!stream_buffer || !wptr)
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| 		return -EINVAL;
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| 
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| 	if (!size)
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| 		return 0;
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| 
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| 	offset = *wptr;
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| 	start = stream_buffer->phys;
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| 	end = start + stream_buffer->length;
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| 	virt = stream_buffer->virt;
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| 	if (offset < start || offset > end)
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| 		return -EINVAL;
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| 
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| 	if (offset + size <= end) {
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| 		memset(virt + (offset - start), val, size);
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| 	} else {
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| 		memset(virt + (offset - start), val, end - offset);
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| 		memset(virt, val, size + offset - end);
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| 	}
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| 
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| 	offset += size;
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| 	if (offset >= end)
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| 		offset -= stream_buffer->length;
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| 
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| 	*wptr = offset;
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| 
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| 	return 0;
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| }
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| 
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| u32 vpu_helper_get_free_space(struct vpu_inst *inst)
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| {
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| 	struct vpu_rpc_buffer_desc desc;
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| 
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| 	if (vpu_iface_get_stream_buffer_desc(inst, &desc))
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| 		return 0;
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| 
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| 	if (desc.rptr > desc.wptr)
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| 		return desc.rptr - desc.wptr;
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| 	else if (desc.rptr < desc.wptr)
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| 		return (desc.end - desc.start + desc.rptr - desc.wptr);
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| 	else
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| 		return desc.end - desc.start;
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| }
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| 
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| u32 vpu_helper_get_used_space(struct vpu_inst *inst)
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| {
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| 	struct vpu_rpc_buffer_desc desc;
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| 
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| 	if (vpu_iface_get_stream_buffer_desc(inst, &desc))
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| 		return 0;
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| 
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| 	if (desc.wptr > desc.rptr)
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| 		return desc.wptr - desc.rptr;
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| 	else if (desc.wptr < desc.rptr)
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| 		return (desc.end - desc.start + desc.wptr - desc.rptr);
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| 	else
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| 		return 0;
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| }
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| 
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| int vpu_helper_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
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| {
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| 	struct vpu_inst *inst = ctrl_to_inst(ctrl);
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| 
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| 	switch (ctrl->id) {
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| 	case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE:
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| 		ctrl->val = inst->min_buffer_cap;
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| 		break;
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| 	case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT:
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| 		ctrl->val = inst->min_buffer_out;
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| 		break;
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| 	default:
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| 		return -EINVAL;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| int vpu_helper_find_startcode(struct vpu_buffer *stream_buffer,
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| 			      u32 pixelformat, u32 offset, u32 bytesused)
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| {
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| 	u32 start_code;
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| 	int start_code_size;
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| 	u32 val = 0;
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| 	int i;
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| 	int ret = -EINVAL;
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| 
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| 	if (!stream_buffer || !stream_buffer->virt)
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| 		return -EINVAL;
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| 
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| 	switch (pixelformat) {
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| 	case V4L2_PIX_FMT_H264:
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| 		start_code_size = 4;
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| 		start_code = 0x00000001;
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| 		break;
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| 	default:
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| 		return 0;
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| 	}
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| 
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| 	for (i = 0; i < bytesused; i++) {
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| 		val = (val << 8) | vpu_helper_read_byte(stream_buffer, offset + i);
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| 		if (i < start_code_size - 1)
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| 			continue;
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| 		if (val == start_code) {
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| 			ret = i + 1 - start_code_size;
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| 			break;
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| 		}
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| 	}
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| 
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| 	return ret;
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| }
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| 
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| int vpu_find_dst_by_src(struct vpu_pair *pairs, u32 cnt, u32 src)
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| {
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| 	u32 i;
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| 
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| 	if (!pairs || !cnt)
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| 		return -EINVAL;
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| 
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| 	for (i = 0; i < cnt; i++) {
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| 		if (pairs[i].src == src)
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| 			return pairs[i].dst;
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| 	}
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| 
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| 	return -EINVAL;
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| }
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| 
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| int vpu_find_src_by_dst(struct vpu_pair *pairs, u32 cnt, u32 dst)
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| {
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| 	u32 i;
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| 
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| 	if (!pairs || !cnt)
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| 		return -EINVAL;
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| 
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| 	for (i = 0; i < cnt; i++) {
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| 		if (pairs[i].dst == dst)
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| 			return pairs[i].src;
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| 	}
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| 
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| 	return -EINVAL;
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| }
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| 
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| const char *vpu_id_name(u32 id)
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| {
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| 	switch (id) {
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| 	case VPU_CMD_ID_NOOP: return "noop";
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| 	case VPU_CMD_ID_CONFIGURE_CODEC: return "configure codec";
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| 	case VPU_CMD_ID_START: return "start";
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| 	case VPU_CMD_ID_STOP: return "stop";
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| 	case VPU_CMD_ID_ABORT: return "abort";
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| 	case VPU_CMD_ID_RST_BUF: return "reset buf";
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| 	case VPU_CMD_ID_SNAPSHOT: return "snapshot";
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| 	case VPU_CMD_ID_FIRM_RESET: return "reset firmware";
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| 	case VPU_CMD_ID_UPDATE_PARAMETER: return "update parameter";
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| 	case VPU_CMD_ID_FRAME_ENCODE: return "encode frame";
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| 	case VPU_CMD_ID_SKIP: return "skip";
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| 	case VPU_CMD_ID_FS_ALLOC: return "alloc fb";
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| 	case VPU_CMD_ID_FS_RELEASE: return "release fb";
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| 	case VPU_CMD_ID_TIMESTAMP: return "timestamp";
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| 	case VPU_CMD_ID_DEBUG: return "debug";
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| 	case VPU_MSG_ID_RESET_DONE: return "reset done";
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| 	case VPU_MSG_ID_START_DONE: return "start done";
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| 	case VPU_MSG_ID_STOP_DONE: return "stop done";
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| 	case VPU_MSG_ID_ABORT_DONE: return "abort done";
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| 	case VPU_MSG_ID_BUF_RST: return "buf reset done";
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| 	case VPU_MSG_ID_MEM_REQUEST: return "mem request";
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| 	case VPU_MSG_ID_PARAM_UPD_DONE: return "param upd done";
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| 	case VPU_MSG_ID_FRAME_INPUT_DONE: return "frame input done";
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| 	case VPU_MSG_ID_ENC_DONE: return "encode done";
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| 	case VPU_MSG_ID_DEC_DONE: return "frame display";
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| 	case VPU_MSG_ID_FRAME_REQ: return "fb request";
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| 	case VPU_MSG_ID_FRAME_RELEASE: return "fb release";
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| 	case VPU_MSG_ID_SEQ_HDR_FOUND: return "seq hdr found";
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| 	case VPU_MSG_ID_RES_CHANGE: return "resolution change";
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| 	case VPU_MSG_ID_PIC_HDR_FOUND: return "pic hdr found";
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| 	case VPU_MSG_ID_PIC_DECODED: return "picture decoded";
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| 	case VPU_MSG_ID_PIC_EOS: return "eos";
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| 	case VPU_MSG_ID_FIFO_LOW: return "fifo low";
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| 	case VPU_MSG_ID_BS_ERROR: return "bs error";
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| 	case VPU_MSG_ID_UNSUPPORTED: return "unsupported";
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| 	case VPU_MSG_ID_FIRMWARE_XCPT: return "exception";
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| 	case VPU_MSG_ID_PIC_SKIPPED: return "skipped";
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| 	case VPU_MSG_ID_DBG_MSG: return "debug msg";
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| 	}
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| 	return "<unknown>";
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| }
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| 
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| const char *vpu_codec_state_name(enum vpu_codec_state state)
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| {
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| 	switch (state) {
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| 	case VPU_CODEC_STATE_DEINIT: return "initialization";
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| 	case VPU_CODEC_STATE_CONFIGURED: return "configured";
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| 	case VPU_CODEC_STATE_START: return "start";
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| 	case VPU_CODEC_STATE_STARTED: return "started";
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| 	case VPU_CODEC_STATE_ACTIVE: return "active";
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| 	case VPU_CODEC_STATE_SEEK: return "seek";
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| 	case VPU_CODEC_STATE_STOP: return "stop";
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| 	case VPU_CODEC_STATE_DRAIN: return "drain";
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| 	case VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE: return "resolution change";
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| 	}
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| 	return "<unknown>";
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| }
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