248 lines
		
	
	
		
			7.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			248 lines
		
	
	
		
			7.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-only
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| /*
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|  *  cobalt interrupt handling
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|  *
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|  *  Copyright 2012-2015 Cisco Systems, Inc. and/or its affiliates.
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|  *  All rights reserved.
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|  */
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| 
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| #include <media/i2c/adv7604.h>
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| 
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| #include "cobalt-driver.h"
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| #include "cobalt-irq.h"
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| #include "cobalt-omnitek.h"
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| 
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| static void cobalt_dma_stream_queue_handler(struct cobalt_stream *s)
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| {
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| 	struct cobalt *cobalt = s->cobalt;
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| 	int rx = s->video_channel;
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| 	struct m00473_freewheel_regmap __iomem *fw =
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| 		COBALT_CVI_FREEWHEEL(s->cobalt, rx);
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| 	struct m00233_video_measure_regmap __iomem *vmr =
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| 		COBALT_CVI_VMR(s->cobalt, rx);
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| 	struct m00389_cvi_regmap __iomem *cvi =
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| 		COBALT_CVI(s->cobalt, rx);
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| 	struct m00479_clk_loss_detector_regmap __iomem *clkloss =
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| 		COBALT_CVI_CLK_LOSS(s->cobalt, rx);
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| 	struct cobalt_buffer *cb;
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| 	bool skip = false;
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| 
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| 	spin_lock(&s->irqlock);
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| 
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| 	if (list_empty(&s->bufs)) {
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| 		pr_err("no buffers!\n");
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| 		spin_unlock(&s->irqlock);
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| 		return;
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| 	}
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| 
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| 	/* Give the fresh filled up buffer to the user.
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| 	 * Note that the interrupt is only sent if the DMA can continue
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| 	 * with a new buffer, so it is always safe to return this buffer
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| 	 * to userspace. */
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| 	cb = list_first_entry(&s->bufs, struct cobalt_buffer, list);
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| 	list_del(&cb->list);
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| 	spin_unlock(&s->irqlock);
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| 
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| 	if (s->is_audio || s->is_output)
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| 		goto done;
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| 
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| 	if (s->unstable_frame) {
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| 		uint32_t stat = ioread32(&vmr->irq_status);
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| 
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| 		iowrite32(stat, &vmr->irq_status);
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| 		if (!(ioread32(&vmr->status) &
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| 		      M00233_STATUS_BITMAP_INIT_DONE_MSK)) {
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| 			cobalt_dbg(1, "!init_done\n");
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| 			if (s->enable_freewheel)
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| 				goto restart_fw;
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| 			goto done;
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| 		}
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| 
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| 		if (ioread32(&clkloss->status) &
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| 		    M00479_STATUS_BITMAP_CLOCK_MISSING_MSK) {
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| 			iowrite32(0, &clkloss->ctrl);
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| 			iowrite32(M00479_CTRL_BITMAP_ENABLE_MSK, &clkloss->ctrl);
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| 			cobalt_dbg(1, "no clock\n");
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| 			if (s->enable_freewheel)
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| 				goto restart_fw;
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| 			goto done;
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| 		}
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| 		if ((stat & (M00233_IRQ_STATUS_BITMAP_VACTIVE_AREA_MSK |
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| 			     M00233_IRQ_STATUS_BITMAP_HACTIVE_AREA_MSK)) ||
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| 				ioread32(&vmr->vactive_area) != s->timings.bt.height ||
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| 				ioread32(&vmr->hactive_area) != s->timings.bt.width) {
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| 			cobalt_dbg(1, "unstable\n");
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| 			if (s->enable_freewheel)
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| 				goto restart_fw;
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| 			goto done;
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| 		}
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| 		if (!s->enable_cvi) {
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| 			s->enable_cvi = true;
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| 			iowrite32(M00389_CONTROL_BITMAP_ENABLE_MSK, &cvi->control);
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| 			goto done;
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| 		}
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| 		if (!(ioread32(&cvi->status) & M00389_STATUS_BITMAP_LOCK_MSK)) {
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| 			cobalt_dbg(1, "cvi no lock\n");
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| 			if (s->enable_freewheel)
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| 				goto restart_fw;
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| 			goto done;
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| 		}
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| 		if (!s->enable_freewheel) {
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| 			cobalt_dbg(1, "stable\n");
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| 			s->enable_freewheel = true;
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| 			iowrite32(0, &fw->ctrl);
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| 			goto done;
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| 		}
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| 		cobalt_dbg(1, "enabled fw\n");
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| 		iowrite32(M00233_CONTROL_BITMAP_ENABLE_MEASURE_MSK |
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| 			  M00233_CONTROL_BITMAP_ENABLE_INTERRUPT_MSK,
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| 			  &vmr->control);
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| 		iowrite32(M00473_CTRL_BITMAP_ENABLE_MSK, &fw->ctrl);
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| 		s->enable_freewheel = false;
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| 		s->unstable_frame = false;
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| 		s->skip_first_frames = 2;
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| 		skip = true;
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| 		goto done;
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| 	}
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| 	if (ioread32(&fw->status) & M00473_STATUS_BITMAP_FREEWHEEL_MODE_MSK) {
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| restart_fw:
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| 		cobalt_dbg(1, "lost lock\n");
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| 		iowrite32(M00233_CONTROL_BITMAP_ENABLE_MEASURE_MSK,
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| 			  &vmr->control);
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| 		iowrite32(M00473_CTRL_BITMAP_ENABLE_MSK |
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| 			  M00473_CTRL_BITMAP_FORCE_FREEWHEEL_MODE_MSK,
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| 			  &fw->ctrl);
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| 		iowrite32(0, &cvi->control);
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| 		s->unstable_frame = true;
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| 		s->enable_freewheel = false;
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| 		s->enable_cvi = false;
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| 	}
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| done:
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| 	if (s->skip_first_frames) {
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| 		skip = true;
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| 		s->skip_first_frames--;
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| 	}
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| 	cb->vb.vb2_buf.timestamp = ktime_get_ns();
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| 	/* TODO: the sequence number should be read from the FPGA so we
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| 	   also know about dropped frames. */
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| 	cb->vb.sequence = s->sequence++;
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| 	vb2_buffer_done(&cb->vb.vb2_buf,
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| 			(skip || s->unstable_frame) ?
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| 			VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
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| }
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| 
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| irqreturn_t cobalt_irq_handler(int irq, void *dev_id)
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| {
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| 	struct cobalt *cobalt = (struct cobalt *)dev_id;
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| 	u32 dma_interrupt =
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| 		cobalt_read_bar0(cobalt, DMA_INTERRUPT_STATUS_REG) & 0xffff;
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| 	u32 mask = cobalt_read_bar1(cobalt, COBALT_SYS_STAT_MASK);
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| 	u32 edge = cobalt_read_bar1(cobalt, COBALT_SYS_STAT_EDGE);
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| 	int i;
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| 
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| 	/* Clear DMA interrupt */
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| 	cobalt_write_bar0(cobalt, DMA_INTERRUPT_STATUS_REG, dma_interrupt);
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| 	cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK, mask & ~edge);
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| 	cobalt_write_bar1(cobalt, COBALT_SYS_STAT_EDGE, edge);
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| 
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| 	for (i = 0; i < COBALT_NUM_STREAMS; i++) {
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| 		struct cobalt_stream *s = &cobalt->streams[i];
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| 		unsigned dma_fifo_mask = s->dma_fifo_mask;
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| 
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| 		if (dma_interrupt & (1 << s->dma_channel)) {
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| 			cobalt->irq_dma[i]++;
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| 			/* Give fresh buffer to user and chain newly
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| 			 * queued buffers */
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| 			cobalt_dma_stream_queue_handler(s);
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| 			if (!s->is_audio) {
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| 				edge &= ~dma_fifo_mask;
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| 				cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK,
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| 						  mask & ~edge);
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| 			}
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| 		}
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| 		if (s->is_audio)
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| 			continue;
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| 		if (edge & s->adv_irq_mask)
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| 			set_bit(COBALT_STREAM_FL_ADV_IRQ, &s->flags);
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| 		if ((edge & mask & dma_fifo_mask) && vb2_is_streaming(&s->q)) {
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| 			cobalt_info("full rx FIFO %d\n", i);
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| 			cobalt->irq_full_fifo++;
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| 		}
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| 	}
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| 
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| 	queue_work(cobalt->irq_work_queues, &cobalt->irq_work_queue);
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| 
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| 	if (edge & mask & (COBALT_SYSSTAT_VI0_INT1_MSK |
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| 			   COBALT_SYSSTAT_VI1_INT1_MSK |
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| 			   COBALT_SYSSTAT_VI2_INT1_MSK |
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| 			   COBALT_SYSSTAT_VI3_INT1_MSK |
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| 			   COBALT_SYSSTAT_VIHSMA_INT1_MSK |
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| 			   COBALT_SYSSTAT_VOHSMA_INT1_MSK))
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| 		cobalt->irq_adv1++;
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| 	if (edge & mask & (COBALT_SYSSTAT_VI0_INT2_MSK |
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| 			   COBALT_SYSSTAT_VI1_INT2_MSK |
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| 			   COBALT_SYSSTAT_VI2_INT2_MSK |
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| 			   COBALT_SYSSTAT_VI3_INT2_MSK |
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| 			   COBALT_SYSSTAT_VIHSMA_INT2_MSK))
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| 		cobalt->irq_adv2++;
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| 	if (edge & mask & COBALT_SYSSTAT_VOHSMA_INT1_MSK)
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| 		cobalt->irq_advout++;
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| 	if (dma_interrupt)
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| 		cobalt->irq_dma_tot++;
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| 	if (!(edge & mask) && !dma_interrupt)
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| 		cobalt->irq_none++;
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| 	dma_interrupt = cobalt_read_bar0(cobalt, DMA_INTERRUPT_STATUS_REG);
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| 
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| 	return IRQ_HANDLED;
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| }
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| 
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| void cobalt_irq_work_handler(struct work_struct *work)
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| {
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| 	struct cobalt *cobalt =
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| 		container_of(work, struct cobalt, irq_work_queue);
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| 	int i;
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| 
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| 	for (i = 0; i < COBALT_NUM_NODES; i++) {
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| 		struct cobalt_stream *s = &cobalt->streams[i];
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| 
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| 		if (test_and_clear_bit(COBALT_STREAM_FL_ADV_IRQ, &s->flags)) {
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| 			u32 mask;
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| 
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| 			v4l2_subdev_call(cobalt->streams[i].sd, core,
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| 					interrupt_service_routine, 0, NULL);
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| 			mask = cobalt_read_bar1(cobalt, COBALT_SYS_STAT_MASK);
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| 			cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK,
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| 				mask | s->adv_irq_mask);
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| 		}
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| 	}
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| }
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| 
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| void cobalt_irq_log_status(struct cobalt *cobalt)
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| {
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| 	u32 mask;
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| 	int i;
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| 
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| 	cobalt_info("irq: adv1=%u adv2=%u advout=%u none=%u full=%u\n",
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| 		    cobalt->irq_adv1, cobalt->irq_adv2, cobalt->irq_advout,
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| 		    cobalt->irq_none, cobalt->irq_full_fifo);
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| 	cobalt_info("irq: dma_tot=%u (", cobalt->irq_dma_tot);
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| 	for (i = 0; i < COBALT_NUM_STREAMS; i++)
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| 		pr_cont("%s%u", i ? "/" : "", cobalt->irq_dma[i]);
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| 	pr_cont(")\n");
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| 	cobalt->irq_dma_tot = cobalt->irq_adv1 = cobalt->irq_adv2 = 0;
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| 	cobalt->irq_advout = cobalt->irq_none = cobalt->irq_full_fifo = 0;
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| 	memset(cobalt->irq_dma, 0, sizeof(cobalt->irq_dma));
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| 
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| 	mask = cobalt_read_bar1(cobalt, COBALT_SYS_STAT_MASK);
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| 	cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK,
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| 			mask |
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| 			COBALT_SYSSTAT_VI0_LOST_DATA_MSK |
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| 			COBALT_SYSSTAT_VI1_LOST_DATA_MSK |
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| 			COBALT_SYSSTAT_VI2_LOST_DATA_MSK |
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| 			COBALT_SYSSTAT_VI3_LOST_DATA_MSK |
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| 			COBALT_SYSSTAT_VIHSMA_LOST_DATA_MSK |
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| 			COBALT_SYSSTAT_VOHSMA_LOST_DATA_MSK |
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| 			COBALT_SYSSTAT_AUD_IN_LOST_DATA_MSK |
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| 			COBALT_SYSSTAT_AUD_OUT_LOST_DATA_MSK);
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| }
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