119 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			119 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright 2012 Red Hat Inc.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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 * OTHER DEALINGS IN THE SOFTWARE.
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 *
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 * Authors: Ben Skeggs
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 */
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#include "priv.h"
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static const struct nvkm_mc_map
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gf100_mc_reset[] = {
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	{ 0x00020000, NVKM_ENGINE_MSPDEC },
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	{ 0x00008000, NVKM_ENGINE_MSVLD },
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	{ 0x00002000, NVKM_SUBDEV_PMU, 0, true },
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	{ 0x00001000, NVKM_ENGINE_GR },
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	{ 0x00000100, NVKM_ENGINE_FIFO },
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	{ 0x00000080, NVKM_ENGINE_CE, 1 },
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	{ 0x00000040, NVKM_ENGINE_CE, 0 },
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	{ 0x00000002, NVKM_ENGINE_MSPPP },
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	{}
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};
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static const struct nvkm_mc_map
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gf100_mc_intr[] = {
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	{ 0x04000000, NVKM_ENGINE_DISP },
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	{ 0x00020000, NVKM_ENGINE_MSPDEC },
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	{ 0x00008000, NVKM_ENGINE_MSVLD },
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	{ 0x00001000, NVKM_ENGINE_GR },
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	{ 0x00000100, NVKM_ENGINE_FIFO },
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	{ 0x00000040, NVKM_ENGINE_CE, 1 },
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	{ 0x00000020, NVKM_ENGINE_CE, 0 },
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	{ 0x00000001, NVKM_ENGINE_MSPPP },
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	{ 0x40000000, NVKM_SUBDEV_PRIVRING },
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	{ 0x10000000, NVKM_SUBDEV_BUS },
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	{ 0x08000000, NVKM_SUBDEV_FB },
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	{ 0x02000000, NVKM_SUBDEV_LTC },
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	{ 0x01000000, NVKM_SUBDEV_PMU },
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	{ 0x00200000, NVKM_SUBDEV_GPIO },
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	{ 0x00200000, NVKM_SUBDEV_I2C },
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	{ 0x00100000, NVKM_SUBDEV_TIMER },
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	{ 0x00040000, NVKM_SUBDEV_THERM },
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	{ 0x00002000, NVKM_SUBDEV_FB },
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	{},
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};
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void
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gf100_mc_intr_unarm(struct nvkm_mc *mc)
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{
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	struct nvkm_device *device = mc->subdev.device;
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	nvkm_wr32(device, 0x000140, 0x00000000);
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	nvkm_wr32(device, 0x000144, 0x00000000);
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	nvkm_rd32(device, 0x000140);
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}
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void
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gf100_mc_intr_rearm(struct nvkm_mc *mc)
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{
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	struct nvkm_device *device = mc->subdev.device;
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	nvkm_wr32(device, 0x000140, 0x00000001);
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	nvkm_wr32(device, 0x000144, 0x00000001);
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}
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u32
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gf100_mc_intr_stat(struct nvkm_mc *mc)
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{
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	struct nvkm_device *device = mc->subdev.device;
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	u32 intr0 = nvkm_rd32(device, 0x000100);
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	u32 intr1 = nvkm_rd32(device, 0x000104);
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	return intr0 | intr1;
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}
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void
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gf100_mc_intr_mask(struct nvkm_mc *mc, u32 mask, u32 stat)
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{
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	struct nvkm_device *device = mc->subdev.device;
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	nvkm_mask(device, 0x000640, mask, stat);
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	nvkm_mask(device, 0x000644, mask, stat);
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}
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void
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gf100_mc_unk260(struct nvkm_mc *mc, u32 data)
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{
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	nvkm_wr32(mc->subdev.device, 0x000260, data);
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}
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static const struct nvkm_mc_func
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gf100_mc = {
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	.init = nv50_mc_init,
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	.intr = gf100_mc_intr,
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	.intr_unarm = gf100_mc_intr_unarm,
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	.intr_rearm = gf100_mc_intr_rearm,
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	.intr_mask = gf100_mc_intr_mask,
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	.intr_stat = gf100_mc_intr_stat,
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	.reset = gf100_mc_reset,
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	.unk260 = gf100_mc_unk260,
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};
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int
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gf100_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
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{
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	return nvkm_mc_new_(&gf100_mc, device, type, inst, pmc);
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}
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