298 lines
		
	
	
		
			8.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			298 lines
		
	
	
		
			8.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-or-later */
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| /*
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|  * ImgTec IR Hardware Decoder found in PowerDown Controller.
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|  *
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|  * Copyright 2010-2014 Imagination Technologies Ltd.
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|  */
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| 
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| #ifndef _IMG_IR_HW_H_
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| #define _IMG_IR_HW_H_
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| 
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| #include <linux/kernel.h>
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| #include <media/rc-core.h>
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| 
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| /* constants */
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| 
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| #define IMG_IR_CODETYPE_PULSELEN	0x0	/* Sony */
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| #define IMG_IR_CODETYPE_PULSEDIST	0x1	/* NEC, Toshiba, Micom, Sharp */
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| #define IMG_IR_CODETYPE_BIPHASE		0x2	/* RC-5/6 */
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| #define IMG_IR_CODETYPE_2BITPULSEPOS	0x3	/* RC-MM */
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| 
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| 
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| /* Timing information */
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| 
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| /**
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|  * struct img_ir_control - Decoder control settings
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|  * @decoden:	Primary decoder enable
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|  * @code_type:	Decode type (see IMG_IR_CODETYPE_*)
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|  * @hdrtog:	Detect header toggle symbol after leader symbol
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|  * @ldrdec:	Don't discard leader if maximum width reached
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|  * @decodinpol:	Decoder input polarity (1=active high)
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|  * @bitorien:	Bit orientation (1=MSB first)
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|  * @d1validsel:	Decoder 2 takes over if it detects valid data
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|  * @bitinv:	Bit inversion switch (1=don't invert)
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|  * @decodend2:	Secondary decoder enable (no leader symbol)
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|  * @bitoriend2:	Bit orientation (1=MSB first)
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|  * @bitinvd2:	Secondary decoder bit inversion switch (1=don't invert)
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|  */
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| struct img_ir_control {
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| 	unsigned decoden:1;
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| 	unsigned code_type:2;
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| 	unsigned hdrtog:1;
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| 	unsigned ldrdec:1;
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| 	unsigned decodinpol:1;
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| 	unsigned bitorien:1;
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| 	unsigned d1validsel:1;
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| 	unsigned bitinv:1;
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| 	unsigned decodend2:1;
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| 	unsigned bitoriend2:1;
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| 	unsigned bitinvd2:1;
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| };
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| 
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| /**
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|  * struct img_ir_timing_range - range of timing values
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|  * @min:	Minimum timing value
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|  * @max:	Maximum timing value (if < @min, this will be set to @min during
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|  *		preprocessing step, so it is normally not explicitly initialised
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|  *		and is taken care of by the tolerance)
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|  */
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| struct img_ir_timing_range {
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| 	u16 min;
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| 	u16 max;
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| };
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| 
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| /**
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|  * struct img_ir_symbol_timing - timing data for a symbol
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|  * @pulse:	Timing range for the length of the pulse in this symbol
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|  * @space:	Timing range for the length of the space in this symbol
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|  */
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| struct img_ir_symbol_timing {
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| 	struct img_ir_timing_range pulse;
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| 	struct img_ir_timing_range space;
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| };
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| 
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| /**
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|  * struct img_ir_free_timing - timing data for free time symbol
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|  * @minlen:	Minimum number of bits of data
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|  * @maxlen:	Maximum number of bits of data
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|  * @ft_min:	Minimum free time after message
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|  */
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| struct img_ir_free_timing {
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| 	/* measured in bits */
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| 	u8 minlen;
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| 	u8 maxlen;
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| 	u16 ft_min;
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| };
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| 
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| /**
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|  * struct img_ir_timings - Timing values.
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|  * @ldr:	Leader symbol timing data
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|  * @s00:	Zero symbol timing data for primary decoder
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|  * @s01:	One symbol timing data for primary decoder
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|  * @s10:	Zero symbol timing data for secondary (no leader symbol) decoder
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|  * @s11:	One symbol timing data for secondary (no leader symbol) decoder
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|  * @ft:		Free time symbol timing data
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|  */
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| struct img_ir_timings {
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| 	struct img_ir_symbol_timing ldr, s00, s01, s10, s11;
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| 	struct img_ir_free_timing ft;
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| };
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| 
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| /**
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|  * struct img_ir_filter - Filter IR events.
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|  * @data:	Data to match.
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|  * @mask:	Mask of bits to compare.
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|  * @minlen:	Additional minimum number of bits.
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|  * @maxlen:	Additional maximum number of bits.
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|  */
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| struct img_ir_filter {
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| 	u64 data;
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| 	u64 mask;
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| 	u8 minlen;
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| 	u8 maxlen;
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| };
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| 
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| /**
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|  * struct img_ir_timing_regvals - Calculated timing register values.
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|  * @ldr:	Leader symbol timing register value
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|  * @s00:	Zero symbol timing register value for primary decoder
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|  * @s01:	One symbol timing register value for primary decoder
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|  * @s10:	Zero symbol timing register value for secondary decoder
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|  * @s11:	One symbol timing register value for secondary decoder
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|  * @ft:		Free time symbol timing register value
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|  */
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| struct img_ir_timing_regvals {
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| 	u32 ldr, s00, s01, s10, s11, ft;
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| };
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| 
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| #define IMG_IR_SCANCODE		0	/* new scancode */
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| #define IMG_IR_REPEATCODE	1	/* repeat the previous code */
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| 
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| /**
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|  * struct img_ir_scancode_req - Scancode request data.
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|  * @protocol:	Protocol code of received message (defaults to
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|  *		RC_PROTO_UNKNOWN).
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|  * @scancode:	Scan code of received message (must be written by
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|  *		handler if IMG_IR_SCANCODE is returned).
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|  * @toggle:	Toggle bit (defaults to 0).
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|  */
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| struct img_ir_scancode_req {
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| 	enum rc_proto protocol;
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| 	u32 scancode;
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| 	u8 toggle;
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| };
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| 
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| /**
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|  * struct img_ir_decoder - Decoder settings for an IR protocol.
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|  * @type:	Protocol types bitmap.
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|  * @tolerance:	Timing tolerance as a percentage (default 10%).
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|  * @unit:	Unit of timings in nanoseconds (default 1 us).
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|  * @timings:	Primary timings
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|  * @rtimings:	Additional override timings while waiting for repeats.
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|  * @repeat:	Maximum repeat interval (always in milliseconds).
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|  * @control:	Control flags.
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|  *
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|  * @scancode:	Pointer to function to convert the IR data into a scancode (it
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|  *		must be safe to execute in interrupt context).
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|  *		Returns IMG_IR_SCANCODE to emit new scancode.
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|  *		Returns IMG_IR_REPEATCODE to repeat previous code.
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|  *		Returns -errno (e.g. -EINVAL) on error.
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|  * @filter:	Pointer to function to convert scancode filter to raw hardware
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|  *		filter. The minlen and maxlen fields will have been initialised
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|  *		to the maximum range.
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|  */
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| struct img_ir_decoder {
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| 	/* core description */
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| 	u64				type;
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| 	unsigned int			tolerance;
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| 	unsigned int			unit;
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| 	struct img_ir_timings		timings;
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| 	struct img_ir_timings		rtimings;
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| 	unsigned int			repeat;
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| 	struct img_ir_control		control;
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| 
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| 	/* scancode logic */
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| 	int (*scancode)(int len, u64 raw, u64 enabled_protocols,
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| 			struct img_ir_scancode_req *request);
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| 	int (*filter)(const struct rc_scancode_filter *in,
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| 		      struct img_ir_filter *out, u64 protocols);
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| };
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| 
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| extern struct img_ir_decoder img_ir_nec;
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| extern struct img_ir_decoder img_ir_jvc;
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| extern struct img_ir_decoder img_ir_sony;
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| extern struct img_ir_decoder img_ir_sharp;
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| extern struct img_ir_decoder img_ir_sanyo;
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| extern struct img_ir_decoder img_ir_rc5;
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| extern struct img_ir_decoder img_ir_rc6;
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| 
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| /**
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|  * struct img_ir_reg_timings - Reg values for decoder timings at clock rate.
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|  * @ctrl:	Processed control register value.
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|  * @timings:	Processed primary timings.
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|  * @rtimings:	Processed repeat timings.
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|  */
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| struct img_ir_reg_timings {
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| 	u32				ctrl;
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| 	struct img_ir_timing_regvals	timings;
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| 	struct img_ir_timing_regvals	rtimings;
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| };
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| 
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| struct img_ir_priv;
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| 
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| #ifdef CONFIG_IR_IMG_HW
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| 
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| enum img_ir_mode {
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| 	IMG_IR_M_NORMAL,
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| 	IMG_IR_M_REPEATING,
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| #ifdef CONFIG_PM_SLEEP
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| 	IMG_IR_M_WAKE,
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| #endif
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| };
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| 
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| /**
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|  * struct img_ir_priv_hw - Private driver data for hardware decoder.
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|  * @ct_quirks:		Quirk bits for each code type.
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|  * @rdev:		Remote control device
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|  * @clk_nb:		Notifier block for clock notify events.
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|  * @end_timer:		Timer until repeat timeout.
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|  * @suspend_timer:	Timer to re-enable protocol.
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|  * @decoder:		Current decoder settings.
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|  * @enabled_protocols:	Currently enabled protocols.
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|  * @clk_hz:		Current core clock rate in Hz.
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|  * @reg_timings:	Timing reg values for decoder at clock rate.
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|  * @flags:		IMG_IR_F_*.
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|  * @filters:		HW filters (derived from scancode filters).
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|  * @mode:		Current decode mode.
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|  * @stopping:		Indicates that decoder is being taken down and timers
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|  *			should not be restarted.
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|  * @suspend_irqen:	Saved IRQ enable mask over suspend.
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|  * @quirk_suspend_irq:	Saved IRQ enable mask over quirk suspend timer.
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|  */
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| struct img_ir_priv_hw {
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| 	unsigned int			ct_quirks[4];
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| 	struct rc_dev			*rdev;
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| 	struct notifier_block		clk_nb;
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| 	struct timer_list		end_timer;
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| 	struct timer_list		suspend_timer;
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| 	const struct img_ir_decoder	*decoder;
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| 	u64				enabled_protocols;
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| 	unsigned long			clk_hz;
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| 	struct img_ir_reg_timings	reg_timings;
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| 	unsigned int			flags;
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| 	struct img_ir_filter		filters[RC_FILTER_MAX];
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| 
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| 	enum img_ir_mode		mode;
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| 	bool				stopping;
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| 	u32				suspend_irqen;
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| 	u32				quirk_suspend_irq;
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| };
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| 
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| static inline bool img_ir_hw_enabled(struct img_ir_priv_hw *hw)
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| {
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| 	return hw->rdev;
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| };
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| 
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| void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status);
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| void img_ir_setup_hw(struct img_ir_priv *priv);
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| int img_ir_probe_hw(struct img_ir_priv *priv);
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| void img_ir_remove_hw(struct img_ir_priv *priv);
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| 
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| #ifdef CONFIG_PM_SLEEP
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| int img_ir_suspend(struct device *dev);
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| int img_ir_resume(struct device *dev);
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| #else
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| #define img_ir_suspend NULL
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| #define img_ir_resume NULL
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| #endif
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| 
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| #else
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| 
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| struct img_ir_priv_hw {
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| };
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| 
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| static inline bool img_ir_hw_enabled(struct img_ir_priv_hw *hw)
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| {
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| 	return false;
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| };
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| static inline void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status)
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| {
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| }
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| static inline void img_ir_setup_hw(struct img_ir_priv *priv)
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| {
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| }
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| static inline int img_ir_probe_hw(struct img_ir_priv *priv)
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| {
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| 	return -ENODEV;
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| }
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| static inline void img_ir_remove_hw(struct img_ir_priv *priv)
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| {
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| }
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| 
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| #define img_ir_suspend NULL
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| #define img_ir_resume NULL
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| 
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| #endif /* CONFIG_IR_IMG_HW */
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| 
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| #endif /* _IMG_IR_HW_H_ */
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