531 lines
14 KiB
C
531 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* AArch64 code
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*
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* Copyright (C) 2018, Red Hat, Inc.
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*/
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#include <linux/compiler.h>
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#include <assert.h>
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#include "guest_modes.h"
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#include "kvm_util.h"
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#include "processor.h"
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#define DEFAULT_ARM64_GUEST_STACK_VADDR_MIN 0xac0000
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static vm_vaddr_t exception_handlers;
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static uint64_t page_align(struct kvm_vm *vm, uint64_t v)
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{
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return (v + vm->page_size) & ~(vm->page_size - 1);
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}
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static uint64_t pgd_index(struct kvm_vm *vm, vm_vaddr_t gva)
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{
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unsigned int shift = (vm->pgtable_levels - 1) * (vm->page_shift - 3) + vm->page_shift;
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uint64_t mask = (1UL << (vm->va_bits - shift)) - 1;
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return (gva >> shift) & mask;
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}
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static uint64_t pud_index(struct kvm_vm *vm, vm_vaddr_t gva)
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{
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unsigned int shift = 2 * (vm->page_shift - 3) + vm->page_shift;
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uint64_t mask = (1UL << (vm->page_shift - 3)) - 1;
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TEST_ASSERT(vm->pgtable_levels == 4,
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"Mode %d does not have 4 page table levels", vm->mode);
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return (gva >> shift) & mask;
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}
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static uint64_t pmd_index(struct kvm_vm *vm, vm_vaddr_t gva)
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{
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unsigned int shift = (vm->page_shift - 3) + vm->page_shift;
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uint64_t mask = (1UL << (vm->page_shift - 3)) - 1;
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TEST_ASSERT(vm->pgtable_levels >= 3,
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"Mode %d does not have >= 3 page table levels", vm->mode);
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return (gva >> shift) & mask;
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}
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static uint64_t pte_index(struct kvm_vm *vm, vm_vaddr_t gva)
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{
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uint64_t mask = (1UL << (vm->page_shift - 3)) - 1;
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return (gva >> vm->page_shift) & mask;
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}
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static uint64_t pte_addr(struct kvm_vm *vm, uint64_t entry)
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{
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uint64_t mask = ((1UL << (vm->va_bits - vm->page_shift)) - 1) << vm->page_shift;
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return entry & mask;
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}
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static uint64_t ptrs_per_pgd(struct kvm_vm *vm)
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{
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unsigned int shift = (vm->pgtable_levels - 1) * (vm->page_shift - 3) + vm->page_shift;
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return 1 << (vm->va_bits - shift);
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}
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static uint64_t __maybe_unused ptrs_per_pte(struct kvm_vm *vm)
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{
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return 1 << (vm->page_shift - 3);
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}
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void virt_arch_pgd_alloc(struct kvm_vm *vm)
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{
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if (!vm->pgd_created) {
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vm_paddr_t paddr = vm_phy_pages_alloc(vm,
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page_align(vm, ptrs_per_pgd(vm) * 8) / vm->page_size,
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KVM_GUEST_PAGE_TABLE_MIN_PADDR, 0);
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vm->pgd = paddr;
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vm->pgd_created = true;
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}
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}
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static void _virt_pg_map(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr,
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uint64_t flags)
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{
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uint8_t attr_idx = flags & 7;
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uint64_t *ptep;
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TEST_ASSERT((vaddr % vm->page_size) == 0,
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"Virtual address not on page boundary,\n"
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" vaddr: 0x%lx vm->page_size: 0x%x", vaddr, vm->page_size);
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TEST_ASSERT(sparsebit_is_set(vm->vpages_valid,
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(vaddr >> vm->page_shift)),
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"Invalid virtual address, vaddr: 0x%lx", vaddr);
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TEST_ASSERT((paddr % vm->page_size) == 0,
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"Physical address not on page boundary,\n"
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" paddr: 0x%lx vm->page_size: 0x%x", paddr, vm->page_size);
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TEST_ASSERT((paddr >> vm->page_shift) <= vm->max_gfn,
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"Physical address beyond beyond maximum supported,\n"
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" paddr: 0x%lx vm->max_gfn: 0x%lx vm->page_size: 0x%x",
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paddr, vm->max_gfn, vm->page_size);
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ptep = addr_gpa2hva(vm, vm->pgd) + pgd_index(vm, vaddr) * 8;
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if (!*ptep)
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*ptep = vm_alloc_page_table(vm) | 3;
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switch (vm->pgtable_levels) {
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case 4:
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ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) + pud_index(vm, vaddr) * 8;
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if (!*ptep)
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*ptep = vm_alloc_page_table(vm) | 3;
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/* fall through */
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case 3:
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ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) + pmd_index(vm, vaddr) * 8;
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if (!*ptep)
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*ptep = vm_alloc_page_table(vm) | 3;
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/* fall through */
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case 2:
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ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) + pte_index(vm, vaddr) * 8;
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break;
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default:
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TEST_FAIL("Page table levels must be 2, 3, or 4");
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}
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*ptep = paddr | 3;
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*ptep |= (attr_idx << 2) | (1 << 10) /* Access Flag */;
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}
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void virt_arch_pg_map(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr)
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{
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uint64_t attr_idx = 4; /* NORMAL (See DEFAULT_MAIR_EL1) */
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_virt_pg_map(vm, vaddr, paddr, attr_idx);
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}
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vm_paddr_t addr_arch_gva2gpa(struct kvm_vm *vm, vm_vaddr_t gva)
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{
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uint64_t *ptep;
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if (!vm->pgd_created)
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goto unmapped_gva;
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ptep = addr_gpa2hva(vm, vm->pgd) + pgd_index(vm, gva) * 8;
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if (!ptep)
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goto unmapped_gva;
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switch (vm->pgtable_levels) {
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case 4:
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ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) + pud_index(vm, gva) * 8;
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if (!ptep)
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goto unmapped_gva;
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/* fall through */
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case 3:
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ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) + pmd_index(vm, gva) * 8;
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if (!ptep)
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goto unmapped_gva;
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/* fall through */
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case 2:
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ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) + pte_index(vm, gva) * 8;
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if (!ptep)
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goto unmapped_gva;
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break;
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default:
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TEST_FAIL("Page table levels must be 2, 3, or 4");
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}
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return pte_addr(vm, *ptep) + (gva & (vm->page_size - 1));
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unmapped_gva:
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TEST_FAIL("No mapping for vm virtual address, gva: 0x%lx", gva);
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exit(1);
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}
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static void pte_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent, uint64_t page, int level)
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{
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#ifdef DEBUG
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static const char * const type[] = { "", "pud", "pmd", "pte" };
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uint64_t pte, *ptep;
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if (level == 4)
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return;
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for (pte = page; pte < page + ptrs_per_pte(vm) * 8; pte += 8) {
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ptep = addr_gpa2hva(vm, pte);
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if (!*ptep)
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continue;
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fprintf(stream, "%*s%s: %lx: %lx at %p\n", indent, "", type[level], pte, *ptep, ptep);
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pte_dump(stream, vm, indent + 1, pte_addr(vm, *ptep), level + 1);
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}
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#endif
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}
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void virt_arch_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent)
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{
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int level = 4 - (vm->pgtable_levels - 1);
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uint64_t pgd, *ptep;
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if (!vm->pgd_created)
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return;
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for (pgd = vm->pgd; pgd < vm->pgd + ptrs_per_pgd(vm) * 8; pgd += 8) {
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ptep = addr_gpa2hva(vm, pgd);
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if (!*ptep)
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continue;
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fprintf(stream, "%*spgd: %lx: %lx at %p\n", indent, "", pgd, *ptep, ptep);
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pte_dump(stream, vm, indent + 1, pte_addr(vm, *ptep), level);
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}
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}
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void aarch64_vcpu_setup(struct kvm_vcpu *vcpu, struct kvm_vcpu_init *init)
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{
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struct kvm_vcpu_init default_init = { .target = -1, };
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struct kvm_vm *vm = vcpu->vm;
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uint64_t sctlr_el1, tcr_el1;
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if (!init)
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init = &default_init;
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if (init->target == -1) {
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struct kvm_vcpu_init preferred;
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vm_ioctl(vm, KVM_ARM_PREFERRED_TARGET, &preferred);
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init->target = preferred.target;
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}
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vcpu_ioctl(vcpu, KVM_ARM_VCPU_INIT, init);
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/*
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* Enable FP/ASIMD to avoid trapping when accessing Q0-Q15
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* registers, which the variable argument list macros do.
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*/
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vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_CPACR_EL1), 3 << 20);
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vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_SCTLR_EL1), &sctlr_el1);
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vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TCR_EL1), &tcr_el1);
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/* Configure base granule size */
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switch (vm->mode) {
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case VM_MODE_P52V48_4K:
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TEST_FAIL("AArch64 does not support 4K sized pages "
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"with 52-bit physical address ranges");
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case VM_MODE_PXXV48_4K:
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TEST_FAIL("AArch64 does not support 4K sized pages "
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"with ANY-bit physical address ranges");
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case VM_MODE_P52V48_64K:
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case VM_MODE_P48V48_64K:
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case VM_MODE_P40V48_64K:
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case VM_MODE_P36V48_64K:
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tcr_el1 |= 1ul << 14; /* TG0 = 64KB */
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break;
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case VM_MODE_P48V48_16K:
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case VM_MODE_P40V48_16K:
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case VM_MODE_P36V48_16K:
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case VM_MODE_P36V47_16K:
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tcr_el1 |= 2ul << 14; /* TG0 = 16KB */
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break;
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case VM_MODE_P48V48_4K:
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case VM_MODE_P40V48_4K:
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case VM_MODE_P36V48_4K:
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tcr_el1 |= 0ul << 14; /* TG0 = 4KB */
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break;
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default:
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TEST_FAIL("Unknown guest mode, mode: 0x%x", vm->mode);
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}
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/* Configure output size */
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switch (vm->mode) {
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case VM_MODE_P52V48_64K:
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tcr_el1 |= 6ul << 32; /* IPS = 52 bits */
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break;
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case VM_MODE_P48V48_4K:
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case VM_MODE_P48V48_16K:
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case VM_MODE_P48V48_64K:
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tcr_el1 |= 5ul << 32; /* IPS = 48 bits */
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break;
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case VM_MODE_P40V48_4K:
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case VM_MODE_P40V48_16K:
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case VM_MODE_P40V48_64K:
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tcr_el1 |= 2ul << 32; /* IPS = 40 bits */
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break;
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case VM_MODE_P36V48_4K:
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case VM_MODE_P36V48_16K:
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case VM_MODE_P36V48_64K:
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case VM_MODE_P36V47_16K:
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tcr_el1 |= 1ul << 32; /* IPS = 36 bits */
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break;
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default:
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TEST_FAIL("Unknown guest mode, mode: 0x%x", vm->mode);
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}
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sctlr_el1 |= (1 << 0) | (1 << 2) | (1 << 12) /* M | C | I */;
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/* TCR_EL1 |= IRGN0:WBWA | ORGN0:WBWA | SH0:Inner-Shareable */;
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tcr_el1 |= (1 << 8) | (1 << 10) | (3 << 12);
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tcr_el1 |= (64 - vm->va_bits) /* T0SZ */;
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vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_SCTLR_EL1), sctlr_el1);
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vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TCR_EL1), tcr_el1);
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vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_MAIR_EL1), DEFAULT_MAIR_EL1);
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vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TTBR0_EL1), vm->pgd);
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vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TPIDR_EL1), vcpu->id);
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}
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void vcpu_arch_dump(FILE *stream, struct kvm_vcpu *vcpu, uint8_t indent)
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{
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uint64_t pstate, pc;
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vcpu_get_reg(vcpu, ARM64_CORE_REG(regs.pstate), &pstate);
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vcpu_get_reg(vcpu, ARM64_CORE_REG(regs.pc), &pc);
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fprintf(stream, "%*spstate: 0x%.16lx pc: 0x%.16lx\n",
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indent, "", pstate, pc);
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}
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struct kvm_vcpu *aarch64_vcpu_add(struct kvm_vm *vm, uint32_t vcpu_id,
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struct kvm_vcpu_init *init, void *guest_code)
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{
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size_t stack_size = vm->page_size == 4096 ?
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DEFAULT_STACK_PGS * vm->page_size :
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vm->page_size;
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uint64_t stack_vaddr = vm_vaddr_alloc(vm, stack_size,
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DEFAULT_ARM64_GUEST_STACK_VADDR_MIN);
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struct kvm_vcpu *vcpu = __vm_vcpu_add(vm, vcpu_id);
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aarch64_vcpu_setup(vcpu, init);
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vcpu_set_reg(vcpu, ARM64_CORE_REG(sp_el1), stack_vaddr + stack_size);
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vcpu_set_reg(vcpu, ARM64_CORE_REG(regs.pc), (uint64_t)guest_code);
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return vcpu;
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}
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struct kvm_vcpu *vm_arch_vcpu_add(struct kvm_vm *vm, uint32_t vcpu_id,
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void *guest_code)
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{
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return aarch64_vcpu_add(vm, vcpu_id, NULL, guest_code);
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}
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void vcpu_args_set(struct kvm_vcpu *vcpu, unsigned int num, ...)
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{
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va_list ap;
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int i;
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TEST_ASSERT(num >= 1 && num <= 8, "Unsupported number of args,\n"
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" num: %u\n", num);
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va_start(ap, num);
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for (i = 0; i < num; i++) {
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vcpu_set_reg(vcpu, ARM64_CORE_REG(regs.regs[i]),
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va_arg(ap, uint64_t));
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}
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va_end(ap);
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}
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void kvm_exit_unexpected_exception(int vector, uint64_t ec, bool valid_ec)
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{
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ucall(UCALL_UNHANDLED, 3, vector, ec, valid_ec);
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while (1)
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;
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}
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void assert_on_unhandled_exception(struct kvm_vcpu *vcpu)
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{
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struct ucall uc;
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if (get_ucall(vcpu, &uc) != UCALL_UNHANDLED)
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return;
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if (uc.args[2]) /* valid_ec */ {
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assert(VECTOR_IS_SYNC(uc.args[0]));
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TEST_FAIL("Unexpected exception (vector:0x%lx, ec:0x%lx)",
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uc.args[0], uc.args[1]);
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} else {
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assert(!VECTOR_IS_SYNC(uc.args[0]));
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TEST_FAIL("Unexpected exception (vector:0x%lx)",
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uc.args[0]);
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}
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}
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struct handlers {
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handler_fn exception_handlers[VECTOR_NUM][ESR_EC_NUM];
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};
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void vcpu_init_descriptor_tables(struct kvm_vcpu *vcpu)
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{
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extern char vectors;
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vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_VBAR_EL1), (uint64_t)&vectors);
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}
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void route_exception(struct ex_regs *regs, int vector)
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{
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struct handlers *handlers = (struct handlers *)exception_handlers;
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bool valid_ec;
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int ec = 0;
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switch (vector) {
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case VECTOR_SYNC_CURRENT:
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case VECTOR_SYNC_LOWER_64:
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ec = (read_sysreg(esr_el1) >> ESR_EC_SHIFT) & ESR_EC_MASK;
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valid_ec = true;
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break;
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case VECTOR_IRQ_CURRENT:
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case VECTOR_IRQ_LOWER_64:
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case VECTOR_FIQ_CURRENT:
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case VECTOR_FIQ_LOWER_64:
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case VECTOR_ERROR_CURRENT:
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case VECTOR_ERROR_LOWER_64:
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ec = 0;
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valid_ec = false;
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break;
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default:
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valid_ec = false;
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goto unexpected_exception;
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}
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if (handlers && handlers->exception_handlers[vector][ec])
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return handlers->exception_handlers[vector][ec](regs);
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unexpected_exception:
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kvm_exit_unexpected_exception(vector, ec, valid_ec);
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}
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void vm_init_descriptor_tables(struct kvm_vm *vm)
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{
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vm->handlers = vm_vaddr_alloc(vm, sizeof(struct handlers),
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vm->page_size);
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*(vm_vaddr_t *)addr_gva2hva(vm, (vm_vaddr_t)(&exception_handlers)) = vm->handlers;
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}
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void vm_install_sync_handler(struct kvm_vm *vm, int vector, int ec,
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void (*handler)(struct ex_regs *))
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{
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struct handlers *handlers = addr_gva2hva(vm, vm->handlers);
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assert(VECTOR_IS_SYNC(vector));
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assert(vector < VECTOR_NUM);
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assert(ec < ESR_EC_NUM);
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handlers->exception_handlers[vector][ec] = handler;
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}
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void vm_install_exception_handler(struct kvm_vm *vm, int vector,
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void (*handler)(struct ex_regs *))
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{
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|
struct handlers *handlers = addr_gva2hva(vm, vm->handlers);
|
|
|
|
assert(!VECTOR_IS_SYNC(vector));
|
|
assert(vector < VECTOR_NUM);
|
|
handlers->exception_handlers[vector][0] = handler;
|
|
}
|
|
|
|
uint32_t guest_get_vcpuid(void)
|
|
{
|
|
return read_sysreg(tpidr_el1);
|
|
}
|
|
|
|
void aarch64_get_supported_page_sizes(uint32_t ipa,
|
|
bool *ps4k, bool *ps16k, bool *ps64k)
|
|
{
|
|
struct kvm_vcpu_init preferred_init;
|
|
int kvm_fd, vm_fd, vcpu_fd, err;
|
|
uint64_t val;
|
|
struct kvm_one_reg reg = {
|
|
.id = KVM_ARM64_SYS_REG(SYS_ID_AA64MMFR0_EL1),
|
|
.addr = (uint64_t)&val,
|
|
};
|
|
|
|
kvm_fd = open_kvm_dev_path_or_exit();
|
|
vm_fd = __kvm_ioctl(kvm_fd, KVM_CREATE_VM, (void *)(unsigned long)ipa);
|
|
TEST_ASSERT(vm_fd >= 0, KVM_IOCTL_ERROR(KVM_CREATE_VM, vm_fd));
|
|
|
|
vcpu_fd = ioctl(vm_fd, KVM_CREATE_VCPU, 0);
|
|
TEST_ASSERT(vcpu_fd >= 0, KVM_IOCTL_ERROR(KVM_CREATE_VCPU, vcpu_fd));
|
|
|
|
err = ioctl(vm_fd, KVM_ARM_PREFERRED_TARGET, &preferred_init);
|
|
TEST_ASSERT(err == 0, KVM_IOCTL_ERROR(KVM_ARM_PREFERRED_TARGET, err));
|
|
err = ioctl(vcpu_fd, KVM_ARM_VCPU_INIT, &preferred_init);
|
|
TEST_ASSERT(err == 0, KVM_IOCTL_ERROR(KVM_ARM_VCPU_INIT, err));
|
|
|
|
err = ioctl(vcpu_fd, KVM_GET_ONE_REG, ®);
|
|
TEST_ASSERT(err == 0, KVM_IOCTL_ERROR(KVM_GET_ONE_REG, vcpu_fd));
|
|
|
|
*ps4k = ((val >> 28) & 0xf) != 0xf;
|
|
*ps64k = ((val >> 24) & 0xf) == 0;
|
|
*ps16k = ((val >> 20) & 0xf) != 0;
|
|
|
|
close(vcpu_fd);
|
|
close(vm_fd);
|
|
close(kvm_fd);
|
|
}
|
|
|
|
/*
|
|
* arm64 doesn't have a true default mode, so start by computing the
|
|
* available IPA space and page sizes early.
|
|
*/
|
|
void __attribute__((constructor)) init_guest_modes(void)
|
|
{
|
|
guest_modes_append_default();
|
|
}
|
|
|
|
void smccc_hvc(uint32_t function_id, uint64_t arg0, uint64_t arg1,
|
|
uint64_t arg2, uint64_t arg3, uint64_t arg4, uint64_t arg5,
|
|
uint64_t arg6, struct arm_smccc_res *res)
|
|
{
|
|
asm volatile("mov w0, %w[function_id]\n"
|
|
"mov x1, %[arg0]\n"
|
|
"mov x2, %[arg1]\n"
|
|
"mov x3, %[arg2]\n"
|
|
"mov x4, %[arg3]\n"
|
|
"mov x5, %[arg4]\n"
|
|
"mov x6, %[arg5]\n"
|
|
"mov x7, %[arg6]\n"
|
|
"hvc #0\n"
|
|
"mov %[res0], x0\n"
|
|
"mov %[res1], x1\n"
|
|
"mov %[res2], x2\n"
|
|
"mov %[res3], x3\n"
|
|
: [res0] "=r"(res->a0), [res1] "=r"(res->a1),
|
|
[res2] "=r"(res->a2), [res3] "=r"(res->a3)
|
|
: [function_id] "r"(function_id), [arg0] "r"(arg0),
|
|
[arg1] "r"(arg1), [arg2] "r"(arg2), [arg3] "r"(arg3),
|
|
[arg4] "r"(arg4), [arg5] "r"(arg5), [arg6] "r"(arg6)
|
|
: "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7");
|
|
}
|