629 lines
16 KiB
C
629 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Rockchip TRCM Pcm Driver
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*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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* Author: Sugar Zhang <sugar.zhang@rock-chips.com>
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*
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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#include <linux/slab.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include "rockchip_trcm.h"
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#define DMA_GUARD_BUFFER_SIZE 64
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static unsigned int prealloc_buffer_size_kbytes = 512;
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module_param(prealloc_buffer_size_kbytes, uint, 0444);
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MODULE_PARM_DESC(prealloc_buffer_size_kbytes, "Preallocate DMA buffer size (KB).");
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struct dmaengine_dma_guard {
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dma_addr_t dma_addr;
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unsigned char *dma_area;
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};
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struct dmaengine_trcm {
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struct device *dev;
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struct dma_chan *chan[SNDRV_PCM_STREAM_LAST + 1];
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struct dmaengine_dma_guard guard[SNDRV_PCM_STREAM_LAST + 1];
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struct snd_soc_component component;
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bool always_on;
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};
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struct dmaengine_trcm_runtime_data {
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struct dmaengine_trcm *parent;
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struct dma_chan *dma_chan;
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dma_cookie_t cookie;
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unsigned int frame_bytes;
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unsigned int channels;
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int stream;
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};
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static inline ssize_t trcm_channels_to_bytes(struct dmaengine_trcm_runtime_data *prtd,
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int channels)
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{
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return (prtd->frame_bytes / prtd->channels) * channels;
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}
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static inline ssize_t trcm_frames_to_bytes(struct dmaengine_trcm_runtime_data *prtd,
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snd_pcm_sframes_t size)
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{
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return size * prtd->frame_bytes;
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}
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static inline snd_pcm_sframes_t trcm_bytes_to_frames(struct dmaengine_trcm_runtime_data *prtd,
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ssize_t size)
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{
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return size / prtd->frame_bytes;
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}
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static inline struct dmaengine_trcm *soc_component_to_trcm(struct snd_soc_component *p)
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{
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return container_of(p, struct dmaengine_trcm, component);
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}
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static inline struct dmaengine_trcm_runtime_data *substream_to_prtd(
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const struct snd_pcm_substream *substream)
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{
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if (!substream->runtime)
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return NULL;
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return substream->runtime->private_data;
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}
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static struct dma_chan *snd_dmaengine_trcm_get_chan(struct snd_pcm_substream *substream)
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{
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struct dmaengine_trcm_runtime_data *prtd = substream_to_prtd(substream);
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return prtd->dma_chan;
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}
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static struct device *dmaengine_dma_dev(struct dmaengine_trcm *trcm,
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struct snd_pcm_substream *substream)
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{
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if (!trcm->chan[substream->stream])
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return NULL;
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return trcm->chan[substream->stream]->device->dev;
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}
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static int dmaengine_trcm_hw_params(struct snd_soc_component *component,
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struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct dmaengine_trcm_runtime_data *prtd = substream_to_prtd(substream);
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struct dma_chan *chan = snd_dmaengine_trcm_get_chan(substream);
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struct dma_slave_config slave_config;
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int ret;
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memset(&slave_config, 0, sizeof(slave_config));
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ret = snd_dmaengine_pcm_prepare_slave_config(substream, params, &slave_config);
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if (ret)
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return ret;
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ret = dmaengine_slave_config(chan, &slave_config);
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if (ret)
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return ret;
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prtd->frame_bytes = snd_pcm_format_size(params_format(params),
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params_channels(params));
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prtd->channels = params_channels(params);
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return 0;
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}
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static int
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dmaengine_pcm_set_runtime_hwparams(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
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struct dmaengine_trcm *trcm = soc_component_to_trcm(component);
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struct device *dma_dev = dmaengine_dma_dev(trcm, substream);
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struct dma_chan *chan = trcm->chan[substream->stream];
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struct snd_dmaengine_dai_dma_data *dma_data;
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struct snd_pcm_hardware hw;
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if (rtd->dai_link->num_cpus > 1) {
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dev_err(rtd->dev,
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"%s doesn't support Multi CPU yet\n", __func__);
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return -EINVAL;
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}
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dma_data = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
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memset(&hw, 0, sizeof(hw));
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hw.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_INTERLEAVED;
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hw.periods_min = 2;
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hw.periods_max = UINT_MAX;
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hw.period_bytes_min = 256;
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hw.period_bytes_max = dma_get_max_seg_size(dma_dev);
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hw.buffer_bytes_max = SIZE_MAX;
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hw.fifo_size = dma_data->fifo_size;
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snd_dmaengine_pcm_refine_runtime_hwparams(substream,
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dma_data,
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&hw,
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chan);
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return snd_soc_set_runtime_hwparams(substream, &hw);
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}
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static int dmaengine_trcm_open(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct dmaengine_trcm *trcm = soc_component_to_trcm(component);
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struct dma_chan *chan = trcm->chan[substream->stream];
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struct dmaengine_trcm_runtime_data *prtd;
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int ret;
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if (!chan)
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return -ENXIO;
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ret = dmaengine_pcm_set_runtime_hwparams(component, substream);
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if (ret)
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return ret;
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ret = snd_pcm_hw_constraint_integer(substream->runtime,
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SNDRV_PCM_HW_PARAM_PERIODS);
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if (ret < 0)
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return ret;
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prtd = kzalloc(sizeof(*prtd), GFP_KERNEL);
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if (!prtd)
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return -ENOMEM;
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prtd->parent = trcm;
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prtd->stream = substream->stream;
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prtd->dma_chan = chan;
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substream->runtime->private_data = prtd;
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return 0;
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}
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static int dmaengine_trcm_close(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct dmaengine_trcm_runtime_data *prtd = substream_to_prtd(substream);
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dmaengine_synchronize(prtd->dma_chan);
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kfree(prtd);
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return 0;
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}
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static snd_pcm_uframes_t dmaengine_trcm_pointer(
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struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct dmaengine_trcm_runtime_data *prtd = substream_to_prtd(substream);
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struct dma_tx_state state;
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unsigned int buf_size;
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unsigned int pos = 0;
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dmaengine_tx_status(prtd->dma_chan, prtd->cookie, &state);
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buf_size = snd_pcm_lib_buffer_bytes(substream);
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if (state.residue > 0 && state.residue <= buf_size)
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pos = buf_size - state.residue;
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return trcm_bytes_to_frames(prtd, pos);
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}
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static void dmaengine_trcm_dma_complete(void *arg)
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{
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struct snd_pcm_substream *substream = arg;
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if (!substream->runtime)
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return;
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snd_pcm_period_elapsed(substream);
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}
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static int dmaengine_trcm_prepare_and_submit(struct snd_pcm_substream *substream)
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{
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struct dmaengine_trcm_runtime_data *prtd = substream_to_prtd(substream);
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struct dma_chan *chan = prtd->dma_chan;
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struct dma_async_tx_descriptor *desc;
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enum dma_transfer_direction direction;
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unsigned long flags = DMA_CTRL_ACK;
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direction = snd_pcm_substream_to_dma_direction(substream);
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if (!substream->runtime->no_period_wakeup)
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flags |= DMA_PREP_INTERRUPT;
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desc = dmaengine_prep_dma_cyclic(chan,
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substream->runtime->dma_addr,
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snd_pcm_lib_buffer_bytes(substream),
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snd_pcm_lib_period_bytes(substream), direction, flags);
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if (!desc)
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return -ENOMEM;
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desc->callback = dmaengine_trcm_dma_complete;
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desc->callback_param = substream;
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prtd->cookie = dmaengine_submit(desc);
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return 0;
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}
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int dmaengine_trcm_dma_guard_ctrl(struct snd_soc_component *component,
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int stream, bool en)
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{
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struct dmaengine_trcm *trcm = soc_component_to_trcm(component);
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struct dmaengine_dma_guard *guard = &trcm->guard[stream];
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struct dma_chan *chan = trcm->chan[stream];
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struct dma_async_tx_descriptor *desc;
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enum dma_transfer_direction direction;
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if (!chan)
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return 0;
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if (!en)
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return dmaengine_terminate_async(chan);
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direction = stream ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV;
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desc = dmaengine_prep_dma_cyclic(chan, guard->dma_addr,
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DMA_GUARD_BUFFER_SIZE,
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DMA_GUARD_BUFFER_SIZE,
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direction,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!desc) {
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dev_err(component->dev, "Failed to get dma desc\n");
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return -ENOMEM;
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}
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desc->callback = NULL;
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desc->callback_param = NULL;
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dmaengine_submit(desc);
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dma_async_issue_pending(chan);
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return 0;
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}
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EXPORT_SYMBOL_GPL(dmaengine_trcm_dma_guard_ctrl);
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static int dmaengine_trcm_trigger(struct snd_soc_component *component,
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struct snd_pcm_substream *substream, int cmd)
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{
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struct dmaengine_trcm_runtime_data *prtd = substream_to_prtd(substream);
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struct snd_pcm_runtime *runtime = substream->runtime;
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int ret;
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#ifdef TRCM_DEBUG
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ktime_t start_time, stop_time, diff_time;
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start_time = ktime_get();
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#endif
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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dmaengine_terminate_async(prtd->dma_chan);
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ret = dmaengine_trcm_prepare_and_submit(substream);
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if (ret)
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return ret;
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dma_async_issue_pending(prtd->dma_chan);
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break;
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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dmaengine_resume(prtd->dma_chan);
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break;
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case SNDRV_PCM_TRIGGER_SUSPEND:
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if (runtime->info & SNDRV_PCM_INFO_PAUSE)
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dmaengine_pause(prtd->dma_chan);
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else
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dmaengine_terminate_async(prtd->dma_chan);
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break;
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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dmaengine_pause(prtd->dma_chan);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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dmaengine_terminate_async(prtd->dma_chan);
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dmaengine_trcm_dma_guard_ctrl(component, substream->stream, 1);
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break;
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default:
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return -EINVAL;
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}
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#ifdef TRCM_DEBUG
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stop_time = ktime_get();
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diff_time = ktime_sub(stop_time, start_time);
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dev_dbg(component->dev, "cmd: %d time cost %lld\n",
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cmd, ktime_to_us(diff_time));
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#endif
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return 0;
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}
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static int dmaengine_trcm_dma_guard_new(struct snd_soc_component *component,
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struct snd_soc_pcm_runtime *rtd)
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{
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struct dmaengine_trcm *trcm = soc_component_to_trcm(component);
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struct snd_dmaengine_dai_dma_data *dma_data;
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struct snd_pcm_substream *substream;
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struct snd_soc_dai *dai;
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struct dma_chan *chan;
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struct dma_slave_config slave_config;
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struct device *dev;
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dma_addr_t dma_addr;
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unsigned char *dma_area;
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unsigned int i;
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int ret;
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for_each_pcm_streams(i) {
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substream = rtd->pcm->streams[i].substream;
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if (!substream)
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continue;
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dev = dmaengine_dma_dev(trcm, substream);
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chan = trcm->chan[i];
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dma_area = dma_alloc_coherent(dev, DMA_GUARD_BUFFER_SIZE,
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&dma_addr, GFP_KERNEL);
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if (!dma_area)
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return -ENOMEM;
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memset(dma_area, 0x0, DMA_GUARD_BUFFER_SIZE);
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trcm->guard[i].dma_addr = dma_addr;
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trcm->guard[i].dma_area = dma_area;
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memset(&slave_config, 0, sizeof(slave_config));
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dma_data = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0),
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substream);
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snd_dmaengine_pcm_set_config_from_dai_data(substream, dma_data,
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&slave_config);
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/*
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* Use the max-16w to cover all 2^n cases, maybe better
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* per channels and fmt, at the moment, we use the simple
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* way.
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*/
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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slave_config.direction = DMA_MEM_TO_DEV;
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slave_config.dst_maxburst = 16;
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} else {
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slave_config.direction = DMA_DEV_TO_MEM;
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slave_config.src_maxburst = 16;
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}
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ret = dmaengine_slave_config(chan, &slave_config);
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if (ret)
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return ret;
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}
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if (trcm->always_on) {
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/* Start the first one will auto trigger bstream guard. */
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for_each_pcm_streams(i) {
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substream = rtd->pcm->streams[i].substream;
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if (!substream)
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continue;
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dai = asoc_rtd_to_cpu(rtd, 0);
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if (!dai)
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continue;
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dmaengine_trcm_dma_guard_ctrl(component, substream->stream, 1);
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ret = dai->driver->ops->trigger(substream,
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SNDRV_PCM_TRIGGER_START,
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dai);
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if (ret)
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return ret;
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}
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}
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return 0;
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}
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static int dmaengine_trcm_new(struct snd_soc_component *component,
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struct snd_soc_pcm_runtime *rtd)
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{
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struct dmaengine_trcm *trcm = soc_component_to_trcm(component);
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struct snd_pcm_substream *substream;
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size_t prealloc_buffer_size;
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size_t max_buffer_size;
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unsigned int i;
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int ret;
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prealloc_buffer_size = prealloc_buffer_size_kbytes * 1024;
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max_buffer_size = SIZE_MAX;
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ret = dmaengine_trcm_dma_guard_new(component, rtd);
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if (ret)
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return ret;
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for_each_pcm_streams(i) {
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substream = rtd->pcm->streams[i].substream;
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if (!substream)
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continue;
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if (!trcm->chan[i]) {
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dev_err(component->dev,
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"Missing dma channel for stream: %d\n", i);
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return -EINVAL;
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}
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snd_pcm_set_managed_buffer(substream,
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SNDRV_DMA_TYPE_DEV_IRAM,
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dmaengine_dma_dev(trcm, substream),
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prealloc_buffer_size,
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max_buffer_size);
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if (rtd->pcm->streams[i].pcm->name[0] == '\0') {
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strscpy_pad(rtd->pcm->streams[i].pcm->name,
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rtd->pcm->streams[i].pcm->id,
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sizeof(rtd->pcm->streams[i].pcm->name));
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}
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}
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return 0;
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}
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static const struct snd_soc_component_driver dmaengine_trcm_component = {
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.name = SND_DMAENGINE_TRCM_DRV_NAME,
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.probe_order = SND_SOC_COMP_ORDER_LATE,
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.open = dmaengine_trcm_open,
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.close = dmaengine_trcm_close,
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.hw_params = dmaengine_trcm_hw_params,
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.trigger = dmaengine_trcm_trigger,
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.pointer = dmaengine_trcm_pointer,
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.pcm_construct = dmaengine_trcm_new,
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};
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static const char * const dmaengine_pcm_dma_channel_names[] = {
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[SNDRV_PCM_STREAM_PLAYBACK] = "tx",
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[SNDRV_PCM_STREAM_CAPTURE] = "rx",
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};
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static int dmaengine_pcm_request_chan_of(struct dmaengine_trcm *trcm,
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struct device *dev, const struct snd_dmaengine_pcm_config *config)
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{
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unsigned int i;
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const char *name;
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struct dma_chan *chan;
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for_each_pcm_streams(i) {
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name = dmaengine_pcm_dma_channel_names[i];
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chan = dma_request_chan(dev, name);
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if (IS_ERR(chan)) {
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/*
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* Only report probe deferral errors, channels
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* might not be present for devices that
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* support only TX or only RX.
|
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*/
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if (PTR_ERR(chan) == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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|
trcm->chan[i] = NULL;
|
|
} else {
|
|
trcm->chan[i] = chan;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void dmaengine_pcm_release_chan(struct dmaengine_trcm *trcm)
|
|
{
|
|
unsigned int i;
|
|
|
|
for_each_pcm_streams(i) {
|
|
if (!trcm->chan[i])
|
|
continue;
|
|
dma_release_channel(trcm->chan[i]);
|
|
}
|
|
}
|
|
|
|
/**
|
|
* snd_dmaengine_trcm_register - Register a dmaengine based TRCM device
|
|
* @dev: The parent device for the TRCM device
|
|
*/
|
|
static int snd_dmaengine_trcm_register(struct device *dev)
|
|
{
|
|
const struct snd_soc_component_driver *driver;
|
|
struct dmaengine_trcm *trcm;
|
|
int ret;
|
|
|
|
trcm = kzalloc(sizeof(*trcm), GFP_KERNEL);
|
|
if (!trcm)
|
|
return -ENOMEM;
|
|
|
|
trcm->dev = dev;
|
|
|
|
trcm->always_on = device_property_read_bool(dev, "rockchip,always-on");
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
trcm->component.debugfs_prefix = "dma";
|
|
#endif
|
|
ret = dmaengine_pcm_request_chan_of(trcm, dev, NULL);
|
|
if (ret)
|
|
goto err_free_dma;
|
|
|
|
driver = &dmaengine_trcm_component;
|
|
|
|
ret = snd_soc_component_initialize(&trcm->component, driver, dev);
|
|
if (ret)
|
|
goto err_free_dma;
|
|
|
|
ret = snd_soc_add_component(&trcm->component, NULL, 0);
|
|
if (ret)
|
|
goto err_free_dma;
|
|
|
|
dev_info(dev, "Register PCM for TRCM mode\n");
|
|
|
|
return 0;
|
|
|
|
err_free_dma:
|
|
dmaengine_pcm_release_chan(trcm);
|
|
kfree(trcm);
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* snd_dmaengine_trcm_unregister - Removes a dmaengine based TRCM device
|
|
* @dev: Parent device the TRCM was register with
|
|
*
|
|
* Removes a dmaengine based TRCM device previously registered with
|
|
* snd_dmaengine_trcm_register.
|
|
*/
|
|
static void snd_dmaengine_trcm_unregister(struct device *dev)
|
|
{
|
|
struct snd_soc_component *component;
|
|
struct dmaengine_trcm *trcm;
|
|
|
|
component = snd_soc_lookup_component(dev, SND_DMAENGINE_TRCM_DRV_NAME);
|
|
if (!component)
|
|
return;
|
|
|
|
trcm = soc_component_to_trcm(component);
|
|
|
|
snd_soc_unregister_component_by_driver(dev, component->driver);
|
|
dmaengine_pcm_release_chan(trcm);
|
|
kfree(trcm);
|
|
}
|
|
|
|
static void devm_dmaengine_trcm_release(struct device *dev, void *res)
|
|
{
|
|
snd_dmaengine_trcm_unregister(*(struct device **)res);
|
|
}
|
|
|
|
/**
|
|
* devm_snd_dmaengine_trcm_register - resource managed dmaengine TRCM registration
|
|
* @dev: The parent device for the TRCM device
|
|
*
|
|
* Register a dmaengine based TRCM device with automatic unregistration when the
|
|
* device is unregistered.
|
|
*/
|
|
int devm_snd_dmaengine_trcm_register(struct device *dev)
|
|
{
|
|
struct device **ptr;
|
|
int ret;
|
|
|
|
ptr = devres_alloc(devm_dmaengine_trcm_release, sizeof(*ptr), GFP_KERNEL);
|
|
if (!ptr)
|
|
return -ENOMEM;
|
|
|
|
ret = snd_dmaengine_trcm_register(dev);
|
|
if (ret == 0) {
|
|
*ptr = dev;
|
|
devres_add(dev, ptr);
|
|
} else {
|
|
devres_free(ptr);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(devm_snd_dmaengine_trcm_register);
|
|
|
|
MODULE_LICENSE("GPL");
|