167 lines
2.7 KiB
C
167 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2023 Rockchip Electronics Co., Ltd.
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*
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* Author: Steven Liu <steven.liu@rock-chips.com>
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*/
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#ifndef _PINCTRL_CORE_H_
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#define _PINCTRL_CORE_H_
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#include <dt-bindings/mfd/rockchip-serdes.h>
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#include "hal_def.h"
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#include "hal_os_def.h"
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typedef enum {
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PIN_UNDEF,
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PIN_RKX110,
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PIN_RKX120,
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PIN_ALL,
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PIN_MAX,
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} HAL_PinType;
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struct hwpin;
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struct xferpin {
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HAL_PinType type;
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char *name; /* slave addr is expected */
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void *client;
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uint32_t bank;
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uint32_t mpins;
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uint32_t param;
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HAL_RegRead_t *read;
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HAL_RegWrite_t *write;
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};
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struct hwpin {
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char name[32];
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HAL_PinType type;
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uint32_t grf_base;
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uint32_t bank;
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uint32_t mpins;
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uint32_t param;
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struct xferpin xfer;
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};
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typedef enum {
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GPIO0_A0 = 0,
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GPIO0_A1,
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GPIO0_A2,
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GPIO0_A3,
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GPIO0_A4,
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GPIO0_A5,
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GPIO0_A6,
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GPIO0_A7,
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GPIO0_B0 = 8,
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GPIO0_B1,
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GPIO0_B2,
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GPIO0_B3,
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GPIO0_B4,
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GPIO0_B5,
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GPIO0_B6,
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GPIO0_B7,
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GPIO0_C0 = 16,
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GPIO0_C1,
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GPIO0_C2,
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GPIO0_C3,
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GPIO0_C4,
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GPIO0_C5,
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GPIO0_C6,
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GPIO0_C7,
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GPIO0_D0 = 24,
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GPIO0_D1,
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GPIO0_D2,
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GPIO0_D3,
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GPIO0_D4,
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GPIO0_D5,
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GPIO0_D6,
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GPIO0_D7,
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GPIO1_A0 = 32,
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GPIO1_A1,
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GPIO1_A2,
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GPIO1_A3,
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GPIO1_A4,
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GPIO1_A5,
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GPIO1_A6,
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GPIO1_A7,
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GPIO1_B0 = 40,
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GPIO1_B1,
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GPIO1_B2,
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GPIO1_B3,
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GPIO1_B4,
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GPIO1_B5,
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GPIO1_B6,
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GPIO1_B7,
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GPIO1_C0 = 48,
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GPIO1_C1,
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GPIO1_C2,
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GPIO1_C3,
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GPIO1_C4,
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GPIO1_C5,
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GPIO1_C6,
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GPIO1_C7,
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GPIO1_D0 = 56,
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GPIO1_D1,
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GPIO1_D2,
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GPIO1_D3,
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GPIO1_D4,
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GPIO1_D5,
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GPIO1_D6,
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GPIO1_D7,
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GPIO_NUM_MAX
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} ePINCTRL_PIN;
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typedef enum {
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PINCTRL_IOMUX_FUNC0,
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PINCTRL_IOMUX_FUNC1,
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PINCTRL_IOMUX_FUNC2,
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PINCTRL_IOMUX_FUNC3,
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PINCTRL_IOMUX_FUNC4,
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PINCTRL_IOMUX_FUNC5,
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PINCTRL_IOMUX_FUNC6,
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PINCTRL_IOMUX_FUNC7,
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} ePINCTRL_iomuxFunc;
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typedef enum {
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PINCTRL_PULL_NORMAL,
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PINCTRL_PULL_UP,
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PINCTRL_PULL_DOWN,
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PINCTRL_PULL_KEEP
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} ePINCTRL_pullMode;
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/*
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* Special pull configuration.
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* Only enable and disable.
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* The specific pull-up or pull-down can not be configured.
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*/
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typedef enum {
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PINCTRL_PULL_DIS,
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PINCTRL_PULL_EN
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} ePINCTRL_pullEnable;
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typedef enum {
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PINCTRL_DRIVE_LEVEL0,
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PINCTRL_DRIVE_LEVEL1,
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PINCTRL_DRIVE_LEVEL2,
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PINCTRL_DRIVE_LEVEL3,
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PINCTRL_DRIVE_LEVEL4,
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PINCTRL_DRIVE_LEVEL5,
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PINCTRL_DRIVE_LEVEL6,
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PINCTRL_DRIVE_LEVEL7
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} ePINCTRL_driveLevel;
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typedef enum {
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PINCTRL_SCHMITT_DIS,
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PINCTRL_SCHMITT_EN
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} ePINCTRL_schmitt;
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uint32_t HAL_PINCTRL_Read(struct hwpin *hw, uint32_t reg);
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uint32_t HAL_PINCTRL_Write(struct hwpin *hw, uint32_t reg, uint32_t val);
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HAL_Status HAL_PINCTRL_Init(void);
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HAL_Status HAL_PINCTRL_SetParam(struct hwpin *hw, uint32_t mPins, uint32_t param);
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HAL_Status HAL_PINCTRL_SetIOMUX(struct hwpin *hw, uint32_t mPins, uint32_t param);
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#endif /* _PINCTRL_CORE_H_ */
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