1250 lines
30 KiB
C
1250 lines
30 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* ov2735 driver
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*
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* Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
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*
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* V0.0X01.0X01 add poweron function.
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* V0.0X01.0X02 fix mclk issue when probe multiple camera.
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* V0.0X01.0X03 add enum_frame_interval function.
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* V0.0X01.0X04 add quick stream on/off
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* V0.0X01.0X05 add function g_mbus_config
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/pm_runtime.h>
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#include <linux/regulator/consumer.h>
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#include <linux/sysfs.h>
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#include <linux/slab.h>
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#include <linux/version.h>
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#include <linux/rk-camera-module.h>
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#include <media/media-entity.h>
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#include <media/v4l2-async.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-subdev.h>
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#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x05)
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#ifndef V4L2_CID_DIGITAL_GAIN
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#define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
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#endif
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/* 45Mhz * 4 Binning */
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#define OV2735_XVCLK_FREQ 24000000
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#define REG_NULL 0xFFFF
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#define PAGE_SELECT_REG 0xfd
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#define PAGE_ZERO 0x00
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#define PAGE_ONE 0x01
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#define PAGE_TWO 0x02
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#define PAGE_OTP 0x04
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//PAGE0
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#define OV2735_PIDH_ADDR 0x02
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#define OV2735_PIDL_ADDR 0x03
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#define OV2735_PIDH_MAGIC 0x27
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#define OV2735_PIDL_MAGIC 0x35
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//PAGE1
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#define STREAM_CTRL_REG 0xa0
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#define STREAM_ON 0x01
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#define STREAM_OFF 0x00
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#define UPDOWN_MIRROR_REG 0x3f
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#define H_V_NORMAL 0x00
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#define H_MIRROR 0x01
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#define V_FLIP 0x02
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#define MIRROR_AND_FLIP 0x03
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#define OV2735_VTS_HIGH_REG 0x0e
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#define OV2735_VTS_LOW_REG 0x0f
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#define OV2735_COARSE_INTG_TIME_MIN 1
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#define OV2735_COARSE_INTG_TIME_MAX 4
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#define OV2735_VTS_ENABLE_REG 0x0d
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#define OV2735_VTS_ENABLE_VALUE 0x10
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#define OV2735_FRAME_SYNC_REG 0x01
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#define OV2735_FRAME_SYNC_VALUE 0x01
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#define OV2735_REG_TEST_PATTERN 0xb2
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#define OV2735_HTS_HIGH_REG 0x09
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#define OV2735_HTS_LOW_REG 0x0a
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#define OV2735_TEST_PATTERN_ENABLE BIT(0)
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#define OV2735_TEST_PATTERN_DISABLE 0xfe
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#define OV2735_FINE_INTG_TIME_MIN 0
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#define OV2735_FINE_INTG_TIME_MAX_MARGIN 0
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#define OV2735_COARSE_INTG_TIME_MIN 1
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#define OV2735_COARSE_INTG_TIME_MAX_MARGIN 4
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#define OV2735_AEC_PK_LONG_EXPO_2ND_REG 0x03 /* Exposure Bits 8-15 */
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#define OV2735_AEC_PK_LONG_EXPO_1ST_REG 0x04 /* Exposure Bits 0-7 */
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#define OV2735_FETCH_2ND_BYTE_EXP(VAL) ((VAL >> 8) & 0xFF)
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#define OV2735_FETCH_1ST_BYTE_EXP(VAL) (VAL & 0xFF)
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#define OV2735_AEC_PK_GAIN_REG 0x24 /* GAIN Bits 0 -7 */
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#define OV2735_FETCH_LSB_GAIN(VAL) (VAL & 0x00FF)
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#define OV2735_FETCH_MSB_GAIN(VAL) ((VAL >> 8) & 0x01)
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#define OV2735_EXPOSURE_MIN 4
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#define OV2735_EXPOSURE_STEP 1
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#define OV2735_VTS_MAX 0xfff
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#define ANALOG_GAIN_MIN 0x10
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#define ANALOG_GAIN_MAX 0xff
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#define ANALOG_GAIN_STEP 1
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#define ANALOG_GAIN_DEFAULT 0x10
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#define OV2735_NAME "ov2735"
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#define OV2735_LANES 2
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static const char * const ov2735_supply_names[] = {
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"avdd", /* Analog power */
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"dovdd", /* Digital I/O power */
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"dvdd", /* Digital core power */
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};
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#define OV2735_NUM_SUPPLIES ARRAY_SIZE(ov2735_supply_names)
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struct regval {
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u16 addr;
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u8 val;
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};
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struct ov2735_mode {
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u32 width;
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u32 height;
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struct v4l2_fract max_fps;
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u32 hts_def;
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u32 vts_def;
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u32 exp_def;
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const struct regval *reg_list;
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};
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struct ov2735 {
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struct i2c_client *client;
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struct clk *xvclk;
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struct gpio_desc *reset_gpio;
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struct gpio_desc *pwdn_gpio;
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struct regulator_bulk_data supplies[OV2735_NUM_SUPPLIES];
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struct v4l2_subdev subdev;
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struct media_pad pad;
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struct v4l2_ctrl_handler ctrl_handler;
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struct v4l2_ctrl *exposure;
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struct v4l2_ctrl *anal_gain;
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struct v4l2_ctrl *digi_gain;
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struct v4l2_ctrl *hblank;
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struct v4l2_ctrl *vblank;
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struct v4l2_ctrl *test_pattern;
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struct mutex mutex;
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bool streaming;
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bool power_on;
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const struct ov2735_mode *cur_mode;
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u32 module_index;
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const char *module_facing;
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const char *module_name;
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const char *len_name;
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};
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#define to_ov2735(sd) container_of(sd, struct ov2735, subdev)
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static const struct regval ov2735_global_regs[] = {
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{0xfd, 0x00},
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{0x20, 0x01}, // soft reset modify to 0x01
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{0x0, 0x3}, // delay 3ms // delay 3ms
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{REG_NULL, 0x00},
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};
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/*
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* Base sensor configs
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* ov2735_init_tab_1920_1080_30fps
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* MCLK:24MHz 1920x1080 30fps mipi 2lane 420Mbps/lane
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*/
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static struct regval ov2735_1920_1080_30fps[] = {
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{0xfd, 0x00},
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{0x2f, 0x10}, // clk and pll setting
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{0x34, 0x00},
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{0x30, 0x15},
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{0x33, 0x01},
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{0x35, 0x20},
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{0xfd, 0x01},
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{0x0d, 0x00}, // disable modify VTS
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{0x30, 0x00},
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{0x03, 0x01}, // exposure time, MSB default 0x01
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{0x04, 0x8f}, // exposure time, LSB default 0x8f
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{0x01, 0x01}, // enable of frame sync signal
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{0x09, 0x00}, // HBLANK
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{0x0a, 0x20},
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{0x06, 0x0a}, // VBLANK 8LSB
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{0x24, 0x10}, // gain default 0x10, by yjz
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{0x01, 0x01},
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{0xfb, 0x73}, // ABL
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{0x01, 0x01},
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{0xfd, 0x01},
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{0x1a, 0x6b}, // Timing ctrl
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{0x1c, 0xea},
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{0x16, 0x0c},
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{0x21, 0x00},
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{0x11, 0x63},
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{0x19, 0xc3},
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{0x26, 0x5a}, // ANALOG CTRL
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{0x29, 0x01},
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{0x33, 0x6f},
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{0x2a, 0xd2},
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{0x2c, 0x40},
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{0xd0, 0x02},
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{0xd1, 0x01},
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{0xd2, 0x20},
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{0xd3, 0x04},
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{0xd4, 0x2a},
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{0x50, 0x00}, // Timing ctrl
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{0x51, 0x2c},
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{0x52, 0x29},
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{0x53, 0x00},
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{0x55, 0x44},
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{0x58, 0x29},
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{0x5a, 0x00},
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{0x5b, 0x00},
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{0x5d, 0x00},
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{0x64, 0x2f},
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{0x66, 0x62},
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{0x68, 0x5b},
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{0x75, 0x46},
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{0x76, 0x36},
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{0x77, 0x4f},
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{0x78, 0xef},
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{0x72, 0xcf},
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{0x73, 0x36},
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{0x7d, 0x0d},
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{0x7e, 0x0d},
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{0x8a, 0x77},
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{0x8b, 0x77},
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{0xfd, 0x01},
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{0xb1, 0x83}, // MIPI register ---
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{0xb3, 0x0b},
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{0xb4, 0x14},
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{0x9d, 0x40},
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{0xa1, 0x05},
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{0x94, 0x44},
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{0x95, 0x33},
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{0x96, 0x1f},
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{0x98, 0x45},
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{0x9c, 0x10},
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{0xb5, 0x70},
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{0x25, 0xe0},
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{0x20, 0x7b},
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{0x8f, 0x88}, // H_SIZE_MIPI_8LSB
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{0x91, 0x40}, // V_SIZE_MIPI_8LSB
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{0xfd, 0x01},
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{0xfd, 0x02},
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{0xa1, 0x04},
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{0xa3, 0x40},
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{0xa5, 0x02},
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{0xa7, 0xc4},
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{0xfd, 0x01},
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{0x86, 0x77}, // BLC
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{0x89, 0x77},
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{0x87, 0x74},
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{0x88, 0x74},
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{0xfc, 0xe0},
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{0xfe, 0xe0},
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{0xf0, 0x40},
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{0xf1, 0x40},
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{0xf2, 0x40},
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{0xf3, 0x40},
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//1920x1080
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{0xfd, 0x02},
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{0xa0, 0x00}, // Image vertical start MSB3bits
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{0xa1, 0x08}, // Image vertical start LSB8bits
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{0xa2, 0x04}, // image vertical size MSB8bits
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{0xa3, 0x38}, // image vertical size LSB8bits
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{0xa4, 0x00},
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{0xa5, 0x08}, // H start 8Lsb
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{0xa6, 0x03},
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{0xa7, 0xc0}, // Half H size Lsb8bits
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{0xfd, 0x01},
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{0x8e, 0x07},
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{0x8f, 0x80}, // MIPI column number
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{0x90, 0x04}, // MIPI row number
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{0x91, 0x38},
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//TV1080_30fps
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{0xfd, 0x01},
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{0x0d, 0x10}, // enable manual modify the VTS
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{0x0e, 0x04},
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{0x0f, 0xc1}, // Vblank, VTS:0x4c1, 30.037fps
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{0x01, 0x01}, // enable of frame sync signal
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{REG_NULL, 0x00},
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};
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#define HTS_DEF 0x020
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#define VTS_DEF 0x4c1
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#define MAX_FPS 30
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static const struct ov2735_mode supported_modes[] = {
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{
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.width = 1920,
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.height = 1080,
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.max_fps = {
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.numerator = 10000,
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.denominator = 300000,
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},
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.exp_def = 0x18f,
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.hts_def = HTS_DEF,
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.vts_def = VTS_DEF,
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.reg_list = ov2735_1920_1080_30fps,
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},
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};
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#define OV2735_LINK_FREQ_420MHZ 420000000
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#define OV2735_PIXEL_RATE (MAX_FPS * HTS_DEF * VTS_DEF)
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static const s64 link_freq_menu_items[] = {
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OV2735_LINK_FREQ_420MHZ
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};
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static const char * const ov2735_test_pattern_menu[] = {
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"Disabled",
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"Vertical Color",
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};
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/* Write registers up to 4 at a time */
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static int ov2735_write_reg(struct i2c_client *client, u8 reg, u8 val)
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{
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struct i2c_msg msg;
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u8 buf[2];
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int ret;
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buf[0] = reg & 0xFF;
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buf[1] = val;
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msg.addr = client->addr;
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msg.flags = client->flags;
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msg.buf = buf;
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msg.len = sizeof(buf);
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ret = i2c_transfer(client->adapter, &msg, 1);
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if (ret >= 0)
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return 0;
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dev_err(&client->dev,
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"ov2735 write reg(0x%x val:0x%x) failed !\n", reg, val);
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return ret;
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}
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static int ov2735_write_array(struct i2c_client *client,
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const struct regval *regs)
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{
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int i, ret = 0;
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i = 0;
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while (regs[i].addr != REG_NULL) {
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ret = ov2735_write_reg(client, regs[i].addr, regs[i].val);
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if (ret) {
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dev_err(&client->dev, "%s failed !\n", __func__);
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break;
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}
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i++;
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}
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return ret;
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}
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/* Read registers up to 4 at a time */
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/* sensor register read */
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static int ov2735_read_reg(struct i2c_client *client, u8 reg, u8 *val)
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{
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struct i2c_msg msg[2];
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u8 buf[1];
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int ret;
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buf[0] = reg & 0xFF;
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msg[0].addr = client->addr;
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msg[0].flags = client->flags;
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msg[0].buf = buf;
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msg[0].len = sizeof(buf);
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msg[1].addr = client->addr;
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msg[1].flags = client->flags | I2C_M_RD;
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msg[1].buf = buf;
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msg[1].len = 1;
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ret = i2c_transfer(client->adapter, msg, 2);
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if (ret >= 0) {
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*val = buf[0];
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return 0;
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}
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dev_err(&client->dev,
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"ov2735 read reg:0x%x failed !\n", reg);
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return ret;
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}
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static int ov2735_get_reso_dist(const struct ov2735_mode *mode,
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struct v4l2_mbus_framefmt *framefmt)
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{
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return abs(mode->width - framefmt->width) +
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abs(mode->height - framefmt->height);
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}
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static const struct ov2735_mode *
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ov2735_find_best_fit(struct v4l2_subdev_format *fmt)
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{
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struct v4l2_mbus_framefmt *framefmt = &fmt->format;
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int dist;
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int cur_best_fit = 0;
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int cur_best_fit_dist = -1;
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size_t i;
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for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
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dist = ov2735_get_reso_dist(&supported_modes[i], framefmt);
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if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
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cur_best_fit_dist = dist;
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cur_best_fit = i;
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}
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}
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return &supported_modes[cur_best_fit];
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}
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static int ov2735_set_fmt(struct v4l2_subdev *sd,
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struct v4l2_subdev_state *sd_state,
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struct v4l2_subdev_format *fmt)
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{
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struct ov2735 *ov2735 = to_ov2735(sd);
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const struct ov2735_mode *mode;
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s64 h_blank, vblank_def;
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mutex_lock(&ov2735->mutex);
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mode = ov2735_find_best_fit(fmt);
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fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
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fmt->format.width = mode->width;
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fmt->format.height = mode->height;
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fmt->format.field = V4L2_FIELD_NONE;
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if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
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#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
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*v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
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#else
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mutex_unlock(&ov2735->mutex);
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return -ENOTTY;
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#endif
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} else {
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ov2735->cur_mode = mode;
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h_blank = mode->hts_def - mode->width;
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__v4l2_ctrl_modify_range(ov2735->hblank, h_blank,
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h_blank, 1, h_blank);
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vblank_def = mode->vts_def - mode->height;
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__v4l2_ctrl_modify_range(ov2735->vblank, vblank_def,
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OV2735_VTS_MAX - mode->height,
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1, vblank_def);
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}
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mutex_unlock(&ov2735->mutex);
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return 0;
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}
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static int ov2735_get_fmt(struct v4l2_subdev *sd,
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struct v4l2_subdev_state *sd_state,
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struct v4l2_subdev_format *fmt)
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{
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struct ov2735 *ov2735 = to_ov2735(sd);
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const struct ov2735_mode *mode = ov2735->cur_mode;
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mutex_lock(&ov2735->mutex);
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if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
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#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
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fmt->format = *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
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#else
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mutex_unlock(&ov2735->mutex);
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return -ENOTTY;
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#endif
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} else {
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fmt->format.width = mode->width;
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fmt->format.height = mode->height;
|
|
fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
|
|
fmt->format.field = V4L2_FIELD_NONE;
|
|
}
|
|
mutex_unlock(&ov2735->mutex);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov2735_enum_mbus_code(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_state *sd_state,
|
|
struct v4l2_subdev_mbus_code_enum *code)
|
|
{
|
|
if (code->index != 0)
|
|
return -EINVAL;
|
|
code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov2735_enum_frame_sizes(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_state *sd_state,
|
|
struct v4l2_subdev_frame_size_enum *fse)
|
|
{
|
|
if (fse->index >= ARRAY_SIZE(supported_modes))
|
|
return -EINVAL;
|
|
|
|
if (fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
|
|
return -EINVAL;
|
|
|
|
fse->min_width = supported_modes[fse->index].width;
|
|
fse->max_width = supported_modes[fse->index].width;
|
|
fse->max_height = supported_modes[fse->index].height;
|
|
fse->min_height = supported_modes[fse->index].height;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov2735_enable_test_pattern(struct ov2735 *ov2735, u32 pattern)
|
|
{
|
|
int ret;
|
|
u8 val;
|
|
|
|
ret = ov2735_read_reg(ov2735->client, OV2735_REG_TEST_PATTERN, &val);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
switch (pattern) {
|
|
case 0:
|
|
val &= ~OV2735_TEST_PATTERN_ENABLE;
|
|
break;
|
|
case 1:
|
|
val |= OV2735_TEST_PATTERN_ENABLE;
|
|
break;
|
|
}
|
|
|
|
return ov2735_write_reg(ov2735->client,
|
|
OV2735_REG_TEST_PATTERN,
|
|
val);
|
|
}
|
|
|
|
static void ov2735_get_module_inf(struct ov2735 *ov2735,
|
|
struct rkmodule_inf *inf)
|
|
{
|
|
memset(inf, 0, sizeof(*inf));
|
|
strlcpy(inf->base.sensor, OV2735_NAME, sizeof(inf->base.sensor));
|
|
strlcpy(inf->base.module, ov2735->module_name,
|
|
sizeof(inf->base.module));
|
|
strlcpy(inf->base.lens, ov2735->len_name, sizeof(inf->base.lens));
|
|
}
|
|
|
|
static long ov2735_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
|
|
{
|
|
struct ov2735 *ov2735 = to_ov2735(sd);
|
|
long ret = 0;
|
|
u32 stream = 0;
|
|
|
|
switch (cmd) {
|
|
case RKMODULE_GET_MODULE_INFO:
|
|
ov2735_get_module_inf(ov2735, (struct rkmodule_inf *)arg);
|
|
break;
|
|
case RKMODULE_SET_QUICK_STREAM:
|
|
|
|
stream = *((u32 *)arg);
|
|
|
|
if (stream) {
|
|
ret = ov2735_write_reg(ov2735->client, PAGE_SELECT_REG, PAGE_ONE);
|
|
ret |= ov2735_write_reg(ov2735->client, STREAM_CTRL_REG, STREAM_ON);
|
|
} else {
|
|
ret = ov2735_write_reg(ov2735->client, PAGE_SELECT_REG, PAGE_ONE);
|
|
ret |= ov2735_write_reg(ov2735->client, STREAM_CTRL_REG, STREAM_OFF);
|
|
}
|
|
break;
|
|
default:
|
|
ret = -ENOIOCTLCMD;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
#ifdef CONFIG_COMPAT
|
|
static long ov2735_compat_ioctl32(struct v4l2_subdev *sd,
|
|
unsigned int cmd, unsigned long arg)
|
|
{
|
|
void __user *up = compat_ptr(arg);
|
|
struct rkmodule_inf *inf;
|
|
struct rkmodule_awb_cfg *cfg;
|
|
long ret;
|
|
u32 stream = 0;
|
|
|
|
switch (cmd) {
|
|
case RKMODULE_GET_MODULE_INFO:
|
|
inf = kzalloc(sizeof(*inf), GFP_KERNEL);
|
|
if (!inf) {
|
|
ret = -ENOMEM;
|
|
return ret;
|
|
}
|
|
|
|
ret = ov2735_ioctl(sd, cmd, inf);
|
|
if (!ret)
|
|
ret = copy_to_user(up, inf, sizeof(*inf));
|
|
kfree(inf);
|
|
break;
|
|
case RKMODULE_AWB_CFG:
|
|
cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
|
|
if (!cfg) {
|
|
ret = -ENOMEM;
|
|
return ret;
|
|
}
|
|
|
|
ret = copy_from_user(cfg, up, sizeof(*cfg));
|
|
if (!ret)
|
|
ret = ov2735_ioctl(sd, cmd, cfg);
|
|
kfree(cfg);
|
|
break;
|
|
case RKMODULE_SET_QUICK_STREAM:
|
|
ret = copy_from_user(&stream, up, sizeof(u32));
|
|
if (!ret)
|
|
ret = ov2735_ioctl(sd, cmd, &stream);
|
|
break;
|
|
default:
|
|
ret = -ENOIOCTLCMD;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
#endif
|
|
|
|
static int __ov2735_start_stream(struct ov2735 *ov2735)
|
|
{
|
|
int ret;
|
|
|
|
ret = ov2735_write_array(ov2735->client, ov2735->cur_mode->reg_list);
|
|
if (ret)
|
|
return ret;
|
|
ret = ov2735_write_reg(ov2735->client, PAGE_SELECT_REG, PAGE_ONE);
|
|
if (ret)
|
|
return ret;
|
|
/* In case these controls are set before streaming */
|
|
mutex_unlock(&ov2735->mutex);
|
|
ret = v4l2_ctrl_handler_setup(&ov2735->ctrl_handler);
|
|
mutex_lock(&ov2735->mutex);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret |= ov2735_write_reg(ov2735->client, STREAM_CTRL_REG, STREAM_ON);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int __ov2735_stop_stream(struct ov2735 *ov2735)
|
|
{
|
|
int ret;
|
|
|
|
ret = ov2735_write_reg(ov2735->client, PAGE_SELECT_REG, PAGE_ONE);
|
|
ret |= ov2735_write_reg(ov2735->client, STREAM_CTRL_REG, STREAM_OFF);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ov2735_s_stream(struct v4l2_subdev *sd, int on)
|
|
{
|
|
struct ov2735 *ov2735 = to_ov2735(sd);
|
|
struct i2c_client *client = ov2735->client;
|
|
int ret = 0;
|
|
|
|
mutex_lock(&ov2735->mutex);
|
|
on = !!on;
|
|
if (on == ov2735->streaming)
|
|
goto unlock_and_return;
|
|
|
|
if (on) {
|
|
ret = pm_runtime_get_sync(&client->dev);
|
|
if (ret < 0) {
|
|
pm_runtime_put_noidle(&client->dev);
|
|
goto unlock_and_return;
|
|
}
|
|
|
|
ret = __ov2735_start_stream(ov2735);
|
|
if (ret) {
|
|
v4l2_err(sd, "start stream failed while write regs\n");
|
|
pm_runtime_put(&client->dev);
|
|
goto unlock_and_return;
|
|
}
|
|
} else {
|
|
__ov2735_stop_stream(ov2735);
|
|
pm_runtime_put(&client->dev);
|
|
}
|
|
|
|
ov2735->streaming = on;
|
|
|
|
unlock_and_return:
|
|
mutex_unlock(&ov2735->mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ov2735_s_power(struct v4l2_subdev *sd, int on)
|
|
{
|
|
struct ov2735 *ov2735 = to_ov2735(sd);
|
|
struct i2c_client *client = ov2735->client;
|
|
int ret = 0;
|
|
|
|
mutex_lock(&ov2735->mutex);
|
|
|
|
/* If the power state is not modified - no work to do. */
|
|
if (ov2735->power_on == !!on)
|
|
goto unlock_and_return;
|
|
|
|
if (on) {
|
|
ret = pm_runtime_get_sync(&client->dev);
|
|
if (ret < 0) {
|
|
pm_runtime_put_noidle(&client->dev);
|
|
goto unlock_and_return;
|
|
}
|
|
|
|
ret = ov2735_write_array(ov2735->client, ov2735_global_regs);
|
|
if (ret) {
|
|
v4l2_err(sd, "could not set init registers\n");
|
|
pm_runtime_put_noidle(&client->dev);
|
|
goto unlock_and_return;
|
|
}
|
|
|
|
ov2735->power_on = true;
|
|
} else {
|
|
pm_runtime_put(&client->dev);
|
|
ov2735->power_on = false;
|
|
}
|
|
|
|
unlock_and_return:
|
|
mutex_unlock(&ov2735->mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* Calculate the delay in us by clock rate and clock cycles */
|
|
static inline u32 ov2735_cal_delay(u32 cycles)
|
|
{
|
|
return DIV_ROUND_UP(cycles, OV2735_XVCLK_FREQ / 1000 / 1000);
|
|
}
|
|
|
|
static int __ov2735_power_on(struct ov2735 *ov2735)
|
|
{
|
|
int ret;
|
|
u32 delay_us;
|
|
struct device *dev = &ov2735->client->dev;
|
|
|
|
if (!IS_ERR(ov2735->pwdn_gpio)) {
|
|
gpiod_set_value_cansleep(ov2735->pwdn_gpio, 1);
|
|
usleep_range(2000, 5000);
|
|
}
|
|
|
|
ret = regulator_bulk_enable(OV2735_NUM_SUPPLIES, ov2735->supplies);
|
|
usleep_range(20000, 50000);
|
|
if (ret < 0) {
|
|
dev_err(dev, "Failed to enable regulators\n");
|
|
goto disable_clk;
|
|
}
|
|
|
|
if (!IS_ERR(ov2735->pwdn_gpio)) {
|
|
gpiod_set_value_cansleep(ov2735->pwdn_gpio, 0);
|
|
usleep_range(2000, 5000);
|
|
}
|
|
|
|
if (!IS_ERR(ov2735->reset_gpio)) {
|
|
gpiod_set_value_cansleep(ov2735->reset_gpio, 1);
|
|
usleep_range(2000, 5000);
|
|
}
|
|
ret = clk_set_rate(ov2735->xvclk, OV2735_XVCLK_FREQ);
|
|
if (ret < 0)
|
|
dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
|
|
if (clk_get_rate(ov2735->xvclk) != OV2735_XVCLK_FREQ)
|
|
dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
|
|
ret = clk_prepare_enable(ov2735->xvclk);
|
|
if (ret < 0)
|
|
dev_info(dev, "Failed to enable xvclk\n");
|
|
|
|
/* 8192 cycles prior to first SCCB transaction */
|
|
delay_us = ov2735_cal_delay(8192);
|
|
usleep_range(delay_us, delay_us * 2);
|
|
|
|
return 0;
|
|
|
|
disable_clk:
|
|
clk_disable_unprepare(ov2735->xvclk);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void __ov2735_power_off(struct ov2735 *ov2735)
|
|
{
|
|
if (!IS_ERR(ov2735->pwdn_gpio))
|
|
gpiod_set_value_cansleep(ov2735->pwdn_gpio, 0);
|
|
clk_disable_unprepare(ov2735->xvclk);
|
|
if (!IS_ERR(ov2735->reset_gpio))
|
|
gpiod_set_value_cansleep(ov2735->reset_gpio, 1);
|
|
regulator_bulk_disable(OV2735_NUM_SUPPLIES, ov2735->supplies);
|
|
}
|
|
|
|
static int ov2735_runtime_resume(struct device *dev)
|
|
{
|
|
struct i2c_client *client = to_i2c_client(dev);
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
struct ov2735 *ov2735 = to_ov2735(sd);
|
|
|
|
return __ov2735_power_on(ov2735);
|
|
}
|
|
|
|
static int ov2735_runtime_suspend(struct device *dev)
|
|
{
|
|
struct i2c_client *client = to_i2c_client(dev);
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
struct ov2735 *ov2735 = to_ov2735(sd);
|
|
|
|
__ov2735_power_off(ov2735);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
|
|
static int ov2735_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
|
|
{
|
|
struct ov2735 *ov2735 = to_ov2735(sd);
|
|
struct v4l2_mbus_framefmt *try_fmt =
|
|
v4l2_subdev_get_try_format(sd, fh->state, 0);
|
|
const struct ov2735_mode *def_mode = &supported_modes[0];
|
|
|
|
mutex_lock(&ov2735->mutex);
|
|
/* Initialize try_fmt */
|
|
try_fmt->width = def_mode->width;
|
|
try_fmt->height = def_mode->height;
|
|
try_fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
|
|
try_fmt->field = V4L2_FIELD_NONE;
|
|
|
|
mutex_unlock(&ov2735->mutex);
|
|
/* No crop or compose */
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static int ov2735_enum_frame_interval(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_state *sd_state,
|
|
struct v4l2_subdev_frame_interval_enum *fie)
|
|
{
|
|
if (fie->index >= ARRAY_SIZE(supported_modes))
|
|
return -EINVAL;
|
|
|
|
fie->code = MEDIA_BUS_FMT_SBGGR10_1X10;
|
|
fie->width = supported_modes[fie->index].width;
|
|
fie->height = supported_modes[fie->index].height;
|
|
fie->interval = supported_modes[fie->index].max_fps;
|
|
return 0;
|
|
}
|
|
|
|
static int ov2735_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad,
|
|
struct v4l2_mbus_config *config)
|
|
{
|
|
config->type = V4L2_MBUS_CSI2_DPHY;
|
|
config->bus.mipi_csi2.num_data_lanes = OV2735_LANES;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct dev_pm_ops ov2735_pm_ops = {
|
|
SET_RUNTIME_PM_OPS(ov2735_runtime_suspend,
|
|
ov2735_runtime_resume, NULL)
|
|
};
|
|
|
|
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
|
|
static const struct v4l2_subdev_internal_ops ov2735_internal_ops = {
|
|
.open = ov2735_open,
|
|
};
|
|
#endif
|
|
|
|
static const struct v4l2_subdev_core_ops ov2735_core_ops = {
|
|
.s_power = ov2735_s_power,
|
|
.ioctl = ov2735_ioctl,
|
|
#ifdef CONFIG_COMPAT
|
|
.compat_ioctl32 = ov2735_compat_ioctl32,
|
|
#endif
|
|
};
|
|
|
|
static const struct v4l2_subdev_video_ops ov2735_video_ops = {
|
|
.s_stream = ov2735_s_stream,
|
|
};
|
|
|
|
static const struct v4l2_subdev_pad_ops ov2735_pad_ops = {
|
|
.enum_mbus_code = ov2735_enum_mbus_code,
|
|
.enum_frame_size = ov2735_enum_frame_sizes,
|
|
.enum_frame_interval = ov2735_enum_frame_interval,
|
|
.get_fmt = ov2735_get_fmt,
|
|
.set_fmt = ov2735_set_fmt,
|
|
.get_mbus_config = ov2735_g_mbus_config,
|
|
};
|
|
|
|
static const struct v4l2_subdev_ops ov2735_subdev_ops = {
|
|
.core = &ov2735_core_ops,
|
|
.video = &ov2735_video_ops,
|
|
.pad = &ov2735_pad_ops,
|
|
};
|
|
|
|
static int ov2735_set_ctrl(struct v4l2_ctrl *ctrl)
|
|
{
|
|
struct ov2735 *ov2735 = container_of(ctrl->handler,
|
|
struct ov2735, ctrl_handler);
|
|
struct i2c_client *client = ov2735->client;
|
|
s64 max;
|
|
int ret = 0;
|
|
|
|
/* Propagate change of current control to all related controls */
|
|
switch (ctrl->id) {
|
|
case V4L2_CID_VBLANK:
|
|
/* Update max exposure while meeting expected vblanking */
|
|
max = ov2735->cur_mode->height + ctrl->val - 4;
|
|
__v4l2_ctrl_modify_range(ov2735->exposure,
|
|
ov2735->exposure->minimum, max,
|
|
ov2735->exposure->step,
|
|
ov2735->exposure->default_value);
|
|
break;
|
|
}
|
|
if (!pm_runtime_get_if_in_use(&client->dev))
|
|
return 0;
|
|
|
|
ret = ov2735_write_reg(client, PAGE_SELECT_REG, PAGE_ONE);
|
|
switch (ctrl->id) {
|
|
case V4L2_CID_EXPOSURE:
|
|
ret |= ov2735_write_reg(client,
|
|
OV2735_AEC_PK_LONG_EXPO_2ND_REG,
|
|
OV2735_FETCH_2ND_BYTE_EXP(ctrl->val));
|
|
ret |= ov2735_write_reg(client,
|
|
OV2735_AEC_PK_LONG_EXPO_1ST_REG,
|
|
OV2735_FETCH_1ST_BYTE_EXP(ctrl->val));
|
|
break;
|
|
case V4L2_CID_ANALOGUE_GAIN:
|
|
ret |= ov2735_write_reg(client, OV2735_AEC_PK_GAIN_REG,
|
|
ctrl->val);
|
|
break;
|
|
case V4L2_CID_VBLANK:
|
|
ret |= ov2735_write_reg(client, OV2735_VTS_ENABLE_REG,
|
|
OV2735_VTS_ENABLE_VALUE);
|
|
ret |= ov2735_write_reg(client, OV2735_VTS_LOW_REG,
|
|
(ctrl->val + ov2735->cur_mode->height) & 0xFF);
|
|
ret |= ov2735_write_reg(client, OV2735_VTS_HIGH_REG,
|
|
((ctrl->val + ov2735->cur_mode->height) >> 8) & 0x0F);
|
|
break;
|
|
case V4L2_CID_TEST_PATTERN:
|
|
ret = ov2735_enable_test_pattern(ov2735, ctrl->val);
|
|
|
|
break;
|
|
default:
|
|
dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
|
|
__func__, ctrl->id, ctrl->val);
|
|
break;
|
|
}
|
|
ret |= ov2735_write_reg(client, OV2735_FRAME_SYNC_REG,
|
|
OV2735_FRAME_SYNC_VALUE);
|
|
|
|
pm_runtime_put(&client->dev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct v4l2_ctrl_ops ov2735_ctrl_ops = {
|
|
.s_ctrl = ov2735_set_ctrl,
|
|
};
|
|
|
|
static int ov2735_initialize_controls(struct ov2735 *ov2735)
|
|
{
|
|
const struct ov2735_mode *mode;
|
|
struct v4l2_ctrl_handler *handler;
|
|
struct v4l2_ctrl *ctrl;
|
|
s64 exposure_max, vblank_def;
|
|
u32 h_blank;
|
|
int ret;
|
|
|
|
handler = &ov2735->ctrl_handler;
|
|
mode = ov2735->cur_mode;
|
|
ret = v4l2_ctrl_handler_init(handler, 7);
|
|
if (ret)
|
|
return ret;
|
|
handler->lock = &ov2735->mutex;
|
|
|
|
ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
|
|
0, 0, link_freq_menu_items);
|
|
if (ctrl)
|
|
ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
|
|
|
|
v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
|
|
0, OV2735_PIXEL_RATE, 1, OV2735_PIXEL_RATE);
|
|
|
|
h_blank = mode->hts_def - mode->width;
|
|
ov2735->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
|
|
h_blank, h_blank, 1, h_blank);
|
|
if (ov2735->hblank)
|
|
ov2735->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
|
|
|
|
vblank_def = mode->vts_def - mode->height;
|
|
ov2735->vblank = v4l2_ctrl_new_std(handler, &ov2735_ctrl_ops,
|
|
V4L2_CID_VBLANK, vblank_def,
|
|
OV2735_VTS_MAX - mode->height,
|
|
1, vblank_def);
|
|
|
|
exposure_max = mode->vts_def - 4;
|
|
ov2735->exposure = v4l2_ctrl_new_std(handler, &ov2735_ctrl_ops,
|
|
V4L2_CID_EXPOSURE, OV2735_EXPOSURE_MIN,
|
|
exposure_max, OV2735_EXPOSURE_STEP,
|
|
mode->exp_def);
|
|
|
|
ov2735->anal_gain = v4l2_ctrl_new_std(handler, &ov2735_ctrl_ops,
|
|
V4L2_CID_ANALOGUE_GAIN, ANALOG_GAIN_MIN,
|
|
ANALOG_GAIN_MAX, ANALOG_GAIN_STEP,
|
|
ANALOG_GAIN_DEFAULT);
|
|
|
|
ov2735->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
|
|
&ov2735_ctrl_ops, V4L2_CID_TEST_PATTERN,
|
|
ARRAY_SIZE(ov2735_test_pattern_menu) - 1,
|
|
0, 0, ov2735_test_pattern_menu);
|
|
|
|
if (handler->error) {
|
|
ret = handler->error;
|
|
dev_err(&ov2735->client->dev,
|
|
"Failed to init controls(%d)\n", ret);
|
|
goto err_free_handler;
|
|
}
|
|
|
|
ov2735->subdev.ctrl_handler = handler;
|
|
|
|
return 0;
|
|
|
|
err_free_handler:
|
|
v4l2_ctrl_handler_free(handler);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ov2735_check_sensor_id(struct ov2735 *ov2735,
|
|
struct i2c_client *client)
|
|
{
|
|
struct device *dev = &ov2735->client->dev;
|
|
int ret;
|
|
|
|
u8 pidh = 0x55, pidl = 0xaa;
|
|
|
|
ret = ov2735_write_reg(ov2735->client, PAGE_SELECT_REG, PAGE_ZERO);
|
|
ret |= ov2735_read_reg(ov2735->client, OV2735_PIDH_ADDR, &pidh);
|
|
ret |= ov2735_read_reg(ov2735->client, OV2735_PIDL_ADDR, &pidl);
|
|
if (ret) {
|
|
dev_err(dev,
|
|
"register read failed, camera module powered off?\n");
|
|
goto err;
|
|
}
|
|
|
|
if ((pidh == OV2735_PIDH_MAGIC) && (pidl == OV2735_PIDL_MAGIC)) {
|
|
dev_info(dev,
|
|
"Found cameraID 0x%02x%02x\n", pidh, pidl);
|
|
} else {
|
|
dev_err(dev,
|
|
"wrong camera ID, expected 0x%02x%02x, detected 0x%02x%02x\n",
|
|
OV2735_PIDH_MAGIC, OV2735_PIDL_MAGIC, pidh, pidl);
|
|
ret = -EINVAL;
|
|
goto err;
|
|
}
|
|
|
|
return 0;
|
|
err:
|
|
dev_err(dev, "failed with error (%d)\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
static int ov2735_configure_regulators(struct ov2735 *ov2735)
|
|
{
|
|
size_t i;
|
|
|
|
for (i = 0; i < OV2735_NUM_SUPPLIES; i++)
|
|
ov2735->supplies[i].supply = ov2735_supply_names[i];
|
|
|
|
return devm_regulator_bulk_get(&ov2735->client->dev,
|
|
OV2735_NUM_SUPPLIES,
|
|
ov2735->supplies);
|
|
}
|
|
|
|
static int ov2735_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct device *dev = &client->dev;
|
|
struct device_node *node = dev->of_node;
|
|
struct ov2735 *ov2735;
|
|
struct v4l2_subdev *sd;
|
|
char facing[2];
|
|
int ret;
|
|
|
|
dev_info(dev, "driver version: %02x.%02x.%02x",
|
|
DRIVER_VERSION >> 16,
|
|
(DRIVER_VERSION & 0xff00) >> 8,
|
|
DRIVER_VERSION & 0x00ff);
|
|
|
|
ov2735 = devm_kzalloc(dev, sizeof(*ov2735), GFP_KERNEL);
|
|
if (!ov2735)
|
|
return -ENOMEM;
|
|
|
|
ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
|
|
&ov2735->module_index);
|
|
ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
|
|
&ov2735->module_facing);
|
|
ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
|
|
&ov2735->module_name);
|
|
ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
|
|
&ov2735->len_name);
|
|
if (ret) {
|
|
dev_err(dev, "could not get module information!\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
ov2735->client = client;
|
|
ov2735->cur_mode = &supported_modes[0];
|
|
|
|
ov2735->xvclk = devm_clk_get(dev, "xvclk");
|
|
if (IS_ERR(ov2735->xvclk)) {
|
|
dev_err(dev, "Failed to get xvclk\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
ov2735->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
|
|
if (IS_ERR(ov2735->reset_gpio))
|
|
dev_warn(dev, "Failed to get reset-gpios\n");
|
|
|
|
ov2735->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
|
|
if (IS_ERR(ov2735->pwdn_gpio))
|
|
dev_warn(dev, "Failed to get pwdn-gpios\n");
|
|
|
|
ret = ov2735_configure_regulators(ov2735);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to get power regulators\n");
|
|
return ret;
|
|
}
|
|
|
|
mutex_init(&ov2735->mutex);
|
|
|
|
sd = &ov2735->subdev;
|
|
v4l2_i2c_subdev_init(sd, client, &ov2735_subdev_ops);
|
|
ret = ov2735_initialize_controls(ov2735);
|
|
if (ret)
|
|
goto err_destroy_mutex;
|
|
|
|
ret = __ov2735_power_on(ov2735);
|
|
if (ret)
|
|
goto err_free_handler;
|
|
|
|
ret = ov2735_check_sensor_id(ov2735, client);
|
|
if (ret)
|
|
goto err_power_off;
|
|
|
|
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
|
|
sd->internal_ops = &ov2735_internal_ops;
|
|
sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
|
|
V4L2_SUBDEV_FL_HAS_EVENTS;
|
|
#endif
|
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
|
ov2735->pad.flags = MEDIA_PAD_FL_SOURCE;
|
|
sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
|
|
ret = media_entity_pads_init(&sd->entity, 1, &ov2735->pad);
|
|
if (ret < 0)
|
|
goto err_power_off;
|
|
#endif
|
|
|
|
memset(facing, 0, sizeof(facing));
|
|
if (strcmp(ov2735->module_facing, "back") == 0)
|
|
facing[0] = 'b';
|
|
else
|
|
facing[0] = 'f';
|
|
|
|
snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
|
|
ov2735->module_index, facing,
|
|
OV2735_NAME, dev_name(sd->dev));
|
|
ret = v4l2_async_register_subdev_sensor(sd);
|
|
if (ret) {
|
|
dev_err(dev, "v4l2 async register subdev failed\n");
|
|
goto err_clean_entity;
|
|
}
|
|
|
|
pm_runtime_set_active(dev);
|
|
pm_runtime_enable(dev);
|
|
pm_runtime_idle(dev);
|
|
|
|
return 0;
|
|
|
|
err_clean_entity:
|
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
|
media_entity_cleanup(&sd->entity);
|
|
#endif
|
|
err_power_off:
|
|
__ov2735_power_off(ov2735);
|
|
err_free_handler:
|
|
v4l2_ctrl_handler_free(&ov2735->ctrl_handler);
|
|
err_destroy_mutex:
|
|
mutex_destroy(&ov2735->mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void ov2735_remove(struct i2c_client *client)
|
|
{
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
struct ov2735 *ov2735 = to_ov2735(sd);
|
|
|
|
v4l2_async_unregister_subdev(sd);
|
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
|
media_entity_cleanup(&sd->entity);
|
|
#endif
|
|
v4l2_ctrl_handler_free(&ov2735->ctrl_handler);
|
|
mutex_destroy(&ov2735->mutex);
|
|
|
|
pm_runtime_disable(&client->dev);
|
|
if (!pm_runtime_status_suspended(&client->dev))
|
|
__ov2735_power_off(ov2735);
|
|
pm_runtime_set_suspended(&client->dev);
|
|
}
|
|
|
|
#if IS_ENABLED(CONFIG_OF)
|
|
static const struct of_device_id ov2735_of_match[] = {
|
|
{ .compatible = "ovti,ov2735" },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ov2735_of_match);
|
|
#endif
|
|
|
|
static const struct i2c_device_id ov2735_match_id[] = {
|
|
{ "ovti,ov2735", 0 },
|
|
{ },
|
|
};
|
|
|
|
static struct i2c_driver ov2735_i2c_driver = {
|
|
.driver = {
|
|
.name = OV2735_NAME,
|
|
.pm = &ov2735_pm_ops,
|
|
.of_match_table = of_match_ptr(ov2735_of_match),
|
|
},
|
|
.probe = &ov2735_probe,
|
|
.remove = &ov2735_remove,
|
|
.id_table = ov2735_match_id,
|
|
};
|
|
|
|
static int __init sensor_mod_init(void)
|
|
{
|
|
return i2c_add_driver(&ov2735_i2c_driver);
|
|
}
|
|
|
|
static void __exit sensor_mod_exit(void)
|
|
{
|
|
i2c_del_driver(&ov2735_i2c_driver);
|
|
}
|
|
|
|
device_initcall_sync(sensor_mod_init);
|
|
module_exit(sensor_mod_exit);
|
|
|
|
MODULE_DESCRIPTION("OmniVision ov2735 sensor driver");
|
|
MODULE_LICENSE("GPL v2");
|
|
|