161 lines
4.5 KiB
C
161 lines
4.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*
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* it66353 HDMI 3 in 1 out driver.
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*
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* Author: Kenneth.Hung@ite.com.tw
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* Wangqiang Guo <kay.guo@rock-chips.com>
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* Version: IT66353_SAMPLE_1.08
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*
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*/
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#include <linux/module.h>
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#include "config.h"
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#include "platform.h"
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#include "debug.h"
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#include "it66353_drv.h"
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#include "it66353_EQ.h"
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#include "it66353.h"
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/*
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* TX_PN_SWAP
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* 1: Enable TX side TMDS P/N swap
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* 0: Disable TX side TMDS P/N swap
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*/
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#define TX_PN_SWAP 0
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#ifndef TX_PN_SWAP
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#pragma message("TX_PN_SWAP is defined to 0")
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#pragma message("IT6635 EVB should be TX_PN_SWAP==1")
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#error ("Please define TX_PN_SWAP by your PCB layout.")
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#else
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#if TX_PN_SWAP
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#ifdef _SHOW_PRAGMA_MSG
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#pragma message("TX_PN_SWAP is pre-defined to 1")
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#endif
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#else
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#ifdef _SHOW_PRAGMA_MSG
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#pragma message("TX_PN_SWAP is pre-defined to 0")
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#endif
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#endif
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#endif
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/*
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* DEFAULT_RS_IDX
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* :The default EQ when power on.
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*/
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#define DEFAULT_RS_IDX 4
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/*
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* DEFAULT_PORT
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* :The default active port when power on.
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*/
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#define DEFAULT_PORT 0
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// constant definition
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#define HPD_TOGGLE_TIMEOUT_400MS (27)
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#define HPD_TOGGLE_TIMEOUT_1SEC (100)
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#define HPD_TOGGLE_TIMEOUT_2SEC (20|(0x80))
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#define HPD_TOGGLE_TIMEOUT_3SEC (30|(0x80))
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IT6635_RX_OPTIONS it66353_s_RxOpts = {
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0xC3, // u8 tag1;
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0, // u8 EnRxDDCBypass;
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0, // u8 EnRxPWR5VBypass;
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0, // u8 EnRxHPDBypass;
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1, // u8 TryFixedEQFirst;
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1, // u8 EnableAutoEQ;
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1, // u8 NonActivePortReplyHPD;
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0, // u8 DisableEdidRam;
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{DEFAULT_RS_IDX, DEFAULT_RS_IDX, DEFAULT_RS_IDX}, // u8 DefaultEQ[3];
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1, // u8 FixIncorrectHdmiEnc;
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0, // u8 HPDOutputInverse;
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HPD_TOGGLE_TIMEOUT_2SEC, // u8 HPDTogglePeriod;
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1, // u8 TxOEAlignment;
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(u8)sizeof(IT6635_RX_OPTIONS), // u8 str_size;
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};
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IT6635_TX_OPTIONS it66353_s_TxOpts = {
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0x3C, // u8 tag1;
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TX_PN_SWAP, // u8 EnTxPNSwap;
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TX_PN_SWAP, // u8 EnTxChSwap;
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0, // u8 EnTxVCLKInv;
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0, // u8 EnTxOutD1t;
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1, // u8 CopyEDIDFromSink;
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1, // u8 ParsePhysicalAddr;
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1, // u8 TurnOffTx5VWhenSwitchPort;
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(u8)sizeof(IT6635_TX_OPTIONS), // u8 str_size;
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};
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IT6635_DEV_OPTION it66353_s_DevOpts = {
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0x5A, // u8 tag1;
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SWAddr, // u8 SwAddr;
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RXAddr, // u8 RxAddr;
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CECAddr, // u8 CecAddr;
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RXEDIDAddr, // u8 EdidAddr;
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// u8 EnCEC;
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0, // u8 ForceRxOn;
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1, // u8 RxAutoPowerDown;
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1, // u8 DoTxPowerDown;
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0, // u8 TxPowerDownWhileWaitingClock;
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(u8)sizeof(IT6635_DEV_OPTION), // u8 str_size;
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};
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u8 it66353_s_default_edid_port0[] = {
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0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00,
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0x26, 0x85, 0x35, 0x66, 0x01, 0x01, 0x01, 0x01,
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0x00, 0x19, 0x01, 0x03, 0x80, 0x80, 0x48, 0x78,
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0x0A, 0xDA, 0xFF, 0xA3, 0x58, 0x4A, 0xA2, 0x29,
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0x17, 0x49, 0x4B, 0x20, 0x08, 0x00, 0x31, 0x40,
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0x61, 0x40, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
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0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x08, 0xE8,
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0x00, 0x30, 0xF2, 0x70, 0x5A, 0x80, 0xB0, 0x58,
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0x8A, 0x00, 0xBA, 0x88, 0x21, 0x00, 0x00, 0x1E,
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0x02, 0x3A, 0x80, 0x18, 0x71, 0x38, 0x2D, 0x40,
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0x58, 0x2C, 0x45, 0x00, 0xBA, 0x88, 0x21, 0x00,
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0x00, 0x1E, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x50,
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0x61, 0x6E, 0x61, 0x73, 0x6F, 0x6E, 0x69, 0x63,
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0x2D, 0x54, 0x56, 0x0A, 0x00, 0x00, 0x00, 0xFD,
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0x00, 0x17, 0x3D, 0x0F, 0x88, 0x3C, 0x00, 0x0A,
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0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x01, 0xF0,
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0x02, 0x03, 0x43, 0xF0, 0x57, 0x10, 0x1F, 0x05,
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0x14, 0x20, 0x21, 0x22, 0x04, 0x13, 0x03, 0x12,
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0x07, 0x16, 0x5D, 0x5E, 0x5F, 0x62, 0x63, 0x64,
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0x61, 0x60, 0x66, 0x65, 0x23, 0x09, 0x07, 0x01,
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0x6E, 0x03, 0x0C, 0x00, 0x10, 0x00, 0x38, 0x3C,
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0x2F, 0x00, 0x80, 0x01, 0x02, 0x03, 0x04, 0x67,
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0xD8, 0x5D, 0xC4, 0x01, 0x78, 0x80, 0x03, 0xE2,
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0x00, 0x4B, 0xE3, 0x05, 0x1F, 0x01, 0xE4, 0x0F,
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0x00, 0x00, 0x78, 0x56, 0x5E, 0x00, 0xA0, 0xA0,
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0xA0, 0x29, 0x50, 0x30, 0x20, 0x35, 0x00, 0xBA,
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0x88, 0x21, 0x00, 0x00, 0x1A, 0x66, 0x21, 0x56,
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0xAA, 0x51, 0x00, 0x1E, 0x30, 0x46, 0x8F, 0x33,
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0x00, 0xBA, 0x88, 0x21, 0x00, 0x00, 0x1E, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06,
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};
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void it66353_options_init(void)
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{
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it66353_gdev.opts.rx_opt[0] = &it66353_s_RxOpts;
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it66353_gdev.opts.rx_opt[1] = &it66353_s_RxOpts;
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it66353_gdev.opts.rx_opt[2] = &it66353_s_RxOpts;
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it66353_gdev.opts.rx_opt[3] = &it66353_s_RxOpts;
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it66353_gdev.opts.active_rx_opt = it66353_gdev.opts.rx_opt[DEFAULT_PORT];
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it66353_gdev.opts.tx_opt = &it66353_s_TxOpts;
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it66353_gdev.opts.dev_opt = &it66353_s_DevOpts;
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it66353_gdev.vars.Rx_active_port = DEFAULT_PORT;
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it66353_vars_init();
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}
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MODULE_LICENSE("GPL v2");
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