252 lines
6.5 KiB
C
252 lines
6.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2018 Rockchip Electronics Co. Ltd.
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*
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* Author: Ziyuan Xu <xzy.xu@rock-chips.com>
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*/
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#include <linux/module.h>
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#include <linux/gpio/consumer.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/iio/consumer.h>
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#include <linux/iio/iio.h>
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/**
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* id: the index of analog switch inputs
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* saradc_chan_id: the index of analog switch 'x' output
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* gpio_mask: set the value of switch-gpios with mask, that
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* makes the 'id' connect to 'saradc_chan_id'.
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*/
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struct gpio_muxadc_chan_data {
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u32 id;
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u32 saradc_chan_id;
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u32 gpio_mask;
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};
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#define MUXADC_CHANNEL(_index, _id, _mask) { \
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.id = _index, \
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.saradc_chan_id = _id, \
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.gpio_mask = _mask, \
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}
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/**
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* nr_chans: the number of analog switch 'x' output
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* saradc_nr_chans: the number of analog switch inputs
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* chans: pointer to get the muxadc channel information
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*/
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struct gpio_muxadc_data {
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u32 nr_chans;
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u32 saradc_nr_chans;
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const struct gpio_muxadc_chan_data *chans;
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};
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/**
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* gpios: pointer of digital enable input gpios
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* adc_chans: pointer of the 'saraadc' channel
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* muxchans: specification of a single analog switch 'x'
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* output channel
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* data: pointer to get the muxadc channels information
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* nr_chans: the number of analog switch 'x' output
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*/
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struct gpio_muxadc {
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struct gpio_descs *gpios;
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struct iio_channel *adc_chans;
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struct iio_chan_spec *muxchans;
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const struct gpio_muxadc_data *data;
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u32 nr_chans;
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};
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static int gpio_muxadc_chan_read_by_index(struct gpio_muxadc *muxadc,
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int index, int *val)
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{
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struct iio_channel *saradc_chan;
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const struct gpio_muxadc_chan_data *chan_data;
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u32 i, saradc_chan_id;
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chan_data = &muxadc->data->chans[index];
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for (i = 0; i < muxadc->gpios->ndescs; i++) {
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struct gpio_desc *gpiod = muxadc->gpios->desc[i];
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int gpio_val = chan_data->gpio_mask & BIT(i) ? 1 : 0;
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gpiod_set_value(gpiod, gpio_val);
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}
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saradc_chan_id = chan_data->saradc_chan_id;
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saradc_chan = &muxadc->adc_chans[saradc_chan_id];
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return iio_read_channel_raw(saradc_chan, val);
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}
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static int gpio_muxadc_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct gpio_muxadc *muxadc = iio_priv(indio_dev);
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int ret = IIO_VAL_INT;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = gpio_muxadc_chan_read_by_index(muxadc,
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chan->channel, val);
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break;
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default:
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return -EINVAL;
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}
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return ret;
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}
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static const struct iio_info gpio_muxadc_iio_info = {
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.read_raw = gpio_muxadc_read_raw,
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};
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static const struct gpio_muxadc_chan_data mux_sgm3699_chans_data[] = {
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MUXADC_CHANNEL(0, 0, 0b00),
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MUXADC_CHANNEL(1, 1, 0b00),
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MUXADC_CHANNEL(2, 2, 0b00),
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MUXADC_CHANNEL(3, 3, 0b00),
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MUXADC_CHANNEL(4, 0, 0b01),
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MUXADC_CHANNEL(5, 1, 0b01),
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MUXADC_CHANNEL(6, 2, 0b11),
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MUXADC_CHANNEL(7, 3, 0b11),
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};
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static const struct gpio_muxadc_data mux_sgm3699_data = {
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.saradc_nr_chans = 4,
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.nr_chans = ARRAY_SIZE(mux_sgm3699_chans_data),
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.chans = mux_sgm3699_chans_data,
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};
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static const struct gpio_muxadc_chan_data mux_sgm48752_chans_data[] = {
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MUXADC_CHANNEL(0, 0, 0b00),
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MUXADC_CHANNEL(1, 1, 0b00),
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MUXADC_CHANNEL(2, 0, 0b10),
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MUXADC_CHANNEL(3, 1, 0b10),
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MUXADC_CHANNEL(4, 0, 0b01),
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MUXADC_CHANNEL(5, 1, 0b01),
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MUXADC_CHANNEL(6, 0, 0b11),
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MUXADC_CHANNEL(7, 1, 0b11),
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};
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static const struct gpio_muxadc_data mux_sgm48752_data = {
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.saradc_nr_chans = 2,
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.nr_chans = ARRAY_SIZE(mux_sgm48752_chans_data),
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.chans = mux_sgm48752_chans_data,
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};
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static const struct of_device_id of_gpio_muxadc_match[] = {
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{
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.compatible = "sgm3699",
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.data = &mux_sgm3699_data,
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},
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{
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.compatible = "sgm48752",
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.data = &mux_sgm48752_data,
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, of_gpio_muxadc_match);
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static int gpio_muxadc_probe(struct platform_device *pdev)
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{
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struct gpio_muxadc *muxadc;
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struct iio_dev *indio_dev;
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const struct of_device_id *match;
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struct device *dev = &pdev->dev;
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struct device_node *np = pdev->dev.of_node;
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u32 i, nr_adc_chans = 0;
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indio_dev = devm_iio_device_alloc(dev, sizeof(*muxadc));
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if (!indio_dev)
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return -ENOMEM;
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muxadc = iio_priv(indio_dev);
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match = of_match_device(of_gpio_muxadc_match, dev);
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if (!match) {
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dev_err(dev, "failed to match device\n");
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return -ENODEV;
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}
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muxadc->data = match->data;
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muxadc->gpios = devm_gpiod_get_array(dev, "switch", GPIOD_OUT_LOW);
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if (IS_ERR(muxadc->gpios)) {
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dev_err(dev, "property of switch-gpios not specified\n");
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return PTR_ERR(muxadc->gpios);
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}
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muxadc->adc_chans = iio_channel_get_all(dev);
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if (IS_ERR(muxadc->adc_chans))
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return PTR_ERR(muxadc->adc_chans);
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/*
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* It's necessary to get the number of input ADC, and make a
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* comparison with chan_data->saradc_nr_chans. Otherwise it
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* might fall in to trap.
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*/
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while (muxadc->adc_chans[nr_adc_chans].indio_dev)
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nr_adc_chans++;
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if (muxadc->data->saradc_nr_chans != nr_adc_chans) {
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dev_err(dev, "the number of io-channels is mismatch\n");
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return -EINVAL;
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}
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muxadc->nr_chans = of_property_count_strings(np, "labels");
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if (muxadc->nr_chans != muxadc->data->nr_chans) {
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dev_err(dev, "should provide %d label\n",
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muxadc->nr_chans);
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return -EINVAL;
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}
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muxadc->muxchans = devm_kcalloc(dev, muxadc->nr_chans,
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sizeof(struct iio_chan_spec),
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GFP_KERNEL);
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if (!muxadc->muxchans)
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return -ENOMEM;
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for (i = 0; i < muxadc->nr_chans; i++) {
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/*
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* The specification of each muxadc channel will be
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* in_voltage_<label> without been indexed.
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*/
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muxadc->muxchans[i].type = IIO_VOLTAGE;
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muxadc->muxchans[i].channel = i;
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muxadc->muxchans[i].info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
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of_property_read_string_index(np, "labels", i,
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&muxadc->muxchans[i].extend_name);
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}
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indio_dev->name = dev_name(dev);
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indio_dev->dev.parent = dev;
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indio_dev->dev.of_node = dev->of_node;
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indio_dev->info = &gpio_muxadc_iio_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = muxadc->muxchans;
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indio_dev->num_channels = muxadc->nr_chans;
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return iio_device_register(indio_dev);
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}
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static int gpio_muxadc_remove(struct platform_device *pdev)
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{
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struct iio_dev *indio_dev = platform_get_drvdata(pdev);
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iio_device_unregister(indio_dev);
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return 0;
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}
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static struct platform_driver gpio_muxadc_driver = {
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.probe = gpio_muxadc_probe,
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.remove = gpio_muxadc_remove,
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.driver = {
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.name = "gpio-muxadc",
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.of_match_table = of_gpio_muxadc_match,
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},
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};
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module_platform_driver(gpio_muxadc_driver);
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MODULE_AUTHOR("Ziyuan Xu <xzy.xu@rock-chips.com>");
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MODULE_DESCRIPTION("GPIO MUX ADC driver");
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MODULE_LICENSE("GPL v2");
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