571 lines
15 KiB
C
571 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0 or MIT
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/* Copyright 2018 Marty E. Plummer <hanetzer@startmail.com> */
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/* Copyright 2019 Linaro, Ltd, Rob Herring <robh@kernel.org> */
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/* Copyright 2023 Collabora ltd. */
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#include <linux/clk.h>
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#include <linux/mm.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/pm_runtime.h>
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#include <linux/regulator/consumer.h>
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#include <linux/reset.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_managed.h>
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#include "panthor_devfreq.h"
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#include "panthor_device.h"
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#include "panthor_fw.h"
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#include "panthor_gpu.h"
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#include "panthor_mmu.h"
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#include "panthor_regs.h"
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#include "panthor_sched.h"
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static int panthor_gpu_coherency_init(struct panthor_device *ptdev)
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{
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ptdev->coherent = device_get_dma_attr(ptdev->base.dev) == DEV_DMA_COHERENT;
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if (!ptdev->coherent)
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return 0;
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/* Check if the ACE-Lite coherency protocol is actually supported by the GPU.
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* ACE protocol has never been supported for command stream frontend GPUs.
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*/
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if ((gpu_read(ptdev, GPU_COHERENCY_FEATURES) &
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GPU_COHERENCY_PROT_BIT(ACE_LITE)))
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return 0;
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drm_err(&ptdev->base, "Coherency not supported by the device");
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return -ENOTSUPP;
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}
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static int panthor_clk_init(struct panthor_device *ptdev)
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{
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ptdev->clks.core = devm_clk_get(ptdev->base.dev, NULL);
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if (IS_ERR(ptdev->clks.core))
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return dev_err_probe(ptdev->base.dev,
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PTR_ERR(ptdev->clks.core),
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"get 'core' clock failed");
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ptdev->clks.stacks = devm_clk_get_optional(ptdev->base.dev, "stacks");
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if (IS_ERR(ptdev->clks.stacks))
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return dev_err_probe(ptdev->base.dev,
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PTR_ERR(ptdev->clks.stacks),
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"get 'stacks' clock failed");
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ptdev->clks.coregroup = devm_clk_get_optional(ptdev->base.dev, "coregroup");
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if (IS_ERR(ptdev->clks.coregroup))
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return dev_err_probe(ptdev->base.dev,
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PTR_ERR(ptdev->clks.coregroup),
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"get 'coregroup' clock failed");
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drm_info(&ptdev->base, "clock rate = %lu\n", clk_get_rate(ptdev->clks.core));
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return 0;
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}
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void panthor_device_unplug(struct panthor_device *ptdev)
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{
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/* This function can be called from two different path: the reset work
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* and the platform device remove callback. drm_dev_unplug() doesn't
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* deal with concurrent callers, so we have to protect drm_dev_unplug()
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* calls with our own lock, and bail out if the device is already
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* unplugged.
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*/
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mutex_lock(&ptdev->unplug.lock);
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if (drm_dev_is_unplugged(&ptdev->base)) {
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/* Someone beat us, release the lock and wait for the unplug
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* operation to be reported as done.
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**/
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mutex_unlock(&ptdev->unplug.lock);
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wait_for_completion(&ptdev->unplug.done);
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return;
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}
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/* Call drm_dev_unplug() so any access to HW blocks happening after
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* that point get rejected.
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*/
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drm_dev_unplug(&ptdev->base);
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/* We do the rest of the unplug with the unplug lock released,
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* future callers will wait on ptdev->unplug.done anyway.
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*/
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mutex_unlock(&ptdev->unplug.lock);
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drm_WARN_ON(&ptdev->base, pm_runtime_get_sync(ptdev->base.dev) < 0);
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/* Now, try to cleanly shutdown the GPU before the device resources
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* get reclaimed.
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*/
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panthor_sched_unplug(ptdev);
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panthor_fw_unplug(ptdev);
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panthor_mmu_unplug(ptdev);
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panthor_gpu_unplug(ptdev);
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pm_runtime_dont_use_autosuspend(ptdev->base.dev);
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pm_runtime_put_sync_suspend(ptdev->base.dev);
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/* If PM is disabled, we need to call the suspend handler manually. */
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if (!IS_ENABLED(CONFIG_PM))
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panthor_device_suspend(ptdev->base.dev);
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/* Report the unplug operation as done to unblock concurrent
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* panthor_device_unplug() callers.
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*/
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complete_all(&ptdev->unplug.done);
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}
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static void panthor_device_reset_cleanup(struct drm_device *ddev, void *data)
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{
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struct panthor_device *ptdev = container_of(ddev, struct panthor_device, base);
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cancel_work_sync(&ptdev->reset.work);
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destroy_workqueue(ptdev->reset.wq);
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}
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static void panthor_device_reset_work(struct work_struct *work)
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{
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struct panthor_device *ptdev = container_of(work, struct panthor_device, reset.work);
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int ret = 0, cookie;
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/* If the device is entering suspend, we don't reset. A slow reset will
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* be forced at resume time instead.
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*/
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if (atomic_read(&ptdev->pm.state) != PANTHOR_DEVICE_PM_STATE_ACTIVE)
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return;
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if (!drm_dev_enter(&ptdev->base, &cookie))
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return;
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panthor_sched_pre_reset(ptdev);
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panthor_fw_pre_reset(ptdev, true);
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panthor_mmu_pre_reset(ptdev);
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panthor_gpu_soft_reset(ptdev);
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panthor_gpu_l2_power_on(ptdev);
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panthor_mmu_post_reset(ptdev);
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ret = panthor_fw_post_reset(ptdev);
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atomic_set(&ptdev->reset.pending, 0);
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panthor_sched_post_reset(ptdev, ret != 0);
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drm_dev_exit(cookie);
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if (ret) {
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panthor_device_unplug(ptdev);
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drm_err(&ptdev->base, "Failed to boot MCU after reset, making device unusable.");
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}
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}
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static bool panthor_device_is_initialized(struct panthor_device *ptdev)
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{
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return !!ptdev->scheduler;
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}
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static void panthor_device_free_page(struct drm_device *ddev, void *data)
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{
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__free_page(data);
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}
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int panthor_device_init(struct panthor_device *ptdev)
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{
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u32 *dummy_page_virt;
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struct resource *res;
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struct page *p;
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int ret;
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ret = panthor_gpu_coherency_init(ptdev);
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if (ret)
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return ret;
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init_completion(&ptdev->unplug.done);
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ret = drmm_mutex_init(&ptdev->base, &ptdev->unplug.lock);
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if (ret)
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return ret;
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ret = drmm_mutex_init(&ptdev->base, &ptdev->pm.mmio_lock);
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if (ret)
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return ret;
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atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDED);
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p = alloc_page(GFP_KERNEL | __GFP_ZERO);
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if (!p)
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return -ENOMEM;
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ptdev->pm.dummy_latest_flush = p;
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dummy_page_virt = page_address(p);
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ret = drmm_add_action_or_reset(&ptdev->base, panthor_device_free_page,
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ptdev->pm.dummy_latest_flush);
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if (ret)
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return ret;
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/*
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* Set the dummy page holding the latest flush to 1. This will cause the
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* flush to avoided as we know it isn't necessary if the submission
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* happens while the dummy page is mapped. Zero cannot be used because
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* that means 'always flush'.
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*/
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*dummy_page_virt = 1;
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INIT_WORK(&ptdev->reset.work, panthor_device_reset_work);
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ptdev->reset.wq = alloc_ordered_workqueue("panthor-reset-wq", 0);
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if (!ptdev->reset.wq)
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return -ENOMEM;
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ret = drmm_add_action_or_reset(&ptdev->base, panthor_device_reset_cleanup, NULL);
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if (ret)
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return ret;
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ret = panthor_clk_init(ptdev);
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if (ret)
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return ret;
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ret = panthor_devfreq_init(ptdev);
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if (ret)
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return ret;
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ptdev->iomem = devm_platform_get_and_ioremap_resource(to_platform_device(ptdev->base.dev),
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0, &res);
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if (IS_ERR(ptdev->iomem))
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return PTR_ERR(ptdev->iomem);
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ptdev->phys_addr = res->start;
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ret = devm_pm_runtime_enable(ptdev->base.dev);
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if (ret)
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return ret;
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ret = pm_runtime_resume_and_get(ptdev->base.dev);
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if (ret)
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return ret;
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/* If PM is disabled, we need to call panthor_device_resume() manually. */
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if (!IS_ENABLED(CONFIG_PM)) {
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ret = panthor_device_resume(ptdev->base.dev);
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if (ret)
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return ret;
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}
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ret = panthor_gpu_init(ptdev);
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if (ret)
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goto err_rpm_put;
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ret = panthor_mmu_init(ptdev);
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if (ret)
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goto err_unplug_gpu;
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ret = panthor_fw_init(ptdev);
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if (ret)
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goto err_unplug_mmu;
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ret = panthor_sched_init(ptdev);
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if (ret)
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goto err_unplug_fw;
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/* ~3 frames */
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pm_runtime_set_autosuspend_delay(ptdev->base.dev, 50);
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pm_runtime_use_autosuspend(ptdev->base.dev);
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ret = drm_dev_register(&ptdev->base, 0);
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if (ret)
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goto err_disable_autosuspend;
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pm_runtime_put_autosuspend(ptdev->base.dev);
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return 0;
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err_disable_autosuspend:
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pm_runtime_dont_use_autosuspend(ptdev->base.dev);
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panthor_sched_unplug(ptdev);
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err_unplug_fw:
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panthor_fw_unplug(ptdev);
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err_unplug_mmu:
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panthor_mmu_unplug(ptdev);
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err_unplug_gpu:
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panthor_gpu_unplug(ptdev);
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err_rpm_put:
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pm_runtime_put_sync_suspend(ptdev->base.dev);
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return ret;
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}
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#define PANTHOR_EXCEPTION(id) \
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[DRM_PANTHOR_EXCEPTION_ ## id] = { \
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.name = #id, \
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}
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struct panthor_exception_info {
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const char *name;
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};
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static const struct panthor_exception_info panthor_exception_infos[] = {
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PANTHOR_EXCEPTION(OK),
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PANTHOR_EXCEPTION(TERMINATED),
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PANTHOR_EXCEPTION(KABOOM),
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PANTHOR_EXCEPTION(EUREKA),
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PANTHOR_EXCEPTION(ACTIVE),
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PANTHOR_EXCEPTION(CS_RES_TERM),
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PANTHOR_EXCEPTION(CS_CONFIG_FAULT),
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PANTHOR_EXCEPTION(CS_UNRECOVERABLE),
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PANTHOR_EXCEPTION(CS_ENDPOINT_FAULT),
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PANTHOR_EXCEPTION(CS_BUS_FAULT),
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PANTHOR_EXCEPTION(CS_INSTR_INVALID),
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PANTHOR_EXCEPTION(CS_CALL_STACK_OVERFLOW),
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PANTHOR_EXCEPTION(CS_INHERIT_FAULT),
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PANTHOR_EXCEPTION(INSTR_INVALID_PC),
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PANTHOR_EXCEPTION(INSTR_INVALID_ENC),
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PANTHOR_EXCEPTION(INSTR_BARRIER_FAULT),
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PANTHOR_EXCEPTION(DATA_INVALID_FAULT),
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PANTHOR_EXCEPTION(TILE_RANGE_FAULT),
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PANTHOR_EXCEPTION(ADDR_RANGE_FAULT),
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PANTHOR_EXCEPTION(IMPRECISE_FAULT),
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PANTHOR_EXCEPTION(OOM),
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PANTHOR_EXCEPTION(CSF_FW_INTERNAL_ERROR),
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PANTHOR_EXCEPTION(CSF_RES_EVICTION_TIMEOUT),
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PANTHOR_EXCEPTION(GPU_BUS_FAULT),
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PANTHOR_EXCEPTION(GPU_SHAREABILITY_FAULT),
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PANTHOR_EXCEPTION(SYS_SHAREABILITY_FAULT),
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PANTHOR_EXCEPTION(GPU_CACHEABILITY_FAULT),
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PANTHOR_EXCEPTION(TRANSLATION_FAULT_0),
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PANTHOR_EXCEPTION(TRANSLATION_FAULT_1),
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PANTHOR_EXCEPTION(TRANSLATION_FAULT_2),
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PANTHOR_EXCEPTION(TRANSLATION_FAULT_3),
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PANTHOR_EXCEPTION(TRANSLATION_FAULT_4),
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PANTHOR_EXCEPTION(PERM_FAULT_0),
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PANTHOR_EXCEPTION(PERM_FAULT_1),
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PANTHOR_EXCEPTION(PERM_FAULT_2),
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PANTHOR_EXCEPTION(PERM_FAULT_3),
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PANTHOR_EXCEPTION(ACCESS_FLAG_1),
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PANTHOR_EXCEPTION(ACCESS_FLAG_2),
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PANTHOR_EXCEPTION(ACCESS_FLAG_3),
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PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_IN),
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PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT0),
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PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT1),
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PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT2),
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PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT3),
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PANTHOR_EXCEPTION(MEM_ATTR_FAULT_0),
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PANTHOR_EXCEPTION(MEM_ATTR_FAULT_1),
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PANTHOR_EXCEPTION(MEM_ATTR_FAULT_2),
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PANTHOR_EXCEPTION(MEM_ATTR_FAULT_3),
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};
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const char *panthor_exception_name(struct panthor_device *ptdev, u32 exception_code)
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{
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if (exception_code >= ARRAY_SIZE(panthor_exception_infos) ||
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!panthor_exception_infos[exception_code].name)
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return "Unknown exception type";
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return panthor_exception_infos[exception_code].name;
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}
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static vm_fault_t panthor_mmio_vm_fault(struct vm_fault *vmf)
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{
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struct vm_area_struct *vma = vmf->vma;
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struct panthor_device *ptdev = vma->vm_private_data;
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u64 offset = (u64)vma->vm_pgoff << PAGE_SHIFT;
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unsigned long pfn;
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pgprot_t pgprot;
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vm_fault_t ret;
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bool active;
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int cookie;
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if (!drm_dev_enter(&ptdev->base, &cookie))
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return VM_FAULT_SIGBUS;
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mutex_lock(&ptdev->pm.mmio_lock);
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active = atomic_read(&ptdev->pm.state) == PANTHOR_DEVICE_PM_STATE_ACTIVE;
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switch (offset) {
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case DRM_PANTHOR_USER_FLUSH_ID_MMIO_OFFSET:
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if (active)
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pfn = __phys_to_pfn(ptdev->phys_addr + CSF_GPU_LATEST_FLUSH_ID);
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else
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pfn = page_to_pfn(ptdev->pm.dummy_latest_flush);
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break;
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default:
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ret = VM_FAULT_SIGBUS;
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goto out_unlock;
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}
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pgprot = vma->vm_page_prot;
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if (active)
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pgprot = pgprot_noncached(pgprot);
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ret = vmf_insert_pfn_prot(vma, vmf->address, pfn, pgprot);
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out_unlock:
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mutex_unlock(&ptdev->pm.mmio_lock);
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drm_dev_exit(cookie);
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return ret;
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}
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static const struct vm_operations_struct panthor_mmio_vm_ops = {
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.fault = panthor_mmio_vm_fault,
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};
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int panthor_device_mmap_io(struct panthor_device *ptdev, struct vm_area_struct *vma)
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{
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u64 offset = (u64)vma->vm_pgoff << PAGE_SHIFT;
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if ((vma->vm_flags & VM_SHARED) == 0)
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return -EINVAL;
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switch (offset) {
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case DRM_PANTHOR_USER_FLUSH_ID_MMIO_OFFSET:
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if (vma->vm_end - vma->vm_start != PAGE_SIZE ||
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(vma->vm_flags & (VM_WRITE | VM_EXEC)))
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return -EINVAL;
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vma->vm_flags &= ~VM_MAYWRITE;
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break;
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default:
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return -EINVAL;
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}
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/* Defer actual mapping to the fault handler. */
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vma->vm_private_data = ptdev;
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vma->vm_ops = &panthor_mmio_vm_ops;
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vma->vm_flags |= VM_IO | VM_DONTCOPY | VM_DONTEXPAND |
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VM_NORESERVE | VM_DONTDUMP | VM_PFNMAP;
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return 0;
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}
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static int panthor_device_resume_hw_components(struct panthor_device *ptdev)
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{
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int ret;
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panthor_gpu_resume(ptdev);
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panthor_mmu_resume(ptdev);
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ret = panthor_fw_resume(ptdev);
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if (!ret)
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return 0;
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panthor_mmu_suspend(ptdev);
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panthor_gpu_suspend(ptdev);
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return ret;
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}
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int panthor_device_resume(struct device *dev)
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{
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struct panthor_device *ptdev = dev_get_drvdata(dev);
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int ret, cookie;
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if (atomic_read(&ptdev->pm.state) != PANTHOR_DEVICE_PM_STATE_SUSPENDED)
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return -EINVAL;
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atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_RESUMING);
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ret = clk_prepare_enable(ptdev->clks.core);
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if (ret)
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goto err_set_suspended;
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ret = clk_prepare_enable(ptdev->clks.stacks);
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if (ret)
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goto err_disable_core_clk;
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ret = clk_prepare_enable(ptdev->clks.coregroup);
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if (ret)
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goto err_disable_stacks_clk;
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panthor_devfreq_resume(ptdev);
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if (panthor_device_is_initialized(ptdev) &&
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drm_dev_enter(&ptdev->base, &cookie)) {
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/* If there was a reset pending at the time we suspended the
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* device, we force a slow reset.
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*/
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if (atomic_read(&ptdev->reset.pending)) {
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ptdev->reset.fast = false;
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atomic_set(&ptdev->reset.pending, 0);
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}
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|
|
ret = panthor_device_resume_hw_components(ptdev);
|
|
if (ret && ptdev->reset.fast) {
|
|
drm_err(&ptdev->base, "Fast reset failed, trying a slow reset");
|
|
ptdev->reset.fast = false;
|
|
ret = panthor_device_resume_hw_components(ptdev);
|
|
}
|
|
|
|
if (!ret)
|
|
panthor_sched_resume(ptdev);
|
|
|
|
drm_dev_exit(cookie);
|
|
|
|
if (ret)
|
|
goto err_suspend_devfreq;
|
|
}
|
|
|
|
/* Clear all IOMEM mappings pointing to this device after we've
|
|
* resumed. This way the fake mappings pointing to the dummy pages
|
|
* are removed and the real iomem mapping will be restored on next
|
|
* access.
|
|
*/
|
|
mutex_lock(&ptdev->pm.mmio_lock);
|
|
unmap_mapping_range(ptdev->base.anon_inode->i_mapping,
|
|
DRM_PANTHOR_USER_MMIO_OFFSET, 0, 1);
|
|
atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_ACTIVE);
|
|
mutex_unlock(&ptdev->pm.mmio_lock);
|
|
return 0;
|
|
|
|
err_suspend_devfreq:
|
|
panthor_devfreq_suspend(ptdev);
|
|
clk_disable_unprepare(ptdev->clks.coregroup);
|
|
|
|
err_disable_stacks_clk:
|
|
clk_disable_unprepare(ptdev->clks.stacks);
|
|
|
|
err_disable_core_clk:
|
|
clk_disable_unprepare(ptdev->clks.core);
|
|
|
|
err_set_suspended:
|
|
atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDED);
|
|
atomic_set(&ptdev->pm.recovery_needed, 1);
|
|
return ret;
|
|
}
|
|
|
|
int panthor_device_suspend(struct device *dev)
|
|
{
|
|
struct panthor_device *ptdev = dev_get_drvdata(dev);
|
|
int cookie;
|
|
|
|
if (atomic_read(&ptdev->pm.state) != PANTHOR_DEVICE_PM_STATE_ACTIVE)
|
|
return -EINVAL;
|
|
|
|
/* Clear all IOMEM mappings pointing to this device before we
|
|
* shutdown the power-domain and clocks. Failing to do that results
|
|
* in external aborts when the process accesses the iomem region.
|
|
* We change the state and call unmap_mapping_range() with the
|
|
* mmio_lock held to make sure the vm_fault handler won't set up
|
|
* invalid mappings.
|
|
*/
|
|
mutex_lock(&ptdev->pm.mmio_lock);
|
|
atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDING);
|
|
unmap_mapping_range(ptdev->base.anon_inode->i_mapping,
|
|
DRM_PANTHOR_USER_MMIO_OFFSET, 0, 1);
|
|
mutex_unlock(&ptdev->pm.mmio_lock);
|
|
|
|
if (panthor_device_is_initialized(ptdev) &&
|
|
drm_dev_enter(&ptdev->base, &cookie)) {
|
|
cancel_work_sync(&ptdev->reset.work);
|
|
|
|
/* We prepare everything as if we were resetting the GPU.
|
|
* The end of the reset will happen in the resume path though.
|
|
*/
|
|
panthor_sched_suspend(ptdev);
|
|
panthor_fw_suspend(ptdev);
|
|
panthor_mmu_suspend(ptdev);
|
|
panthor_gpu_suspend(ptdev);
|
|
drm_dev_exit(cookie);
|
|
}
|
|
|
|
panthor_devfreq_suspend(ptdev);
|
|
|
|
clk_disable_unprepare(ptdev->clks.coregroup);
|
|
clk_disable_unprepare(ptdev->clks.stacks);
|
|
clk_disable_unprepare(ptdev->clks.core);
|
|
atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDED);
|
|
return 0;
|
|
}
|