385 lines
6.7 KiB
Plaintext
385 lines
6.7 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Jianfeng Liu <liujianfeng1994@gmail.com>
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*
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/display/rockchip_vop.h>
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#include "rk3588-armsom-aim7.dtsi"
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#include "rk3588-linux.dtsi"
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/ {
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model = "ArmSoM AIM7 IO";
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compatible = "armsom,aim7-io", "rockchip,rk3588";
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/delete-node/ chosen;
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dp0_sound: dp0-sound {
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compatible = "rockchip,hdmi";
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rockchip,card-name= "rockchip-dp0";
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rockchip,mclk-fs = <512>;
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rockchip,cpu = <&spdif_tx2>;
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rockchip,codec = <&dp0 1>;
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rockchip,jack-det;
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};
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hdmi0_sound: hdmi0-sound {
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compatible = "rockchip,hdmi";
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rockchip,mclk-fs = <128>;
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rockchip,card-name = "rockchip-hdmi0";
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rockchip,cpu = <&i2s5_8ch>;
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rockchip,codec = <&hdmi0>;
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rockchip,jack-det;
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};
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vcc12v_dcin: vcc12v-dcin {
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compatible = "regulator-fixed";
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regulator-name = "vcc12v_dcin";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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vcc5v0_sys: vcc5v0-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc12v_dcin>;
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};
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vcc5v0_usbdcin: vcc5v0-usbdcin {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_usbdcin";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc12v_dcin>;
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};
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vcc5v0_usb: vcc5v0-usb {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_usb";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc5v0_usbdcin>;
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};
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pcie30_avdd0v75: pcie30-avdd0v75 {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd0v75";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <750000>;
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vin-supply = <&vdd_0v75_s0>;
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};
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pcie30_avdd1v8: pcie30-avdd1v8 {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd1v8";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&avcc_1v8_s0>;
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};
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vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v1_nldo_s3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc3v3_pcie30: vcc3v3-pcie30 {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie30";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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enable-active-high;
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gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_sys>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc3v3_pcie30_en>;
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};
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};
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&combphy2_psu {
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status = "okay";
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};
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&dp0 {
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pinctrl-names = "default";
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pinctrl-0 = <&dp0m2_pins>;
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status = "okay";
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};
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&dp0_in_vp2 {
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status = "okay";
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};
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&hdmi0 {
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status = "okay";
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};
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&hdmi0_in_vp0 {
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status = "okay";
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};
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&hdmi0_in_vp1 {
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status = "disabled";
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};
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&hdmi0_in_vp2 {
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status = "disabled";
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};
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&hdptxphy_hdmi0 {
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status = "okay";
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};
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&i2s5_8ch {
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status = "okay";
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};
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&i2s6_8ch {
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status = "okay";
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};
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&i2s7_8ch {
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status = "okay";
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};
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&gmac0 {
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status = "okay";
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phy-mode = "rgmii-rxid";
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clock_in_out = "output";
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snps,reset-gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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/* Reset time is 20ms, 100ms for rtl8211f */
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snps,reset-delays-us = <0 20000 100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&gmac0_miim
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&gmac0_tx_bus2
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&gmac0_rx_bus2
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&gmac0_rgmii_clk
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&gmac0_rgmii_bus>;
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tx_delay = <0x43>;
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phy-handle = <&rgmii_phy>;
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};
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&mdio0 {
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rgmii_phy: phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x1>;
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};
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};
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&pcie30phy {
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rockchip,pcie30-phymode = <PHY_MODE_PCIE_NABIBI>;
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status = "okay";
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};
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&pcie3x4 {
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num-lanes = <1>;
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reset-gpios = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie3_clkreqn_m1>;
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status = "okay";
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};
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&pinctrl {
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pcie3 {
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pcie3_clkreqn_m1: pcie3-clkreqn-m1 {
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rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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vcc3v3_pcie30_en: pcie3-reg {
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rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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sdmmc {
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sd_s0_pwr: sd-s0-pwr {
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rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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&route_hdmi0 {
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status = "okay";
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};
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&sdmmc {
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max-frequency = <200000000>;
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no-sdio;
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no-mmc;
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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disable-wp;
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sd-uhs-sdr104;
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vmmc-supply = <&vcc_3v3_s3>;
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vqmmc-supply = <&vccio_sd_s0>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>;
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status = "okay";
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};
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&spdif_tx2 {
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status = "okay";
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};
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&u2phy0 {
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status = "okay";
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};
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&u2phy0_otg {
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rockchip,typec-vbus-det;
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status = "okay";
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};
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&u2phy1 {
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status = "okay";
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};
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&u2phy1_otg {
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status = "okay";
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};
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&u2phy2 {
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status = "okay";
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};
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&u2phy2_host {
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status = "okay";
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};
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&u2phy3 {
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status = "okay";
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};
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&u2phy3_host {
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status = "okay";
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};
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&usb_host0_ehci {
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status = "okay";
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};
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&usb_host0_ohci {
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status = "okay";
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};
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&usb_host1_ehci {
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status = "okay";
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};
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&usb_host1_ohci {
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status = "okay";
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};
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&usbdp_phy0 {
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rockchip,dp-lane-mux = <0 1 2 3>;
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status = "okay";
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};
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&usbdp_phy0_dp {
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status = "okay";
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};
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&usbdp_phy0_u3 {
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status = "okay";
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};
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&usbdp_phy1 {
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status = "okay";
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};
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&usbdp_phy1_dp {
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status = "okay";
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};
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&usbdp_phy1_u3 {
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status = "okay";
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};
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&usbdrd3_0 {
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status = "okay";
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};
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&usbdrd_dwc3_0 {
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dr_mode = "host";
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maximum-speed = "high-speed";
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status = "okay";
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};
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&usbdrd3_1 {
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status = "okay";
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};
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&usbdrd_dwc3_1 {
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status = "okay";
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};
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&usbhost3_0 {
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dr_mode = "host";
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status = "okay";
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};
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&usbhost_dwc3_0 {
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status = "okay";
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};
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&vop {
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status = "okay";
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};
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&vop_mmu {
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status = "okay";
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};
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&vp0 {
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rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>;
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rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER0>;
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cursor-win-id = <ROCKCHIP_VOP2_ESMART0>;
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};
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&vp1 {
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rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>;
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rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER1>;
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cursor-win-id = <ROCKCHIP_VOP2_ESMART1>;
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};
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&vp2 {
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rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>;
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rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER2>;
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cursor-win-id = <ROCKCHIP_VOP2_ESMART2>;
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};
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&vp3 {
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rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>;
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rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER3>;
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cursor-win-id = <ROCKCHIP_VOP2_ESMART3>;
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};
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