359 lines
7.1 KiB
Plaintext
359 lines
7.1 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include "rk3576.dtsi"
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#include "rk3576-evb1.dtsi"
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#include "rk3576-android.dtsi"
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/ {
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model = "Rockchip RK3576 EVB1 V10 Board + Rockchip Lontium HDMI/DP to MIPI Extboard";
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compatible = "rockchip,rk3576-evb1-v10", "rockchip,rk3576";
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ext_cam_clk: external-camera-clock {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "CLK_CAMERA_24MHZ";
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#clock-cells = <0>;
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};
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rkvtunnel: rkvtunnel {
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compatible = "rockchip,video-tunnel";
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status = "okay";
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};
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};
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&csi2_dcphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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dp_mipi_in: endpoint@1 {
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reg = <1>;
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remote-endpoint = <<7911uxc_out>;
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data-lanes = <1 2 3 4>;
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};
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hdmi_mipi0_in: endpoint@2 {
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reg = <2>;
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remote-endpoint = <<8668sx_out0>;
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data-lanes = <1 2 3>;
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};
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hdmi1_mipi0_in: endpoint@3 {
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reg = <3>;
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remote-endpoint = <<6911uxe_out0>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidcphy0_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi0_csi2_input>;
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};
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};
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};
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};
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&csi2_dphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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hdmi_mipi1_in: endpoint@1 {
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reg = <1>;
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remote-endpoint = <<6911uxc_out0>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidphy0_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi1_csi2_input>;
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};
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};
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};
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};
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&csi2_dphy0_hw {
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status = "okay";
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};
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&csi2_dphy1_hw {
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status = "okay";
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};
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&i2c4 {
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status = "okay";
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pinctrl-0 = <&i2c4m3_xfer>;
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lt6911uxe: lt6911uxe@2b {
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compatible = "lontium,lt6911uxe";
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status = "okay";
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reg = <0x2b>;
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clocks = <&ext_cam_clk>;
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clock-names = "xvclk";
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power-domains = <&power RK3576_PD_VI>;
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pinctrl-names = "default";
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pinctrl-0 = <&hdmiin_port0>;
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interrupt-parent = <&gpio3>;
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interrupts = <RK_PC7 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>;
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// power-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
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plugin-det-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "HDMI-MIPI0";
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rockchip,camera-module-lens-name = "LT6911UXE";
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port {
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lt6911uxe_out0: endpoint {
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remote-endpoint = <&hdmi1_mipi0_in>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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lt7911uxc: lt7911uxc@41 {
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compatible = "lontium,lt7911uxc";
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status = "okay";
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reg = <0x41>;
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clocks = <&ext_cam_clk>;
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clock-names = "xvclk";
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power-domains = <&power RK3576_PD_VI>;
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pinctrl-names = "default";
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pinctrl-0 = <&hdmiin_port0>;
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interrupt-parent = <&gpio3>;
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interrupts = <RK_PD5 IRQ_TYPE_EDGE_RISING>;
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reset-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>;
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// power-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
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// plugin-det-gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "HDMI-MIPI0";
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rockchip,camera-module-lens-name = "LT7911UXC";
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port {
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lt7911uxc_out: endpoint {
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remote-endpoint = <&dp_mipi_in>;
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// bus-type = <1>;//CPHY: 1, DPHY: 4 or default
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data-lanes = <1 2 3 4>;
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};
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};
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};
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lt8668sx: lt8668sx@43 {
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compatible = "lontium,lt8668sx";
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status = "okay";
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reg = <0x43>;
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clocks = <&ext_cam_clk>;
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clock-names = "xvclk";
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power-domains = <&power RK3576_PD_VI>;
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pinctrl-names = "default";
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pinctrl-0 = <&hdmiin_port0>;
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interrupt-parent = <&gpio3>;
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interrupts = <RK_PC7 IRQ_TYPE_EDGE_RISING>;
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reset-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>;
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// power-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
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plugin-det-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "HDMI-MIPI0";
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rockchip,camera-module-lens-name = "LT8668SX";
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// output-rgb = <1>;
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port {
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lt8668sx_out0: endpoint {
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remote-endpoint = <&hdmi_mipi0_in>;
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bus-type = <1>;//CPHY: 1, DPHY: 4 or default
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data-lanes = <1 2 3>;//CPHY: 3trios DPHY: 4lanes
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};
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};
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};
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};
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&i2c5 {
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status = "okay";
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pinctrl-0 = <&i2c5m3_xfer>;
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lt6911uxc: lt6911uxc@2b {
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compatible = "lontium,lt6911uxc";
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status = "okay";
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reg = <0x2b>;
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clocks = <&ext_cam_clk>;
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clock-names = "xvclk";
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power-domains = <&power RK3576_PD_VI>;
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pinctrl-names = "default";
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pinctrl-0 = <&hdmiin_port1>;
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interrupt-parent = <&gpio3>;
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interrupts = <RK_PD0 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
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// power-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
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plugin-det-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "HDMI-MIPI1";
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rockchip,camera-module-lens-name = "LT6911UXC";
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multi-dev-info {
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dev-idx-l = <1>;
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dev-idx-r = <3>;
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combine-idx = <3>;
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pixel-offset = <0>;
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dev-num = <2>;
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};
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port {
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lt6911uxc_out0: endpoint {
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remote-endpoint = <&hdmi_mipi1_in>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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};
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&mipi0_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi0_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidcphy0_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi0_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in>;
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};
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};
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};
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};
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&mipi1_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi1_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidphy0_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi1_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in1>;
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};
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};
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};
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds {
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status = "okay";
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port {
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cif_mipi_in: endpoint {
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remote-endpoint = <&mipi0_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds1 {
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status = "okay";
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port {
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cif_mipi_in1: endpoint {
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remote-endpoint = <&mipi1_csi2_output>;
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};
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};
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};
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&rkcif_mmu {
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status = "okay";
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};
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&vcc_mipicsi0 {
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/delete-property/ gpio;
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/delete-property/ pinctrl-0;
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};
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&vcc_mipicsi1 {
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/delete-property/ gpio;
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/delete-property/ pinctrl-0;
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};
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&vcc_mipidcphy0 {
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/delete-property/ gpio;
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/delete-property/ pinctrl-0;
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};
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&pinctrl {
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hdmiin {
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hdmiin_port0: hdmiin-port0 {
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rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>,
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<3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
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<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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hdmiin_port1: hdmiin-port1 {
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rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
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<3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>,
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<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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