527 lines
8.3 KiB
Plaintext
527 lines
8.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
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*
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*/
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&csi2_dphy1 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_ucam1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&imx464_out0>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidphy1_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi1_csi2_input>;
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};
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};
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};
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};
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&csi2_dphy2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_ucam2: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&imx464_out1>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidphy2_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi2_csi2_input>;
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};
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};
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};
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};
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&csi2_dphy4 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_ucam3: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&imx464_out2>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidphy4_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi3_csi2_input>;
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};
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};
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};
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};
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&csi2_dphy5 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_ucam4: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&imx464_out3>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidphy5_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi4_csi2_input>;
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};
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};
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};
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};
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&i2c5 {
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status = "okay";
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pinctrl-0 = <&i2c5m3_xfer>;
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/* module 77/79 0x1a 78/80 0x36 */
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imx464_0: imx464-0@1a {
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compatible = "sony,imx464";
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status = "okay";
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reg = <0x1a>;
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clocks = <&cru CLK_MIPI_CAMERAOUT_M1>;
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clock-names = "xvclk";
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power-domains = <&power RK3576_PD_VI>;
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pinctrl-names = "default";
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pinctrl-0 = <&cam_clk1m0_clk1>;
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avdd-supply = <&vcc_mipicsi0>;
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pwdn-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CMK-OT1980-PX1";
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rockchip,camera-module-lens-name = "SHG102";
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port {
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imx464_out0: endpoint {
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remote-endpoint = <&mipi_in_ucam1>;
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data-lanes = <1 2>;
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};
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};
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};
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imx464_1: imx464-1@36 {
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compatible = "sony,imx464";
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status = "okay";
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reg = <0x36>;
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clocks = <&cru CLK_MIPI_CAMERAOUT_M1>;
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clock-names = "xvclk";
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power-domains = <&power RK3576_PD_VI>;
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pinctrl-names = "default";
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avdd-supply = <&vcc_mipicsi0>;
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pwdn-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;/* hw not connect as default */
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CMK-OT1980-PX1";
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rockchip,camera-module-lens-name = "SHG102";
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port {
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imx464_out1: endpoint {
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remote-endpoint = <&mipi_in_ucam2>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&i2c8 {
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status = "okay";
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pinctrl-0 = <&i2c8m2_xfer>;
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/* 77/79 0x1a 78/80 0x36 */
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imx464_2: imx464-2@1a {
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compatible = "sony,imx464";
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status = "okay";
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reg = <0x1a>;
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clocks = <&cru CLK_MIPI_CAMERAOUT_M2>;
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clock-names = "xvclk";
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power-domains = <&power RK3576_PD_VI>;
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pinctrl-names = "default";
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pinctrl-0 = <&cam_clk2m0_clk2>;
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avdd-supply = <&vcc_mipicsi1>;
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pwdn-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <2>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CMK-OT1980-PX1";
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rockchip,camera-module-lens-name = "SHG102";
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port {
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imx464_out2: endpoint {
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remote-endpoint = <&mipi_in_ucam3>;
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data-lanes = <1 2>;
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};
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};
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};
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imx464_3: imx464-3@36 {
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compatible = "sony,imx464";
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status = "okay";
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reg = <0x36>;
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clocks = <&cru CLK_MIPI_CAMERAOUT_M2>;
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clock-names = "xvclk";
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power-domains = <&power RK3576_PD_VI>;
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avdd-supply = <&vcc_mipicsi1>;
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pwdn-gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <3>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CMK-OT1980-PX1";
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rockchip,camera-module-lens-name = "SHG102";
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port {
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imx464_out3: endpoint {
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remote-endpoint = <&mipi_in_ucam4>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&mipi1_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi1_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidphy1_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi1_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in1>;
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};
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};
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};
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};
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&mipi2_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi2_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidphy2_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi2_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in2>;
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};
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};
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};
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};
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&mipi3_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi3_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidphy4_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi3_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in3>;
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};
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};
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};
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};
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&mipi4_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi4_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidphy5_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi4_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in4>;
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};
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};
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};
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds1 {
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status = "okay";
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port {
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cif_mipi_in1: endpoint {
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remote-endpoint = <&mipi1_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds1_sditf {
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status = "okay";
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port {
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mipi1_lvds_sditf: endpoint {
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remote-endpoint = <&isp_vir0>;
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};
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};
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};
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&rkcif_mipi_lvds2 {
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status = "okay";
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port {
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cif_mipi_in2: endpoint {
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remote-endpoint = <&mipi2_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds2_sditf {
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status = "okay";
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port {
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mipi2_lvds_sditf: endpoint {
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remote-endpoint = <&isp_vir1>;
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};
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};
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};
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&rkcif_mipi_lvds3 {
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status = "okay";
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port {
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cif_mipi_in3: endpoint {
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remote-endpoint = <&mipi3_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds3_sditf {
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status = "okay";
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port {
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mipi3_lvds_sditf: endpoint {
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remote-endpoint = <&isp_vir2>;
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};
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};
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};
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&rkcif_mipi_lvds4 {
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status = "okay";
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port {
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cif_mipi_in4: endpoint {
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remote-endpoint = <&mipi4_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds4_sditf {
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status = "okay";
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port {
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mipi4_lvds_sditf: endpoint {
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remote-endpoint = <&isp_vir3>;
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};
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};
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};
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&rkcif_mmu {
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status = "okay";
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};
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&rkisp {
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status = "okay";
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};
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&rkisp_mmu {
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status = "okay";
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};
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&rkisp_vir0 {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp_vir0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi1_lvds_sditf>;
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};
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};
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};
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&rkisp_vir1 {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp_vir1: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi2_lvds_sditf>;
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};
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};
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};
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&rkisp_vir2 {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp_vir2: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi3_lvds_sditf>;
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};
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};
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};
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&rkisp_vir3 {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp_vir3: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi4_lvds_sditf>;
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};
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};
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};
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&rkvpss {
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status = "okay";
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};
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&rkvpss_mmu {
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status = "okay";
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};
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&rkvpss_vir0 {
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status = "okay";
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};
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&rkvpss_vir1 {
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status = "okay";
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};
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&rkvpss_vir2 {
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status = "okay";
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};
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&rkvpss_vir3 {
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status = "okay";
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};
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